Evan Cheng
d08d23315d
setSetCCIsExpensive is gone.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32941 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-05 23:42:53 +00:00
Jim Laskey
ca367b4e25
Provide support for FP_TO_UINT.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32599 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-15 14:32:57 +00:00
Chris Lattner
57fc62c8d2
Another step forward in PPC64 JIT support: we now no-longer need stubs
...
emitted for external globals in PPC64-JIT-PIC mode (which is good because
we didn't handle them before!).
This also fixes a bug handling the picbase delta, which we would get wrong
in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32451 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-11 23:22:45 +00:00
Jim Laskey
2060a822fe
Missing opcode.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32439 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-11 18:45:56 +00:00
Anton Korobeynikov
d27a258d2d
Cleaned setjmp/longjmp lowering interfaces. Now we're producing right
...
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32415 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-10 23:12:42 +00:00
Chris Lattner
85c671b908
Fix i64 uint_to_fp on ppc64
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32297 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07 01:24:16 +00:00
Jim Laskey
efc7e52183
Restoration of the stack pointer after a deallocation of a alloca was not
...
updating the SP link.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32202 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-04 22:04:42 +00:00
Jim Laskey
fbb74e6941
1. In ppc64 mode we need only use one GPR.
...
2. Float values need to be promoted to double when they are vararg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32074 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01 16:30:47 +00:00
Chris Lattner
70fa493613
Fix the CodeGen/PowerPC/vec_constants.ll regression.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32057 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01 01:45:39 +00:00
Chris Lattner
15eb329dae
Fix bug codegen'ing FP constant vectors with integer splats. Make sure the
...
created intrinsics have the right integer types. This fixes
PowerPC/2006-11-29-AltivecFPSplat.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32024 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 19:58:49 +00:00
Jim Laskey
619965d32e
Offset for load of 32-bit arg in 64-bit world was incorrect.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32019 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 13:37:09 +00:00
Jim Laskey
7fc4a94bdd
Remove debug code.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31970 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 18:27:02 +00:00
Jim Laskey
e9bd7b2e03
32-bit int space was not accounted for properly in lowerCall.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31966 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 14:53:52 +00:00
Evan Cheng
c0f64ffab9
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
...
of opcode and number of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27 23:37:22 +00:00
Chris Lattner
b1eb987ccd
on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots.
...
Also, valist should create a pointer RC reg class value, not a GPRC value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-18 01:57:19 +00:00
Chris Lattner
18258c6404
convert PPC::BCC to use the 'pred' operand instead of separate predicate
...
value and CR reg #. This requires swapping the order of these everywhere
that touches BCC and requires us to write custom matching logic for
PPCcondbranch :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31835 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 22:37:34 +00:00
Chris Lattner
289c2d5f45
rename PPC::COND_BRANCH to PPC::BCC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31834 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 22:14:47 +00:00
Chris Lattner
df4ed6350b
start using PPC predicates more consistently.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31833 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 22:10:59 +00:00
Jim Laskey
2f616bff7e
This is a general clean up of the PowerPC ABI. Address several problems and
...
bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31792 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 22:43:37 +00:00
Chris Lattner
0851b4f3ed
fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri
...
addrmodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31757 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 19:55:13 +00:00
Chris Lattner
ac011bce9e
lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead of
...
'(shr (ctlz (sub Y, Z)), 5)'.
The use of xor better exposes the operation to bit-twiddling logic in the
dag combiner. For example, this:
typedef struct {
unsigned prefix : 4;
unsigned code : 4;
unsigned unsigned_p : 4;
} tree_common;
int foo(tree_common *a, tree_common *b) {
return a->code == b->code;
}
Now compiles to:
_foo:
lwz r2, 0(r4)
lwz r3, 0(r3)
xor r2, r3, r2
rlwinm r2, r2, 28, 28, 31
cntlzw r2, r2
srwi r3, r2, 5
blr
instead of:
_foo:
lbz r2, 3(r4)
lbz r3, 3(r3)
srwi r2, r2, 4
srwi r3, r3, 4
subf r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
saving a cycle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31725 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 05:28:08 +00:00
Chris Lattner
2fe4bf453b
minor tweaks, reject vector preinc.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31717 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 01:38:31 +00:00
Chris Lattner
f6edf4dcf0
ppc64 doesn't have lwau, don't attempt to form it.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31656 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 00:08:42 +00:00
Chris Lattner
94e509caea
implement preinc support for r+i loads on ppc64
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31654 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 23:58:45 +00:00
Chris Lattner
4eab71497d
add an initial cut at preinc loads for ppc32. This is broken for ppc64
...
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)
This is disabled unless -enable-ppc-preinc is passed to llc for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31621 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 02:08:47 +00:00
Evan Cheng
cd63319227
PPC supports i32 / i64 pre-inc load / store.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31599 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09 19:11:50 +00:00
Evan Cheng
144d8f09e1
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09 17:55:04 +00:00
Chris Lattner
fc5b1ab949
Refactor all the addressing mode selection stuff into the isel lowering
...
class, where it can be used for preinc formation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31536 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 02:15:41 +00:00
Reid Spencer
3ed469ccd7
For PR786:
...
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02 20:25:50 +00:00
Chris Lattner
331d1bc5df
Implement the getRegForInlineAsmConstraint method for PPC. With recent
...
sdisel changes, this eliminates a ton of copies around common inline asms.
For example:
int test2(int Y, int X) {
asm("foo %0, %1" : "=r"(X): "r"(X));
return X;
}
now compiles to:
_test2:
foo r3, r4
blr
instead of:
_test2:
mr r2, r4
foo r2, r2
mr r3, r2
blr
GCC produces:
_test2:
foo r4, r4
mr r3,r4
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31367 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02 01:44:04 +00:00
Chris Lattner
dba1aeedd8
Change the prototype for TargetLowering::isOperandValidForConstraint
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31318 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31 19:40:43 +00:00
Evan Cheng
c35497fc2a
All targets expand BR_JT for now.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31294 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-30 08:02:39 +00:00
Chris Lattner
10da957574
set the ppc64 stack pointer right, dynamic alloca now works for ppc64
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31028 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-18 01:20:43 +00:00
Chris Lattner
56a752e00f
Expand alloca for ppc64
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31027 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-18 01:18:48 +00:00
Evan Cheng
8b2794aeff
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 21:14:26 +00:00
Evan Cheng
466685d41a
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 20:57:25 +00:00
Evan Cheng
786225adf0
Make use of getStore().
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 23:01:46 +00:00
Evan Cheng
c548428c5d
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
...
extra operand to LOADX to specify the exact value extension type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-04 00:56:09 +00:00
Chris Lattner
3fe6c1d389
Legalize is no longer limited to cleverness with just constant shift amounts.
...
Allow it to be clever when possible and fall back to the gross code when needed.
This allows us to compile:
long long foo1(long long X, int C) {
return X << (C|32);
}
long long foo2(long long X, int C) {
return X << (C&~32);
}
to:
_foo1:
rlwinm r2, r5, 0, 27, 31
slw r3, r4, r2
li r4, 0
blr
.globl _foo2
.align 4
_foo2:
rlwinm r2, r5, 0, 27, 25
subfic r5, r2, 32
slw r3, r3, r2
srw r5, r4, r5
or r3, r3, r5
slw r4, r4, r2
blr
instead of:
_foo1:
ori r2, r5, 32
subfic r5, r2, 32
addi r6, r2, -32
srw r5, r4, r5
slw r3, r3, r2
slw r6, r4, r6
or r3, r3, r5
slw r4, r4, r2
or r3, r3, r6
blr
.globl _foo2
.align 4
_foo2:
rlwinm r2, r5, 0, 27, 25
subfic r5, r2, 32
addi r6, r2, -32
srw r5, r4, r5
slw r3, r3, r2
slw r6, r4, r6
or r3, r3, r5
slw r4, r4, r2
or r3, r3, r6
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30507 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-20 03:47:40 +00:00
Chris Lattner
cf9d0acfef
Fold the PPCISD shifts when presented with 0 inputs. This occurs for code
...
like:
long long test(long long X, int Y) {
return 1ULL << Y;
}
long long test2(long long X, int Y) {
return -1LL << Y;
}
which we used to compile to:
_test:
li r2, 1
subfic r3, r5, 32
li r4, 0
addi r6, r5, -32
srw r3, r2, r3
slw r4, r4, r5
slw r6, r2, r6
or r3, r4, r3
slw r4, r2, r5
or r3, r3, r6
blr
_test2:
li r2, -1
subfic r3, r5, 32
addi r6, r5, -32
srw r3, r2, r3
slw r4, r2, r5
slw r2, r2, r6
or r3, r4, r3
or r3, r3, r2
blr
Now we produce:
_test:
li r2, 1
addi r3, r5, -32
subfic r4, r5, 32
slw r3, r2, r3
srw r4, r2, r4
or r3, r4, r3
slw r4, r2, r5
blr
_test2:
li r2, -1
subfic r3, r5, 32
addi r6, r5, -32
srw r3, r2, r3
slw r4, r2, r5
slw r2, r2, r6
or r3, r4, r3
or r3, r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30479 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-19 05:22:59 +00:00
Evan Cheng
c356a572e3
Reflects MachineConstantPoolEntry changes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30279 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-12 21:04:05 +00:00
Reid Spencer
3a9ec2463d
For PR387:
...
Close out this long standing bug by removing the remaining overloaded
virtual functions in LLVM. The -Woverloaded-virtual option is now turned on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29934 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-28 01:02:49 +00:00
Chris Lattner
f6e190fae0
Fix a bug in a recent refactoring that broke a bunch of stuff.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29649 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-12 07:20:05 +00:00
Chris Lattner
e219945348
Eliminate use of getNode that takes a vector.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29614 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:38:39 +00:00
Chris Lattner
79e490aa23
Convert vectors to fixed sized arrays and smallvectors. Eliminate use of getNode that takes a vector.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29609 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:18:05 +00:00
Chris Lattner
325f0a129e
Fix miscompilation of float vector returns. Compile code to this:
...
_func:
vsldoi v2, v3, v2, 12
vsldoi v2, v2, v2, 4
blr
instead of:
_func:
vsldoi v2, v3, v2, 12
vsldoi v2, v2, v2, 4
*** vor f1, v2, v2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29607 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 16:47:32 +00:00
Chris Lattner
0d72a20630
Fix some ppc64 issues with vector code.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29384 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 16:45:47 +00:00
Chris Lattner
35d86fef1f
Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29307 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-26 21:12:04 +00:00
Chris Lattner
d998938459
Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps
...
into i16/i32 load/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29089 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 20:56:58 +00:00
Chris Lattner
f89437d049
Implement 64-bit select, bswap, etc.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28935 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 20:14:52 +00:00