Owen Anderson
1af7f7291d
Update for feedback from Jim.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 19:39:26 +00:00
Benjamin Kramer
86ce852a15
ARMDisassembler: Always return a size, even when disassembling fails.
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This should fix PR10772.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 18:21:36 +00:00
Owen Anderson
96425c8464
Support an extension of ARM asm syntax to allow immediate operands to ADR instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 18:09:22 +00:00
Kalle Raiskila
54f8a9f54d
Don't insert branch hint lables that are never used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 10:14:56 +00:00
Owen Anderson
9bd655dcde
Fix PR10755 by checking for invalid predicate codes from UNPREDICTABLE t2IT instructions when decoding their successors.
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This is the last disassembly crash detected by exhaustive Thumb2 instruction space. Major thanks to Chandler Carruth for making this kind of exhaustive testing possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 06:19:51 +00:00
Craig Topper
8fd13b6de5
Fix disassembling of VCVTSD2SI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 04:49:29 +00:00
Eli Friedman
069e2ed794
Atomic load/store on ARM/Thumb.
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I don't really like the patterns, but I'm having trouble coming up with a
better way to handle them.
I plan on making other targets use the same legalization
ARM-without-memory-barriers is using... it's not especially efficient, but
if anyone cares, it's not that hard to fix for a given target if there's
some better lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 02:59:24 +00:00
Bruno Cardoso Lopes
f1a264232c
Do the same as r138461. Mark VZEROALL as clobbering all YMM registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138592 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 22:23:58 +00:00
Nick Lewycky
b210cbf692
Remove stray fullstop.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138589 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 21:46:20 +00:00
Bruno Cardoso Lopes
6292eceea0
Add support for AVX 256-bit version of MOVDDUP!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138588 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 21:40:37 +00:00
Bruno Cardoso Lopes
06ef923d14
Make isMOVDDUP mask check more strict and update comments!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138587 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 21:40:34 +00:00
Owen Anderson
99906830e8
Port over additional encoding tests to decoding tests, and fix an operand ordering bug this exposed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138575 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 18:30:18 +00:00
Andrew Trick
b9ca5124f8
ARM fix for missing implicit operands on ldmia_ret.
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rdar://10005094: miscompile of 176.gcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138568 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 17:50:53 +00:00
Andrew Trick
51972da576
whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138566 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 17:40:54 +00:00
Jim Grosbach
0c49ac05cd
Explicitly disallow predication in Thumb1 assembly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138562 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 17:23:55 +00:00
Craig Topper
ebc1db0fac
Add more missing TB encodings to VEX instructions to allow them to be disassembled. Fixes remainder of PR10678.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138553 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 08:11:01 +00:00
Craig Topper
ea03659d23
Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be disassembled. Fixes PR10723.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138551 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 06:57:46 +00:00
Bruno Cardoso Lopes
07b7f672a0
Add support for 256-bit versions of VSHUFPD and VSHUFPS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138546 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 02:58:26 +00:00
Bruno Cardoso Lopes
e7461c0353
Add memory version of SHUFPD to mask decoding!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138545 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 02:58:21 +00:00
Evan Cheng
77eaaf0a0c
Hide -global-merge option.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138540 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 01:22:49 +00:00
Evan Cheng
b8cfe4ff41
Add a command line option to disable global merge pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138536 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 01:00:36 +00:00
Evan Cheng
0f660260e6
Remove a out-of-place comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 00:54:42 +00:00
Bruno Cardoso Lopes
27831e5e6f
Create a section for non-instructions patterns in the beginning of the
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file, and move more code around!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138521 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 23:18:11 +00:00
Bruno Cardoso Lopes
9993499057
Move code around!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138520 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 23:18:09 +00:00
Bruno Cardoso Lopes
de79231468
Organize UNPCK* patterns, also add remaining for AVX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138519 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 23:18:06 +00:00
Bruno Cardoso Lopes
4cf4778ac4
Move remaining MOVDDUP patterns close to MOVDDUP defintion and duplicate
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the missing ones for AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138518 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 23:18:04 +00:00
Bruno Cardoso Lopes
4724f25ed6
Organize and tidy up MOVDDUP section. Also update comments!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138517 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 23:18:02 +00:00
Bruno Cardoso Lopes
6140294363
Move MOVHLPS patterns close to MOVHLPS definition, and duplicate the
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pattern for 128-bit AVX mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 23:17:59 +00:00
Bruno Cardoso Lopes
954d5eabb7
Move all PSHUF* patterns close to the PSHUF* definitions. Also be
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explicit about which subtarget they refer to, and add AVX versions of
the ones we currently don't. Remove old and now wrong comments!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138515 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 23:17:57 +00:00
Bruno Cardoso Lopes
af002d8405
Move all SHUFP* patterns close to the SHUFP* definitions. Also be
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explicit about which subtarget they refer to, and add AVX versions of
the ones we currently don't. Make the mask check more strict, to be
clear it won't be used to match to 256-bit versions!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138514 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 23:17:55 +00:00
Owen Anderson
f44082091c
Perform more thorough checking of t2IT mask parameters, which fixes all remaining crashers when disassembling the entire 16-bit instruction space.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138507 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 22:40:22 +00:00
Eli Friedman
f8f90f0174
Hook up 64-bit atomic load/store on x86-32. I plan to write more efficient implementations eventually.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138505 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 22:33:28 +00:00
Jim Grosbach
b9d3ff8729
ARM asm backend initialize isThumbMode based on target triple.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138501 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 22:27:35 +00:00
Jim Grosbach
4d23e99d2a
Thumb .n mnemonic qualifiers can be ignored for now.
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We'll need to pay attention to them when we start getting more serious about
the details of parsing thumb2 assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138500 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 22:19:48 +00:00
Jim Grosbach
f69c804036
Thumb parsing and encoding for SUB (SP minu immediate).
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Fix FiXME in test file. Remove FIXME for SUB (SP minus register) since that
form is Thumb2 only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 21:42:27 +00:00
Owen Anderson
12a1e3bbcb
Be careful not to walk off the end of the operand info list while updating VFP predicates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138492 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 21:35:46 +00:00
Jim Grosbach
72f39f8436
Thumb parsing and encoding support for ADD SP instructions.
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Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138488 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 21:22:15 +00:00
Eli Friedman
4317fe1fc6
Fix whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138487 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 21:17:30 +00:00
Eli Friedman
327236cd6c
Basic x86 code generation for atomic load and store instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138478 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 20:50:09 +00:00
Jim Grosbach
df9ce6bbc5
When printing Thumb1 NOP ('mov r8, r8'), make sure to print the predicate.
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rdar://10015134
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138467 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 20:06:14 +00:00
Bruno Cardoso Lopes
356e988110
Mark VZEROALL as clobbering all YMM registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138461 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 18:48:33 +00:00
Jim Grosbach
f95aaf951b
Add missing explicit writeback operand to tSTMIA_UPD.
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rdar://10014745
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 18:19:42 +00:00
Evan Cheng
3e74d6fdd2
Move TargetRegistry and TargetSelect from Target to Support where they belong.
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These are strictly utilities for registering targets and components.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 18:08:43 +00:00
Jim Grosbach
c7e0bb2325
Thumb add SP assembly syntax fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138448 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 18:04:27 +00:00
Jim Grosbach
5b81584f74
Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.
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Add the predicate operand to the instructions. Update the back end
accordingly where the instructions are used. Restrict the SP operands
to actually only be SP, as otherwise these break assembly parsing for the
normal instruction variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138445 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 17:46:13 +00:00
Owen Anderson
e234d02204
Be stricter in enforcing IT instruction predicate values, so that we don't end up trying to print out an illegal predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 17:21:43 +00:00
Richard Osborne
8f9c5cca4f
Add Uses=[SP] to call instructions. This fixes a miscompilation with a
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variable sized alloca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138433 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 13:32:43 +00:00
Craig Topper
13894fa135
Break 256-bit vector int add/sub/mul into two 128-bit operations to avoid costly scalarization. Fixes PR10711.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 06:14:18 +00:00
Bruno Cardoso Lopes
d8b7dd5252
Fix a nasty bug where a v4i64 was being wrong emitted with 32-bit
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permutations. Also tidy up some patterns and make them close to their
instruction definition!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138392 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 22:06:37 +00:00
Jim Grosbach
5aa29a0cff
Move ARM frame-unwinding EHABI handling a touch earlier.
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It should go before AsmPrinter MC pseudo expansion since it's based on
MachineInstr, not MCInst. Otherwise any frame related pseudo instructions
may be missed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138386 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 21:32:34 +00:00