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14491 Commits

Author SHA1 Message Date
Nick Lewycky
1cbae18cf6 Reapply r140979 with fix! We never did get a testcase, but careful review of the 
logic by David Meyer revealed this bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140992 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 07:10:45 +00:00
Torok Edwin
48488a64fa attempt to fix ocaml bindings: landing pads 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140991 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 06:41:46 +00:00
Nick Lewycky
4fcc80a486 Revert r140979 due to reports of bootstrap failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140980 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 05:14:59 +00:00
Nick Lewycky
8fde4f5842 Add one more case we compute a max trip count. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140979 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 01:03:57 +00:00
Craig Topper
82f131a017 Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140974 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-02 21:08:12 +00:00
Craig Topper
146c6d77f0 Special case disassembler handling of REX.B prefix on NOP instruction to decode as XCHG R8D, EAX instead. Fixes PR10344. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140971 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-02 16:56:09 +00:00
Nick Lewycky
11357d4f40 Add a new icmp+select optz'n. Also shows off the load(cst) folding added in 
r140966.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140969 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-02 10:37:37 +00:00
Craig Topper
846a2dcada Fix disassembling of INVEPT and INVVPID to take operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140955 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 21:20:14 +00:00
Craig Topper
e1b4a1a07e Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140954 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 19:54:56 +00:00
Bill Wendling
0676d2a04c Filecheck-ize. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140904 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 23:40:29 +00:00
Bill Wendling
127f410c3a Add new line at end of file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140903 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 23:21:11 +00:00
Bill Wendling
e09b2a0d49 When inferring the pointer alignment, if the global doesn't have an initializer 
and the alignment is 0 (i.e., it's defined globally in one file and declared in
another file) it could get an alignment which is larger than the ABI allows for
that type, resulting in aligned moves being used for unaligned loads.

For instance, in file A.c:

   struct S s;

In file B.c:
   struct {
     // something long
   };
   extern S s;

   void foo() {
     struct S p = s;
     // ...
   }

this copy is a 'memcpy' which is turned into a series of 'movaps' instructions
on X86. But this is wrong, because 'struct S' has alignment of 4, not 16.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140902 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 23:19:55 +00:00
David Greene
90b6e346ee Test More Complicated Lists 
Test of indexing lists of lists of lists works.  This also exercises
some operators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140884 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 20:59:52 +00:00
David Greene
f6c8cbba4e Test VarListElementInit:: resolveListElementReference 
Add a TableGen test to check if indexing lists of lists works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140883 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 20:59:51 +00:00
Akira Hatanaka
5773fd52ef Remove unnecessary checking of register operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140872 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 19:18:24 +00:00
Akira Hatanaka
c7bafe9241 Add definitions of Mips64 rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140870 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 18:51:46 +00:00
Jim Grosbach
cbf676b3ba float comparison to double 'zero' constant can just be a float 'zero.' 
InstCombine was incorrectly considering the conversion of the constant
zero to be unsafe.

We want to transform:
define float @bar(float %x) nounwind readnone optsize ssp {
  %conv = fpext float %x to double
  %cmp = fcmp olt double %conv, 0.000000e+00
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}

Into:
define float @bar(float %x) nounwind readnone optsize ssp {
  %cmp = fcmp olt float %x, 0.000000e+00   ; <---- This
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}


rdar://10215914


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140869 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 18:45:50 +00:00
Jim Grosbach
6f09fcf5da ARM Darwin default relocation model is PIC. 
This matches clang, so default options in llc and friends are now closer to
clang's defaults.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140863 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 17:41:35 +00:00
Akira Hatanaka
d80c13bfed Check values of immediate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140860 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 17:19:21 +00:00
Duncan Sands
5bc93e782e Add forgotten tests that the cleanup flag is cleared if there 
is a catch-all landingpad clause.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140858 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 17:00:34 +00:00
Duncan Sands
0ad7b6e773 Inlining often produces landingpad instructions with repeated 
catch or repeated filter clauses.  Teach instcombine a bunch
of tricks for simplifying landingpad clauses.  Currently the
code only recognizes the GNU C++ and Ada personality functions,
but that doesn't stop it doing a bunch of "generic" transforms
which are hopefully fine for any real-world personality function.
If these "generic" transforms turn out not to be generic, they
can always be conditioned on the personality function.  Probably
someone should add the ObjC++ personality function.  I didn't as
I don't know anything about it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140852 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 13:12:16 +00:00
Akira Hatanaka
25a7d94e81 Mips64 shift instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140841 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 03:18:46 +00:00
Akira Hatanaka
f549ab7853 Mips64 arithmetic and logical instructions with one source register and 
immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140839 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 02:08:54 +00:00
Akira Hatanaka
a3defb07a0 Fill delay slot with useful instructions. Modified from Sparc's version of delay 
slot filler.

Patch by Reed Kotler at Mips Technologies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140825 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 23:52:13 +00:00
Dan Gohman
27e0666725 When eliminating unnecessary retain+autorelease on return values, 
handle the case where the retain is in a different basic block.
rdar://10210274.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140815 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 22:27:34 +00:00
Dan Gohman
597fece886 Don't eliminate objc_retainBlock calls on stack objects if the 
objc_retainBlock call is potentially responsible for copying
the block to the heap to extend its lifetime. rdar://10209613.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140814 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 22:25:23 +00:00
Akira Hatanaka
c0be26909f Mips64 arithmetic and logical instructions with two source registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140806 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 20:37:56 +00:00
Andrew Trick
0c01bc385a LSR: rewrite inner loops only. 
Rewriting the entire loop nest now requires -enable-lsr-nested.
See PR11035 for some performance data.
A few unit tests specifically test nested LSR, and are now under a flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140762 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 01:33:38 +00:00
Andrew Trick
03b08764d2 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140761 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 01:31:48 +00:00
Justin Holewinski
d57c1bc0b6 PTX: Add new patterns for bitconvert and any_extend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140753 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 01:13:12 +00:00
Evan Cheng
9b88d2d782 Tighten a ARM dag combine condition to avoid an identity transformation, which 
ends up introducing a cycle in the DAG.

rdar://10196296


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140733 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 23:16:31 +00:00
Eli Friedman
7d3e2b78c7 PR11033: Make sure we don't generate PCMPGTQ and PCMPEQQ if the target CPU does not support them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140723 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 21:00:25 +00:00
Justin Holewinski
d8e4ed2686 PTX: MC-ize the PTX back-end (patch 1 of N) 
Lay some groundwork for converting to MC-based asm printer. This is the first
of probably many patches to bring the back-end back up-to-date with all of the
recent MC changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140697 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 14:32:04 +00:00
James Molloy
acad68da50 Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit. 
Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.

Add decoder and disassembler tests.

Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140696 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 14:21:38 +00:00
Andrew Trick
52164eaddc Test case for r140670: indvars should hoist sext. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140671 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 02:13:32 +00:00
Eli Friedman
e6fadced87 PR10628: Fix getModRefInfo so it queries the underlying alias() implementation correctly while checking nocapture calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140666 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 00:34:27 +00:00
Jakob Stoklund Olesen
df4b35e3dd Remove X86-dependent stuff from SSEDomainFix. 
This also enables domain swizzling for AVX code which required a few
trivial test changes.

The pass will be moved to lib/CodeGen shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140659 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 23:50:46 +00:00
Jim Grosbach
25ddc2bf7e ARM Thumb2 asm parsing [SU]XT[BH] without rotate but with .w. 
Add inst alias to handle these assembly forms. Add tests, too.

rdar://10178799


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140647 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 22:18:54 +00:00
NAKAMURA Takumi
5bac1146d9 test/CMakeLists.txt: Depend on llvm-objdump. "make check" is expected to resolve test-dependent targets on CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140641 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 21:54:50 +00:00
Benjamin Kramer
a9390a4d5f Stop emitting instructions with the name "tmp" they eat up memory and have to be uniqued, without any benefit. 
If someone prefers %tmp42 to %42, run instnamer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140634 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 20:39:19 +00:00
Michael J. Spencer
9142ae2cf8 Add binary archive support to llvm-nm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140627 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 19:37:18 +00:00
Michael J. Spencer
98d0416fbf Unbreak tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140622 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 19:06:37 +00:00
Justin Holewinski
13e0c805a2 PTX: Add support for sitofp in backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140593 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 01:04:47 +00:00
Bill Wendling
d5520987d1 Split the landing pad basic block with the correct function. Also merge the 
split landingpad instructions into a PHI node.
PR11016


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140592 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 00:59:31 +00:00
Eli Friedman
139e6699c4 Last batch of test conversions to new atomic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140585 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 00:17:29 +00:00
Eli Friedman
184944acdf Convert a bunch more tests over to the new atomic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140582 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 23:15:09 +00:00
Owen Anderson
21733e8f80 Fix an incorrect decoder test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140579 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 23:08:34 +00:00
Owen Anderson
256e10f964 Remove incorrect testcases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140572 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 22:13:55 +00:00
Eli Friedman
47d3ee559a Convert more tests to new atomic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140567 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 21:36:10 +00:00
Eli Friedman
de412c391b Convert more tests over to the new atomic instructions. 
I did not convert Atomics-32.ll and Atomics-64.ll by hand; the diff is autoupgrade output.

The wmb test is gone because there isn't any way to express wmb with the new atomic instructions; if someone really needs a non-asm way to write a wmb on Alpha, a platform-specific intrisic could be added.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140566 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 21:30:17 +00:00