Reid Spencer
1e8ae156e0
Add test case for PR1261, currently XFAILed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35192 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 23:28:16 +00:00
Devang Patel
2e8f27d0bd
Document LoopPass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35191 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 22:21:25 +00:00
Reid Spencer
05227d88af
APIntify the isHighOnes utility function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35190 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:29:50 +00:00
Reid Spencer
adf2a206ec
Fix coding standards violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35189 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:19:02 +00:00
Reid Spencer
3a2a9fbf99
Implement isMaxValueMinusOne in terms of APInt instead of uint64_t.
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Patch by Sheng Zhou.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35188 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:10:28 +00:00
Reid Spencer
727992c30a
Implement isMinValuePlusOne using facilities of APInt instead of uint64_t
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Patch by Zhou Sheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35187 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:08:07 +00:00
Reid Spencer
44e33e674a
Implement isOneBitSet in terms of APInt::countPopulation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35186 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:04:43 +00:00
Reid Spencer
5a1e3e1a7d
1. Use APInt::getSignBit to reduce clutter (patch by Sheng Zhou)
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2. Replace uses of the "isPositive" utility function with APInt::isPositive
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35185 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:58:18 +00:00
Reid Spencer
8439bc8d69
Remove a redundant clause in an if statement.
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Patch by Sheng Zhou.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35184 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:47:50 +00:00
Reid Spencer
49d273e168
Regenerate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35183 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:40:51 +00:00
Reid Spencer
eac65746d7
Fix test/Assembler/2007-03-19-NegValue.ll by using the new "isSigned"
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parameter on ConstantInt::get to indicate the signedness of the intended
value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35182 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:40:22 +00:00
Reid Spencer
7fc44c8c5f
Allow ConstantInt::get(Ty, uint64_t) to interpret the 64-bit values as a
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negative number. This is needed to fix test/Assembler/2007-03-19-NegValue.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35181 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:39:08 +00:00
Reid Spencer
3a34137548
Implement extension of sign bits for negative values in the uint64_t
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constructor. This helps to fix test/Assembler/2007-03-19-NegValue.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35180 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:37:47 +00:00
Reid Spencer
95da121395
Add an indication of signedness to the uint64_t constructor so sign bits
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can be extended. This helps fix test/Assembler/2007-03-19-NegValue.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35179 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:36:48 +00:00
Reid Spencer
4a33714dcd
Test case noticed by Sheng that fails because negative values that are
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greater than 64-bits don't have the sign bits extended on construction of
the APInt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35178 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:35:26 +00:00
Anton Korobeynikov
d437db1b7b
Fix mingw32 build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35177 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:19:08 +00:00
Duncan Sands
3718050bb5
Test handling of ARRAY_REF when the component type is of unknown size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35176 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 19:56:18 +00:00
Reid Spencer
868cdb2248
For PR1258:
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Test that invalid numbered value references get an error message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35175 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:41:37 +00:00
Reid Spencer
93c40036c8
Regenerate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35174 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:40:50 +00:00
Reid Spencer
186a43f1ad
For PR1248:
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Eliminate support for type planes in numbered values. This simplifies the
data structures involved in managing forward definitions, etc. Instead of
requiring maps from type to value, we can now just use a vector of values.
These changes also required rewrites of some support functions such as
InsertValue, getBBVal, and ResolveDefinitions. Some other cosmetic changes
were made as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35173 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:39:36 +00:00
Reid Spencer
4e0422c7e6
Add and Operator== method to ValID so equality can be done properly for
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named or numbered ValIDs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35172 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:34:28 +00:00
Reid Spencer
590b3c559f
For PR1258:
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Radically simplify the SlotMachine. There is no need to keep Value planes
around any more. This change causes slot numbering to number all un-named,
non-void values starting at 0 and incrementing monotonically through the
function, regardless of type (including BasicBlocks). Getting slot numbers
is now a single lookup operation instead of a double lookup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35171 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:32:53 +00:00
Reid Spencer
2318ec67b8
For PR1258:
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Revise numeric value references to accommodate collapsed type planes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35170 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:27:35 +00:00
Chris Lattner
a9d1a843fc
fix ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35169 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:25:57 +00:00
Reid Spencer
c1a6e30274
Use opt instead of gccas.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35168 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:25:55 +00:00
Chris Lattner
d7d2287928
add a testcase the resent patches fail on.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35167 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:25:48 +00:00
Reid Spencer
660c4f9fac
Don't upgrade these.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35166 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:08:42 +00:00
Evan Cheng
757072d954
Remove -reduce-joining-phys-regs options. Make it on by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35165 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:08:26 +00:00
Duncan Sands
d8197fd9d7
Fix obvious typo in comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35164 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 14:25:02 +00:00
Evan Cheng
9f6636ff0c
Fix naming inconsistencies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:48:02 +00:00
Evan Cheng
fa775d09c6
Special LDR instructions to load from non-pc-relative constantpools. These are
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rematerializable. Only used for constant generation for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:20:03 +00:00
Evan Cheng
a251570417
Constant generation instructions are re-materializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35161 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:09:02 +00:00
Evan Cheng
e2e9e44d8f
Added isReMaterializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35160 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 06:22:07 +00:00
Evan Cheng
04677a3b49
Recognize target instruction flag 'isReMaterializable'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35159 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 06:20:37 +00:00
Evan Cheng
5d5c93f659
Add a TargetInstrDescriptor flag to mark an instruction as "re-materializable".
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It means the instruction can be easily re-materialized at any point. e.g.
constant generation, load from constantpool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35158 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 06:19:16 +00:00
Zhou Sheng
fdcd5a7740
Add isStrictPositive() to APInt to determine if this APInt Value > 0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35156 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 05:22:18 +00:00
Evan Cheng
79b098445b
Minor bug fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 04:22:35 +00:00
Chris Lattner
d435dbcbf9
fix a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35152 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:39:32 +00:00
Chris Lattner
12779797f7
add PR#
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35151 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:17:19 +00:00
Chris Lattner
8bf9911932
implement the next chunk of SROA with memset/memcpy's of aggregates. This
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implements Transforms/ScalarRepl/memset-aggregate-byte-leader.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35150 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:16:43 +00:00
Chris Lattner
fb73d9cf0c
add pr#
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35149 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:15:43 +00:00
Chris Lattner
7863a63bb9
new testcase
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35148 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:11:30 +00:00
Chris Lattner
7829828c4b
testcase for SROA with memset etc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35147 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:09:00 +00:00
Nick Lewycky
3f64b1ab1d
Clean up this code and fix subtract miscompile.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:58:46 +00:00
Chris Lattner
318bf7963a
Implement InstCombine/and-xor-merge.ll:test[12].
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Rearrange some code to simplify it now that shifts are binops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35145 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:51:34 +00:00
Chris Lattner
296d7a778a
new testcase
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35144 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:50:57 +00:00
Chris Lattner
11a3a9d27d
minor updates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35143 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:41:33 +00:00
Nick Lewycky
7f4ba44f37
This is implemented. We now generate:
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entry:
icmp ugt i32 %x, 4 ; <i1>:0 [#uses=1]
br i1 %0, label %cond_true, label %cond_false
cond_true: ; preds = %entry
%tmp1 = tail call i32 (...)* @bar( i32 12 ) ; <i32> [#uses=0]
ret void
cond_false: ; preds = %entry
switch i32 %x, label %cond_true15 [
i32 4, label %cond_true3
i32 3, label %cond_true7
i32 2, label %cond_true11
i32 0, label %cond_false17
]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35142 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 14:37:20 +00:00
Evan Cheng
cf596c54d4
- Merge UsedBlocks info after two virtual registers are coalesced.
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- Use distance to closest use to determine whether to abort coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35141 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 09:05:55 +00:00
Evan Cheng
e951cd1647
Keep UsedBlocks info accurate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35140 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 09:02:31 +00:00