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Author SHA1 Message Date
Jakob Stoklund Olesen
203e0b17dd Precompute a bit vector of register sub-classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140827 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 00:10:40 +00:00
Jakob Stoklund Olesen
7dcaa5b0fb Order register classes topologically. 
All register classes are given a lower ID than their sub-classes.
Cliques are ordered alphabetically.

This will be used to simplify some sub-class operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140826 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 00:10:36 +00:00
Akira Hatanaka
a3defb07a0 Fill delay slot with useful instructions. Modified from Sparc's version of delay 
slot filler.

Patch by Reed Kotler at Mips Technologies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140825 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 23:52:13 +00:00
Bill Wendling
e00897c5a9 Create a machine basic block in the constant pool and retrieve the symbol for an MBB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140824 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 23:50:42 +00:00
Bill Wendling
4dd9b091cc Support creating a constant pool value for a machine basic block. 
This is used when we want to take the address of a machine basic block, but it's
not associated with a BB in LLVM IR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140823 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 23:48:44 +00:00
Nick Lewycky
48105286cb Fold two identical set lookups into one. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140821 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 23:40:12 +00:00
Jakob Stoklund Olesen
29f018cee6 Switch to ArrayRef<CodeGenRegisterClass*>. 
This makes it possible to allocate CodeGenRegisterClass instances
dynamically and reorder them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140816 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 22:28:37 +00:00
Dan Gohman
27e0666725 When eliminating unnecessary retain+autorelease on return values, 
handle the case where the retain is in a different basic block.
rdar://10210274.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140815 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 22:27:34 +00:00
Dan Gohman
597fece886 Don't eliminate objc_retainBlock calls on stack objects if the 
objc_retainBlock call is potentially responsible for copying
the block to the heap to extend its lifetime. rdar://10209613.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140814 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 22:25:23 +00:00
Jim Grosbach
026fa8782c Tidy up. Formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140810 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 21:43:01 +00:00
Nick Lewycky
5fa301bfa9 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140807 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 21:07:46 +00:00
Akira Hatanaka
c0be26909f Mips64 arithmetic and logical instructions with two source registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140806 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 20:37:56 +00:00
Eli Friedman
bb5a7442e3 Clean up uses of switch instructions so they are not dependent on the operand ordering. Patch by Stepan Dyatkovskiy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140803 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 20:21:17 +00:00
Devang Patel
0066f9290e Simplify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140789 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 17:06:40 +00:00
Devang Patel
a5ef699f41 Clarify comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140787 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 16:52:53 +00:00
Devang Patel
8d6c0fb979 Remove unnecessary and unused data member. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140786 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 16:48:44 +00:00
Devang Patel
7a50202be5 Cosmetic changes, as per Nick's review. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140785 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 16:46:47 +00:00
Duncan Sands
9a7d48ae67 Place this bracket according to the LLVM style. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140784 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 16:01:46 +00:00
Justin Holewinski
2097d702d4 PTX: Fix broken shared library build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140783 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 14:25:48 +00:00
Jakob Stoklund Olesen
92fb79b7a6 Expand the x86 V_SET0* pseudos right after register allocation. 
This also makes it possible to reduce the number of pseudo instructions
and get rid of the encoding information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140776 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 05:10:54 +00:00
NAKAMURA Takumi
13f4a6c940 Target/ARM: Unbreak! CMake! Build! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140774 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 03:32:49 +00:00
Jakob Stoklund Olesen
adcb634d85 Delete NEONMoveFix, now unused. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140773 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 02:56:45 +00:00
Jakob Stoklund Olesen
8bb3d3cb30 Use ExecutionDepsFix instead of NEONMoveFix. 
This enables NEON domain tracking across basic blocks, but should
otherwise do the same thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140772 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 02:48:41 +00:00
Andrew Trick
5219f86a0b typo + pasto 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140769 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 01:53:08 +00:00
Jakob Stoklund Olesen
cc84cda919 Remove NumImplicitOps which is now unused. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140767 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 01:47:36 +00:00
Andrew Trick
0c01bc385a LSR: rewrite inner loops only. 
Rewriting the entire loop nest now requires -enable-lsr-nested.
See PR11035 for some performance data.
A few unit tests specifically test nested LSR, and are now under a flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140762 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 01:33:38 +00:00
Andrew Trick
03b08764d2 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140761 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 01:31:48 +00:00
Andrew Trick
f47e870015 Fix build failures better. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140758 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 01:22:31 +00:00
Daniel Dunbar
7f3654db0c Fix build failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140755 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 01:14:42 +00:00
Bill Wendling
3511cedf36 Move to ISelLowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140754 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 01:13:55 +00:00
Justin Holewinski
d57c1bc0b6 PTX: Add new patterns for bitconvert and any_extend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140753 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 01:13:12 +00:00
Michael J. Spencer
75c4abacaa llvm-size: Apply Chris's code review fixes. 
This doesn't use formated_raw_ostream because it doesn't support the
functionality needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140751 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 00:59:18 +00:00
Eric Christopher
12eb3ad5d6 Use the local we already set up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140745 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 00:50:59 +00:00
Jakob Stoklund Olesen
3627a46293 Rewrite MachineInstr::addOperand() to avoid NumImplicitOps. 
The function needs to scan the implicit operands anyway, so no
performance is won by caching the number of implicit operands added to
an instruction.

This also fixes a bug when adding operands after an implicit operand has
been added manually.  The NumImplicitOps count wasn't kept up to date.

MachineInstr::addOperand() will now consistently place all explicit
operands before all the implicit operands, regardless of the order they
are added.  It is possible to change an MI opcode and add additional
explicit operands.  They will be inserted before any existing implicit
operands.

The only exception is inline asm instructions where operands are never
reordered.  This is because of a hack that marks explicit clobber regs
on inline asm as <implicit-def> to please the fast register allocator.
This hack can go away when InstrEmitter and FastIsel can add exact
<dead> flags to physreg defs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140744 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 00:40:51 +00:00
Daniel Dunbar
caf1912893 tblgen/ClangDiagnostics: Add support for split default warning "no-werror" and 
"show-in-system-header" bits, which I will be adding in Clang shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140741 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 00:29:04 +00:00
Jakob Stoklund Olesen
5cd4ee7770 Revert r140731, "Define classes for unary and binary FP instructions and use them to define" 
It broke the unit tests.  Please reapply with tests fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140735 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 23:59:28 +00:00
Evan Cheng
9b88d2d782 Tighten a ARM dag combine condition to avoid an identity transformation, which 
ends up introducing a cycle in the DAG.

rdar://10196296


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140733 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 23:16:31 +00:00
Akira Hatanaka
d42ca4607b Define classes for unary and binary FP instructions and use them to define 
multiclasses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140731 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 21:58:01 +00:00
Bill Wendling
cc8cf97be4 Have the SjLjEHPrepare pass do some more heavy lifting. 
Upon further review, most of the EH code should remain written at the IR
level. The part which breaks SSA form is the dispatch table, so that part will
be moved to the back-end.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140730 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 21:56:53 +00:00
Michael J. Spencer
7da52dd2fa Fix cast. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140726 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 21:24:44 +00:00
Eli Friedman
7d3e2b78c7 PR11033: Make sure we don't generate PCMPGTQ and PCMPEQQ if the target CPU does not support them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140723 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 21:00:25 +00:00
Michael J. Spencer
32a12ba8c0 Add llvm-size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140722 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 20:57:46 +00:00
Michael J. Spencer
13afc5eff2 Object: Add isSection{Data,BSS}. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140721 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 20:57:30 +00:00
Eli Friedman
f56dc281ce NULL cannot be portably used as the last argument to a function with __attribute((sentinel)), even though it usually works. Use (void*)0 instead. PR11002. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140720 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 20:41:50 +00:00
Bill Wendling
b18abd077e Perform the lowering only if there are invokes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140719 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 20:29:45 +00:00
Bill Wendling
39689c8154 Ahem...actually *add* the ARMSjLjLowering pass to the pass manager. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140718 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 20:29:28 +00:00
Eric Christopher
90d6ec5f14 Add a note on removing LLVMC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140715 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 19:47:28 +00:00
Devang Patel
d02c42bb85 Introduce llvm-cov. 
Add llvm-cov skeleton. It has initial support to read coverage info generated by GCOVProfiling.cpp. 
Today, you can do
prompt> clang a.c -ftest-coverage -fprofile-arcs -o a
prompt> ./a
prompt> llvm-cov -gcno a.gcno -gcda a.gcda 
a.c
 :	#include "a.h"
 :	
 :	int main() {
 :		int i = 0;
 :		if (i) {
1:			int j = 0;
1:			j = 1;
1:		} else {
 :			int k = 1;
 :			k = 2;
 :		}
1:		return 0;
 :	}
 :	
 :	




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140712 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 18:50:00 +00:00
Justin Holewinski
cfab2be391 PTX: Fix alignment logic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140709 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 18:24:58 +00:00
Akira Hatanaka
aa7579025f Rename predicate In32BitMode to NotFP64bit and add definition of IsFP64bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140705 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 18:11:19 +00:00