Commit Graph

106149 Commits

Author SHA1 Message Date
Hal Finkel
16fd27b2c3 Add scoped-noalias metadata
This commit adds scoped noalias metadata. The primary motivations for this
feature are:
  1. To preserve noalias function attribute information when inlining
  2. To provide the ability to model block-scope C99 restrict pointers

Neither of these two abilities are added here, only the necessary
infrastructure. In fact, there should be no change to existing functionality,
only the addition of new features. The logic that converts noalias function
parameters into this metadata during inlining will come in a follow-up commit.

What is added here is the ability to generally specify noalias memory-access
sets. Regarding the metadata, alias-analysis scopes are defined similar to TBAA
nodes:

!scope0 = metadata !{ metadata !"scope of foo()" }
!scope1 = metadata !{ metadata !"scope 1", metadata !scope0 }
!scope2 = metadata !{ metadata !"scope 2", metadata !scope0 }
!scope3 = metadata !{ metadata !"scope 2.1", metadata !scope2 }
!scope4 = metadata !{ metadata !"scope 2.2", metadata !scope2 }

Loads and stores can be tagged with an alias-analysis scope, and also, with a
noalias tag for a specific scope:

... = load %ptr1, !alias.scope !{ !scope1 }
... = load %ptr2, !alias.scope !{ !scope1, !scope2 }, !noalias !{ !scope1 }

When evaluating an aliasing query, if one of the instructions is associated
with an alias.scope id that is identical to the noalias scope associated with
the other instruction, or is a descendant (in the scope hierarchy) of the
noalias scope associated with the other instruction, then the two memory
accesses are assumed not to alias.

Note that is the first element of the scope metadata is a string, then it can
be combined accross functions and translation units. The string can be replaced
by a self-reference to create globally unqiue scope identifiers.

[Note: This overview is slightly stylized, since the metadata nodes really need
to just be numbers (!0 instead of !scope0), and the scope lists are also global
unnamed metadata.]

Existing noalias metadata in a callee is "cloned" for use by the inlined code.
This is necessary because the aliasing scopes are unique to each call site
(because of possible control dependencies on the aliasing properties). For
example, consider a function: foo(noalias a, noalias b) { *a = *b; } that gets
inlined into bar() { ... if (...) foo(a1, b1); ... if (...) foo(a2, b2); } --
now just because we know that a1 does not alias with b1 at the first call site,
and a2 does not alias with b2 at the second call site, we cannot let inlining
these functons have the metadata imply that a1 does not alias with b2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213864 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 14:25:39 +00:00
Aaron Ballman
e8d5c379ac Fixing an MSVC conversion warning about implicitly converting the shift results to 64-bits. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213863 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 14:24:59 +00:00
Chandler Carruth
6800393083 [Target] Teach the query interfaces for lowering of extloads and
truncstores to support EVTs and return expand for non-simple ones.

This makes them more consistent with the isLegal... query style methods
and makes using them simpler in many scenarios.

No functionality actually changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213860 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 12:20:53 +00:00
Hal Finkel
2c7c54c86c AA metadata refactoring (introduce AAMDNodes)
In order to enable the preservation of noalias function parameter information
after inlining, and the representation of block-level __restrict__ pointer
information (etc.), additional kinds of aliasing metadata will be introduced.
This metadata needs to be carried around in AliasAnalysis::Location objects
(and MMOs at the SDAG level), and so we need to generalize the current scheme
(which is hard-coded to just one TBAA MDNode*).

This commit introduces only the necessary refactoring to allow for the
introduction of other aliasing metadata types, but does not actually introduce
any (that will come in a follow-up commit). What it does introduce is a new
AAMDNodes structure to hold all of the aliasing metadata nodes associated with
a particular memory-accessing instruction, and uses that structure instead of
the raw MDNode* in AliasAnalysis::Location, etc.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213859 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 12:16:19 +00:00
NAKAMURA Takumi
a4abc43a56 Prune redundant libdeps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213857 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 11:45:27 +00:00
NAKAMURA Takumi
9d8661d666 Prune dependency to MC from each target disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213856 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 11:45:11 +00:00
NAKAMURA Takumi
4bc5f139cd [CMake] tools/lto: Prune redundant libdep(s).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213855 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 11:44:44 +00:00
NAKAMURA Takumi
0fe305de89 [CMake] LineEditorTests: Add Support to link_components.
Even if LLVMSupport is added in add_unittests, LLVMSupport may be here as consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213854 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 11:44:33 +00:00
Tilmann Scheller
d51310e486 [ARM] Make the assembler reject unpredictable pre/post-indexed ARM STRH instructions.
The ARM ARM prohibits STRH instructions with writeback into the source register. With this commit this constraint is now enforced and we stop assembling STRH instructions with unpredictable behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213850 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 09:55:46 +00:00
Daniel Sanders
25f4fcd8e0 [mips] Fix ll and sc instructions
Summary: The ll and sc instructions for r6 and non-r6 are misplaced. This patch fixes that.

Patch by Jyun-Yan You

Differential Revision: http://reviews.llvm.org/D4578


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213847 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 09:47:14 +00:00
Matt Arsenault
de929f8b7d R600: Match rcp node on pre-SI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213844 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 06:59:24 +00:00
Matt Arsenault
f303d037f2 R600: Fix LowerSDIV24
Use ComputeNumSignBits instead of checking for i8 / i16 which only
worked when AMDIL was lying about having legal i8 / i16.

If an integer is known to fit in 24-bits, we can
do division faster with float ops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213843 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 06:59:20 +00:00
Rafael Espindola
8971050012 Remove unused substitution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213839 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 04:09:04 +00:00
Duncan P. N. Exon Smith
117dff7bd2 IR: Fix comment from r213824
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213836 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 02:56:59 +00:00
NAKAMURA Takumi
f227bf3b26 Remove a stray semicolon. [-Wpedantic]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213833 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 02:11:24 +00:00
NAKAMURA Takumi
9fda421ee4 Update library dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213832 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 02:10:42 +00:00
Matt Arsenault
ba86db191d R600: Implement enableClusterLoads()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213831 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 02:10:17 +00:00
Kevin Qin
2daff76c05 [AArch64] Fix a bug generating incorrect instruction when building small vector.
This bug is introduced by r211144. The element of operand may be
smaller than the element of result, but previous commit can
only handle the contrary condition. This commit is to handle this
scenario and generate optimized codes like ZIP1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213830 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 02:05:42 +00:00
Jiangning Liu
1bc34d71b7 [AArch64] Disable some optimization cases for type conversion from sint to fp, because those optimization cases are micro-architecture dependent and only make sense for Cyclone. A new predicate Cyclone is introduced in .td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213827 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 01:29:59 +00:00
Filipe Cabecinhas
d28cfd150b Fixed PR20411 - bug in getINSERTPS()
When we had a vector_shuffle where we had an input from each vector, we
could miscompile it because we were assuming the input from V2 wouldn't
be moved from where it was on the vector.

Added a test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213826 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 01:28:21 +00:00
Duncan P. N. Exon Smith
5092384bd3 IR: Add Value::sortUseList()
Add `Value::sortUseList()`, templated on the comparison function to use.

The sort is an iterative merge sort that uses a binomial vector of
already-merged lists to limit the size overhead to `O(1)`.

This is part of PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213824 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 00:53:19 +00:00
Reid Kleckner
ec6e535168 Add a VS "14" msbuild toolset
This allows people to try clang inside MSBuild with the VS "14" CTP
releases.

Fixes PR20341.

Patch by Marcel Raad!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213819 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 23:49:16 +00:00
Manman Ren
4cae9cb034 SimplifyCFG: fix a bug in switch to table conversion
We use gep to access the global array "switch.table", and the table index
should be treated as unsigned. When the highest bit is 1, this commit
zero-extends the index to an integer type with larger size.

For a switch on i2, we used to generate:
%switch.tableidx = sub i2 %0, -2
getelementptr inbounds [4 x i64]* @switch.table, i32 0, i2 %switch.tableidx

It is incorrect when %switch.tableidx is 2 or 3. The fix is to generate
%switch.tableidx = sub i2 %0, -2
%switch.tableidx.zext = zext i2 %switch.tableidx to i3
getelementptr inbounds [4 x i64]* @switch.table, i32 0, i3 %switch.tableidx.zext

rdar://17735071


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213815 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 23:13:23 +00:00
Rafael Espindola
48b8c128df Fix the build when building with only the ARM backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213814 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:54:28 +00:00
Rafael Espindola
b74b9541ac Document what backwards compatibility we provide for bitcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213813 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:43:22 +00:00
NAKAMURA Takumi
a25114b902 Let llvm/test/CodeGen/X86/avx512*-mask-op.ll(s) aware of Win32 x64 calling convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213812 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:38:25 +00:00
Eric Christopher
0bebd31dce Fix indenting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213811 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:34:13 +00:00
Chandler Carruth
1d73b6f8a6 [x86] Rip out some broken test cases for avx512 i1 store support.
It isn't reasonable to test storing things using undef pointers --
storing through those is at best "good luck" and really should be
transformed to "unreachable". Random changes in the combiner can
randomly break these tests for no good reason. I'm following up on the
original commit regarding the right long-term strategy here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213810 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:29:19 +00:00
Eric Christopher
ba08e46435 Reorganize and simplify local variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213809 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:27:10 +00:00
Rafael Espindola
34c5b5b952 Finish inverting the MC -> Object dependency.
There were still some disassembler bits in lib/MC, but their use of Object
was only visible in the includes they used, not in the symbols.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213808 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:26:07 +00:00
Juergen Ributzka
731c4f606a [RuntimeDyld][AArch64] Update relocation tests and also add a simple GOT test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213807 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:23:17 +00:00
Eric Christopher
3322b7eef1 Remove the query for TargetMachine and TargetInstrInfo since we're
already inside TargetInstrInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213806 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:12:03 +00:00
David Blaikie
ccd1035ad4 ArgPromo+DebugInfo: Handle updating debug info over multiple applications of argument promotion.
While the subprogram map cache used by Dead Argument Elimination works
there, I made a mistake when reusing it for Argument Promotion in
r212128 because ArgPromo may transform functions more than once whereas
DAE transforms each function only once, removing all the dead arguments
in one go.

To address this, ensure that the map is updated after each argument
promotion.

In retrospect it might be a little wasteful to create a map of all
subprograms when only handling a single CGSCC, but the alternative is
walking the debug info for each function in the CGSCC that gets updated.
It's not clear to me what the right tradeoff is there, but since the
current tradeoff seems to be working OK (and the code to keep things
updated is very cheap), let's stick with that for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213805 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:09:29 +00:00
David Blaikie
163a3f95f2 Test debug info in arg promotion with an actual promotion case, rather than a degenerate arg promotion that's actually DAE performed by ArgPromo
Also the debug location I had here was bogus, describing the location of
the call site as in the callee - and unnecessary, so just drop it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213803 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 21:30:59 +00:00
Jim Grosbach
8c0cf3e110 Use an explicit triple in testcase.
Make the test work better on non-darwin hosts. Hopefully.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213801 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 20:46:32 +00:00
Jim Grosbach
adb6a3649e [X86,AArch64] Extend vcmp w/ unary op combine to work w/ more constants.
The transform to constant fold unary operations with an AND across a
vector comparison applies when the constant is not a splat of a scalar
as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213800 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 20:41:43 +00:00
Jim Grosbach
4070037e3c X86: restrict combine to when type sizes are safe.
The folding of unary operations through a vector compare and mask operation
is only safe if the unary operation result is of the same size as its input.
For example, it's not safe for [su]itofp from v4i32 to v4f64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213799 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 20:41:38 +00:00
Jim Grosbach
df48c93ef0 DAG: fp->int conversion for non-splat constants.
Constant fold the lanes of the input constant build_vector individually
so we correctly handle when the vector elements are not all the same
constant value.

PR20394

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213798 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 20:41:31 +00:00
Justin Holewinski
2941802bad [NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213794 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 20:23:49 +00:00
Justin Holewinski
ce64168930 [NVPTX] Silence a GCC warning found by the buildbots
The cast to NVPTXTargetLowering was missing a 'const', but let's
just access the right pointer through the subtarget anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213793 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 20:23:47 +00:00
Mark Heffernan
d55c7c7f42 Do not add unroll disable metadata after unrolling pass for loops with #pragma clang loop unroll(full).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213789 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 20:05:44 +00:00
Juergen Ributzka
4fa6ecc26f [FastISel][AArch64] Fix return type in FastLowerCall.
I used the wrong method to obtain the return type inside FinishCall. This fix
simply uses the return type from FastLowerCall, which we already determined to
be a valid type.

Reduced test case from Chad. Thanks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213788 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 20:03:13 +00:00
Justin Holewinski
03f160f9d3 [NVPTX] mul.wide generation works for any smaller integer source types, not just the next smaller power of two
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213784 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 18:46:03 +00:00
Robert Khasanov
8b832c1c39 [SKX] Added missed test files for rev 213757
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213780 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 18:17:49 +00:00
Saleem Abdulrasool
e2c63ff3c9 AsmParser: remove deprecated LLIR support
linker_private and linker_private_weak were deprecated in 3.5.  Remove support
for them now that the 3.5 branch has been created.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213777 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 18:09:31 +00:00
Saleem Abdulrasool
58ba15dbe6 ExecutionEngine: remove a stray semicolon
Detected via GCC 4.8 [-Wpedantic].

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213776 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 18:09:28 +00:00
Robert Khasanov
f47bcb31e0 [SKX] Fix lowercase "error:" in rev 213757
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213774 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 17:42:13 +00:00
Justin Holewinski
6b50a7d179 [NVPTX] Make sure we do not generate MULWIDE ISD nodes when optimizations are disabled
With optimizations disabled, we disable the isel patterns for mul.wide; but we
were still generating MULWIDE ISD nodes.  Now, we only try to generate MULWIDE
ISD nodes in DAGCombine if the optimization level is not zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213773 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 17:40:45 +00:00
Mark Heffernan
e8d7ebcd5a In unroll pragma syntax and loop hint metadata, change "enable" forms to a new form using the string "full".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213772 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 17:31:37 +00:00
Alex Lorenz
b1365e35cc test commit: remove trailing space
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213770 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 17:18:05 +00:00