Jim Grosbach
24dda21705
Tidy up. One more return type mismatch fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149452 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 23:51:09 +00:00
Jim Grosbach
0c3cfefca6
Refactor loop for better readability.
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Excellent suggestion from Ben Kramer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149417 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 20:56:55 +00:00
Jim Grosbach
c73f42b540
Add explanatory comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149416 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 20:34:53 +00:00
Anton Korobeynikov
6edd5884c9
Cleanups for EABI standard functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149195 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-29 09:11:50 +00:00
Anton Korobeynikov
f349cb8f33
Use base AAPCS for varargs functions even for AAPCS-VFP CC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149194 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-29 09:06:09 +00:00
Bob Wilson
7750ff1e3c
Add a note about a potential optimization for clz/ctz patterns for ARM
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(and other targets).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149182 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-28 18:30:07 +00:00
James Molloy
2d8955a77c
Ensure .AliasedSymbol() is called on all uses of getSymbol(). Affects ARM and MIPS ELF backends.
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Fixes PR11877
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-28 15:58:32 +00:00
Jim Grosbach
6b4bcd69d0
Better user diagnostics for more ARM MachO relocation errors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-27 00:37:12 +00:00
Jim Grosbach
42e6bd38e0
Keep source information, if available, around for ARM Fixups.
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Adjust an example MachObjectWriter diagnostic to use the information
to issue a better message.
Before:
LLVM ERROR: unknown ARM fixup kind!
After:
x.s:6:5: error: unsupported relocation on symbol
beq bar
^
rdar://9800182
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149093 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 23:20:15 +00:00
Jim Grosbach
ef4d3ebe2a
Tidy up. Fix mismatched return types for error handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149062 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 15:56:45 +00:00
James Molloy
34982576a4
Add support for the R_ARM_TARGET1 relocation, which should be given to relocations applied to all C++ constructors and destructors.
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This enables the linker to match concrete relocation types (absolute or relative) with whatever library or C++ support code is being linked against.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 09:25:43 +00:00
Anton Korobeynikov
4a99f59aef
Properly emit ctors / dtors with priorities into desired sections
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and let linker handle the rest.
This finally fixes PR5329
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148990 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 22:24:19 +00:00
Jim Grosbach
74423e32ce
ARM assemly parsing and validation of IT instruction.
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"Although a Thumb2 instruction, the IT mnemonic shall be permitted in
ARM mode, and the condition verified to match the condition code(s)
on the following instruction(s)."
PR11853
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148969 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 19:52:01 +00:00
Jim Grosbach
a57a36abe7
NEON VLD4(all lanes) assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148884 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 00:01:08 +00:00
Jim Grosbach
6cd6a6824f
Tidy up. Rename VLD4DUP patterns for consistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148883 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 23:47:07 +00:00
Jim Grosbach
5e59f7e15e
NEON VLD3(all lanes) assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148882 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 23:47:04 +00:00
Jim Grosbach
88a54de799
NEON VST4(one lane) assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148836 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 18:53:13 +00:00
Owen Anderson
4f8dc7b17a
Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148833 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 18:37:29 +00:00
Jim Grosbach
e983a134e7
NEON VLD4(one lane) assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148832 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 18:37:25 +00:00
Jim Grosbach
1ac2060678
NEON Two-operand assembly aliases for VSRA.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148821 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 17:55:36 +00:00
Jim Grosbach
5e497d3992
NEON Two-operand assembly aliases for VSLI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148819 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 17:49:15 +00:00
Jim Grosbach
d8ee0cc4e8
NEON Two-operand assembly aliases for VSRI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148818 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 17:46:58 +00:00
Jim Grosbach
78d13e191e
NEON add correct predicates for some asm aliases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148815 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 17:23:29 +00:00
Anton Korobeynikov
46de2d5f5b
Use correct register class for am2offset register operands.
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This pacifies machine verifier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148782 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 04:58:56 +00:00
Jim Grosbach
539aab771f
NEON VST4(multiple 4 element structures) assembly parsing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148764 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 00:58:13 +00:00
Jim Grosbach
8abe7e3364
NEON VLD4(multiple 4 element structures) assembly parsing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148762 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 00:43:17 +00:00
Jim Grosbach
7945eade3d
Tidy up. Remove some vertical space for readability.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148761 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 00:43:12 +00:00
Chandler Carruth
3eb4be0ace
Revert r148686 (and r148694, a fix to it) due to a serious layering
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violation -- MC cannot depend on CodeGen.
Specifically, the MCTargetDesc component of each target is actually
a subcomponent of the MC library. As such, it cannot depend on the
target-independent code generator, because MC itself cannot depend on
the target-independent code generator. This change moved a flag from the
ARM MCTargetDesc file ARMMCAsmInfo.cpp to the CodeGen layer in
ARMException.cpp, leaving behind an 'extern' to refer back to it. That
layering order isn't viable givin the constraints outlined above.
Commandline flags are designed to be static specifically to avoid these
types of bugs.
Fixing this is likely going to require some non-trivial refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148759 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 00:30:17 +00:00
Jim Grosbach
7b426cee22
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 00:12:39 +00:00
Jim Grosbach
4adb182342
NEON VST3(single element from one lane) assembly parsing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148755 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 00:07:41 +00:00
Jim Grosbach
d7433e2873
NEON VST3(multiple 3-element structures) assembly parsing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148748 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 23:45:44 +00:00
Jim Grosbach
c387fc66bd
NEON VLD3(multiple 3-element structures) assembly parsing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148745 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 23:20:46 +00:00
Anton Korobeynikov
2c6d0f2625
Add missed mayStore flag to STREXD / t2STREXD
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148742 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 22:57:52 +00:00
Jim Grosbach
3a678af71d
NEON VLD3 lane-indexed assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148734 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 21:53:26 +00:00
Jim Grosbach
8b31f95bdd
Simplify some NEON assembly pseudo definitions.
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Let the generic token alias definitions handle the data subtype
suffices. We don't need explicit versions for each.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148718 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 19:39:08 +00:00
NAKAMURA Takumi
db4b85f532
ARMAsmPrinter.cpp: Try to fix up r148686. EnableARMEHABI was also here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148694 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 09:14:42 +00:00
Evgeniy Stepanov
7908480e4c
An option to selectively enable parts of ARM EHABI support.
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This change adds an new value to the --arm-enable-ehabi option that
disables emitting unwinding descriptors. This mode gives a working
backtrace() without the (currently broken) exception support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148686 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 07:57:39 +00:00
Anton Korobeynikov
4b4e62219b
Add fused multiple+add instructions from VFPv4.
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Patch by Ana Pazos!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148658 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-22 12:07:33 +00:00
Jim Grosbach
12a8863828
Thumb2 'add rd, pc, imm' alternate form for 'adr' instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148601 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-21 00:07:56 +00:00
David Blaikie
4d6ccb5f68
More dead code removal (using -Wunreachable-code)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 21:51:11 +00:00
Bob Wilson
1e9ccd68d4
ARM vector any_extends need to be selected to vmovl. <rdar://problem/10723651>
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We have patterns for vector sext and zext operations but were missing
anyext. Without those patterns, codegen will fail when the selection DAG
has any_extend nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148568 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 20:59:56 +00:00
Jim Grosbach
6d56730ab8
VST2 four-register w/ update pseudos for fixed/register update.
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rdar://10724489
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148560 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 19:16:00 +00:00
Jim Grosbach
51222d1551
NEON use vmov.i32 to splat some f32 values into vectors.
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For bit patterns that aren't representable using the 8-bit floating point
representation for vmov.f32, but are representable via vmov.i32, treat
the .f32 syntax as an alias. Most importantly, this covers the case
'vmov.f32 Vd, #0.0'.
rdar://10616677
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148556 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 18:09:51 +00:00
Benjamin Kramer
e545ee20f1
Silence warnings about mixing enums.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148495 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 21:11:13 +00:00
Evgeniy Stepanov
73dd8bbce3
Emit ARM EHABI unwinding instructions for 3 more Thumb instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148473 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 12:53:06 +00:00
Jim Grosbach
ae69f703d5
ARM assembly diagnostic caret in better position for FPImm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148459 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 02:47:30 +00:00
Jim Grosbach
9363c58dc2
Thumb2 relaxation for tADR to t2ADR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148456 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 02:09:38 +00:00
Jim Grosbach
d26bad079d
Add comment and fix range check in condition.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148455 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 01:50:30 +00:00
Evan Cheng
bca15f9c80
- Slight change to finalizeBundle() interface. LastMI is not exclusive (pointing
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to instruction right after the last instruction in the bundle.
- Add a finalizeBundle() variant that doesn't specify LastMI. Instead, the code
will find the last instruction in the bundle by following the 'InsideBundle'
marker. This is useful in case bundles are formed early (i.e. during MI
scheduling) but finalized later (i.e. after register allocator has finished
rewriting virtual registers with physical registers).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148444 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 00:46:06 +00:00
Evan Cheng
9b159710eb
Rename Finalizebundle to finalizeBundle to conform to coding guideline.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148440 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 00:06:10 +00:00