Commit Graph

117055 Commits

Author SHA1 Message Date
James Molloy
2605531fe8 Rip min/max pattern matching out of InstCombine and into
ValueTracking.

This matching functionality is useful in more than just InstCombine, so
make it available in ValueTracking.

NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236998 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 14:42:20 +00:00
Aaron Ballman
0a62359646 Amends r236990, because I failed at hitting "save" before commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236991 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 13:11:38 +00:00
Aaron Ballman
9ffcd1bdbd Replacing a range-based for loop with an old-style for loop. This code was previously causing a warning with MSVC about a compiler-generated local variable because TargetRegistry::begin() and end() are static member functions. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236990 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 13:10:17 +00:00
Aaron Ballman
fe78d295da Silencing an MSVC warning: '<<' : result of 32-bit shift implicitly converted to 64 bits (was 64-bit shift intended?); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236987 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 12:45:53 +00:00
Adam Nemet
beb74d3cf7 [Testsuite] Renumber metadata in ScopedNoAliasAA test to match CHECK lines
Summary:
Now it's much easier to follow what's happening in this test.

Also removed some unused metadata entries.

Reviewers: hfinkel

Reviewed By: hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9601

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236981 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 09:10:14 +00:00
Elena Demikhovsky
63df7cd4ea AVX-512: Changed CC parameter in "cmp" intrinsic
from i8 to i32 according to the Intel Spec

by Igor Breger (igor.breger@intel.com)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236979 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 09:03:14 +00:00
Adam Nemet
d6a9af6fd3 [Docs] Fix scoped noalias example
Summary:
As far as I understand the entire point of this example is to show that
if noalias is not a superset/equal to the alias.scope list on a scope
domain then load could reference locations that the store is not known
to not-alias i.e may alias.

Reviewers: hfinkel

Reviewed By: hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9598

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236977 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 08:30:28 +00:00
Hal Finkel
cdd4737be8 [InstCombine/PowerPC] Fix single-precision QPX load/store replacement
The QPX single-precision load/store intrinsics have implied
truncation/extension from/to the declared value type of <4 x double> to the
memory type of <4 x float>. When we can prove the alignment of the pointer
argument, and thus replace the intrinsic with a regular load or store, we need
to load or store the correct data type (<4 x float>) instead of (<4 x double>).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236973 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 06:37:03 +00:00
Elena Demikhovsky
a08590e2dc Fixed compilation warning, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236972 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 06:23:41 +00:00
Elena Demikhovsky
8189eb4d7e AVX-512: Added SKX instructions and intrinsics:
{add/sub/mul/div/} x {ps/pd} x {128/256} 2. max/min with sae

By Asaf Badouh (asaf.badouh@intel.com)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236971 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 06:05:05 +00:00
David Majnemer
73f2a7bbb2 Make buildbots happy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236970 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 05:33:27 +00:00
David Majnemer
c88eae46da [InstCombine] Canonicalize single element array store
Use the element type instead of the aggregate type.

Differential Revision: http://reviews.llvm.org/D9591

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236969 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 05:04:27 +00:00
David Majnemer
3101b1a432 [InstCombine] Canonicalize single element array load
Use the element type instead of the aggregate type.

Differential Revision: http://reviews.llvm.org/D9596

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236968 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 05:04:22 +00:00
Elena Demikhovsky
c7c44fa75e AVX-512: fixed UINT_TO_FP operation for 512-bit types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236955 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-10 14:23:52 +00:00
Simon Pilgrim
a0adcdb9ce [SelectionDAG] Fixed constant folding issue when legalised types are smaller then the folded type.
Found when testing with llvm-stress on i686 targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236954 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-10 14:14:51 +00:00
Ismail Pazarbasi
6c318f59b1 SanitizerCoverage: Use createSanitizerCtor to create ctor and call init
Second attempt; instead of using a named local variable, passing
arguments directly to `createSanitizerCtorAndInitFunctions` worked
on Windows.

Reviewers: kcc, samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8780

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236951 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-10 13:45:05 +00:00
Elena Demikhovsky
59a0fe6e3f AVX-512: fixed a bug in i1 vectors lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236947 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-10 10:33:32 +00:00
Saleem Abdulrasool
52a759a24f SystemZ: silence a GCC warning
warning: enumeral and non-enumeral type in conditional expression

Cast the 0 to the appropriate type.  NFC.  Identified by GCC 4.9.2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236942 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-10 00:53:41 +00:00
Tobias Grosser
fcae7eada1 Add polly support to sort_includes.py
Changes:
 -  Add "isl/" as a system library prefix. Even though isl is regularly
    imported into polly, it is still used like an external library.
 -  Add "json/" as a system library prefix. Polly uses json-cpp as external
    library.
 -  Distinguish between llvm and subproject libraries. Always sort subprojects
    before LLVM. This was already the case with clang, as 'clang' comes before
    'llvm', but we also want 'polly' to be sorted before 'llvm'.

The sorting of headers that are not part of Polly or isl remains unchanged.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236929 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-09 09:08:56 +00:00
NAKAMURA Takumi
31e094b55d llvm/test/CodeGen/AArch64/tailcall_misched_graph.ll: s/REQUIRE/REQUIRES/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236928 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-09 05:59:00 +00:00
James Y Knight
01d1787830 Fix MergeConsecutiveStore for non-byte-sized memory accesses.
The bug showed up as a compile-time assertion failure:
  Assertion `NumBits >= MIN_INT_BITS && "bitwidth too small"' failed
when building msan tests on x86-64.

Prior to r236850, this bug was masked due to a bogus alignment check,
which also accidentally rejected non-byte-sized accesses. Afterwards,
an invalid ElementSizeBytes == 0 got further into the function, and
triggered the assertion failure.

It would probably be a good idea to allow it to handle merging stores
of unusual widths as well, but for now, to un-break it, I'm just
making the minimal fix.

Differential Revision: http://reviews.llvm.org/D9626

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236927 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-09 03:13:37 +00:00
Tom Stellard
7d66bd3e7f MachineCSE: Add a target query for the LookAheadLimit heurisitic
This is used to determine whether or not to CSE physical register
defs.

Differential Revision: http://reviews.llvm.org/D9472

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236923 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-09 00:56:07 +00:00
Pete Cooper
f5b930b2e2 [Fast-ISel] Don't mark the first use of a remat constant as killed.
When emitting something like 'add x, 1000' if we remat the 1000 then we should be able to
mark the vreg containing 1000 as killed.  Given that we go bottom up in fast-isel, a later
use of 1000 will be higher up in the BB and won't kill it, or be impacted by the lower kill.

However, rematerialised constant expressions aren't generated bottom up.  The local value save area
grows downwards.  This means that if you remat 2 constant expressions which both use 1000 then the
first will kill it, then the second, which is *lower* in the BB will read a killed register.

This is the case in the attached test where the 2 GEPs both need to generate 'add x, 6680' for the constant offset.

Note that this commit only makes kill flag generation conservative.  There's nothing else obviously wrong with
the local value save area growing downwards, and in fact it needs to for handling arbitrarily complex constant expressions.

However, it would be nice if there was a solution which would let us generate more accurate kill flags, or just kill flags completely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236922 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-09 00:51:03 +00:00
Arnold Schwaighofer
68e53f68e6 Fix compile error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236921 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-09 00:10:25 +00:00
Quentin Colombet
4406c32c19 Revert r236912.
Author: dblaikie
Date: Fri May  8 17:47:50 2015
New Revision: 236912

URL: http://llvm.org/viewvc/llvm-project?rev=236912&view=rev
Log:
[opaque pointer type] Cleanup a few references to pointee types using nearby non-pointee types of the same value

& cleanup a convoluted return expression while I'm here


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236919 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-09 00:02:06 +00:00
Davide Italiano
275c111d9f [Target/ARM] Remove unused 'private' from class.
Differential Revision:	http://reviews.llvm.org/D9611
Reviewed by:	rengolin


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236918 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 23:58:28 +00:00
Arnold Schwaighofer
75e36e847e ScheduleDAGInstrs: In functions with tail calls PseudoSourceValues are not non-aliasing distinct objects
The code that builds the dependence graph assumes that two PseudoSourceValues
don't alias. In a tail calling function two FixedStackObjects might refer to the
same location. Worse 'immutable' fixed stack objects like function arguments are
not immutable and will be clobbered.

Change this so that a load from a FixedStackObject is not invariant in a tail
calling function and don't return a PseudoSourceValue for an instruction in tail
calling functions when building the dependence graph so that we handle function
arguments conservatively.

Fix for PR23459.

rdar://20740035

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236916 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 23:52:00 +00:00
David Blaikie
19d2499d6a [opaque pointer type] Cleanup a few references to pointee types using nearby non-pointee types of the same value
& cleanup a convoluted return expression while I'm here

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236912 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 22:47:50 +00:00
Kostya Serebryany
5ba2a0b8b0 [lib/Fuzzer] build tests that work well with dfsan also w/o dfsan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236909 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 21:45:19 +00:00
Kostya Serebryany
8ae273d380 [lib/Fuzzer] use -fsanitize-coverage=trace-cmp when building LLVM with LLVM_USE_SANITIZE_COVERAGE; in lib/Fuzzer try to reload the corpus to pick up new units from other processes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236906 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 21:30:55 +00:00
Hans Wennborg
262697d9d8 Switch lowering: cluster adjacent fall-through cases even at -O0
It's cheap to do, and codegen is much faster if cases can be merged
into clusters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236905 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 21:23:39 +00:00
Daniel Berlin
fd5c9868cb Add a comment about DepthFirstIterator's skipchildren behavior
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236904 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 21:17:24 +00:00
Renato Golin
a54f2b87f7 TargetParser: FPU/ARCH/EXT parsing refactory - NFC
This new class in a global context contain arch-specific knowledge in order
to provide LLVM libraries, tools and projects with the ability to understand
the architectures. For now, only FPU, ARCH and ARCH extensions on ARM are
supported.

Current behaviour it to parse from free-text to enum values and back, so that
all users can share the same parser and codes. This simplifies a lot both the
ASM/Obj streamers in the back-end (where this came from), and the front-end
parsers for command line arguments (where this is going to be used next).

The previous implementation, using .def/.h includes is deprecated due to its
inflexibility to be built without the backend support and for being too
cumbersome. As more architectures join this scheme, and as more features of
such architectures are added (such as hardware features, type sizes, etc) into
a full blown TargetDescription class, having a set of classes is the most
sane implementation.

The ultimate goal of this refactor both LLVM's and Clang's target description
classes into one unique interface, so that we can de-duplicate and standardise
the descriptions, as well as make it available for other front-ends, tools,
etc.

The FPU parsing for command line options in Clang has been converted to use
this new library and a number of aliases were added for compatibility:
 * A bogus neon-vfpv3 alias (neon defaults to vfp3)
 * armv5/v6
 * {fp4/fp5}-{sp/dp}-d16

Next steps:
 * Port Clang's ARCH/EXT parsing to use this library.
 * Create a TableGen back-end to generate this information.
 * Run this TableGen process regardless of which back-ends are built.
 * Expose more information and rename it to TargetDescription.
 * Continue re-factoring Clang to use as much of it as possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236900 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 21:04:27 +00:00
Diego Novillo
d4f7f29277 Update Function::getContext documentation. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236899 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 21:01:29 +00:00
Pete Cooper
f9f04c25b2 [Fast-ISel] Clear kill flags on registers replaced by updateValueMap.
When selecting an extract instruction, we don't actually generate code but instead work out which register we are reading, and rewrite uses of the extract def to the source register.  This is done via updateValueMap,.

However, its possible that the source register we are rewriting *to* to also have uses.  If those uses are after a kill of the value we are rewriting *from* then we have uses after a kill and the verifier fails.

This code checks for the case where the to register is also used, and if so it clears all kill on the from register.  This is conservative, but better that always clearing kills on the from register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236897 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 20:46:54 +00:00
Brendon Cahoon
74b576041a [Hexagon] Generate more hardware loops
Refactored parts of the hardware loop pass to generate
more. Also, added more tests.

Differential Revision: http://reviews.llvm.org/D9568


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236896 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 20:18:21 +00:00
Sanjoy Das
5de9960136 [BasicAA] Fix zext & sext handling
Summary:

There are several unhandled edge cases in BasicAA's GetLinearExpression
method. This changes fixes outstanding issues, including zext / sext of
a constant with the sign bit set, and the refusal to decompose zexts or
sexts of wrapping arithmetic.

Test Plan: Unit tests added in //q.ext.ll//.

Patch by Nick White.

Reviewers: hfinkel, sanjoy

Reviewed By: hfinkel, sanjoy

Subscribers: sanjoy, llvm-commits, hfinkel

Differential Revision: http://reviews.llvm.org/D6682

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236894 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 18:58:55 +00:00
David Blaikie
d3be0003c4 Replace branch-to-unreachable with assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236893 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 18:52:28 +00:00
Pat Gavlin
278c121d39 Fix a docs build break introduced by rL236888.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236891 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 18:37:49 +00:00
Pete Cooper
c2347d5cf1 [X86] Fast-ISel was incorrectly always killing the source of a truncate.
A trunc from i32 to i1 on x86_64 generates an instruction such as

%vreg19<def> = COPY %vreg9:sub_8bit<kill>; GR8:%vreg19 GR32:%vreg9

However, the copy here should only have the kill flag on the 32-bit path, not the 64-bit one.
Otherwise, we are killing the source of the truncate which could be used later in the program.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236890 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 18:29:42 +00:00
Pat Gavlin
5c7f7462e4 Extend the statepoint intrinsic to allow statepoints to be marked as transitions from GC-aware code to code that is not GC-aware.
This changes the shape of the statepoint intrinsic from:

  @llvm.experimental.gc.statepoint(anyptr target, i32 # call args, i32 unused, ...call args, i32 # deopt args, ...deopt args, ...gc args)

to:

  @llvm.experimental.gc.statepoint(anyptr target, i32 # call args, i32 flags, ...call args, i32 # transition args, ...transition args, i32 # deopt args, ...deopt args, ...gc args)

This extension offers the backend the opportunity to insert (somewhat) arbitrary code to manage the transition from GC-aware code to code that is not GC-aware and back.

In order to support the injection of transition code, this extension wraps the STATEPOINT ISD node generated by the usual lowering lowering with two additional nodes: GC_TRANSITION_START and GC_TRANSITION_END. The transition arguments that were passed passed to the intrinsic (if any) are lowered and provided as operands to these nodes and may be used by the backend during code generation.

Eventually, the lowering of the GC_TRANSITION_{START,END} nodes should be informed by the GC strategy in use for the function containing the intrinsic call; for now, these nodes are instead replaced with no-ops.

Differential Revision: http://reviews.llvm.org/D9501

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236888 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 18:07:42 +00:00
Jingyue Wu
c417f302cb [NoTTI] reject negative scale in addressing mode
Summary:
I noticed this bug when deubging a WIP on LSR. I wonder whether and how we
should add a regression test for this.

Test Plan: no tests failed.

Reviewers: atrick

Subscribers: hfinkel, llvm-commits

Differential Revision: http://reviews.llvm.org/D9536

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236887 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 18:07:24 +00:00
Pete Cooper
d90099d36c Clear kill flags on all used registers when sinking instructions.
The test here was sinking the AND here to a lower BB:

	%vreg7<def> = ANDWri %vreg8, 0; GPR32common:%vreg7,%vreg8
	TBNZW %vreg8<kill>, 0, <BB#1>; GPR32common:%vreg8

which meant that vreg8 was read after it was killed.

This commit changes the code from clearing kill flags on the AND to clearing flags on all registers used by the AND.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236886 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 17:54:32 +00:00
Pete Cooper
8eaf047588 80 cols fix since i'm looking at this function anyway. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 17:54:29 +00:00
Pete Cooper
aedc9c7f8c Remove duplicate cmake target I added in r236792.
Thanks to Daniel Jasper for pointing out the mistake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236881 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 16:59:53 +00:00
Douglas Katzman
58b44d65f9 Unbreak build: Makefile must have the same change as CMakeLists.txt
This was omitted from http://reviews.llvm.org/D9441
(the irony is that that was to detect omissions in something else)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236878 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 16:39:59 +00:00
Brendon Cahoon
7fd56b1e4a [Hexagon] Update AnalyzeBranch, etc target hooks
Improved the AnalyzeBranch, InsertBranch, and RemoveBranch
functions in order to handle more of our branch instructions.
This requires changes to analyzeCompare and PredicateInstructions.
Specifically, we've added support for new value compare jumps,
improved handling of endloop, added more compare instructions,
and improved support for predicate instructions.

Differential Revision: http://reviews.llvm.org/D9559


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236876 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 16:16:29 +00:00
Douglas Katzman
d7e20e7be8 Prevent further errors of omission when adding backend names.
Differential Revision: http://reviews.llvm.org/D9441

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236865 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 15:34:12 +00:00
Andrea Di Biagio
405e5f276b [X86] Teach 'getTargetShuffleMask' how to look through ISD::WrapperRIP when decoding a PSHUFB mask.
The function 'getTargetShuffleMask' already knows how to deal with PSHUFB nodes
where the mask node is a load from constant pool, and the constant pool node
is wrapped by a X86ISD::Wrapper node. This patch extends that logic by teaching
it how to also look through X86ISD::WrapperRIP.

This helps function combineX86ShufflesRecusively to combine more shuffle
sequences containing PSHUFB nodes if we are in RIPRel PIC mode.

Before this change, llc (with -relocation-model=pic -march=x86-64) was unable
to decode a pshufb where the mask was loaded from a constant pool. For example,
the no-op shuffle from test 'x86-fold-pshufb.ll' was not folded into its
operand, so instead of generating a single 'movaps' the backend always
generated a sub-optimal 'movdqa + pshufb' sequence.

Added test x86-fold-pshufb.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236863 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 15:11:07 +00:00
Jozef Kolek
5081399663 [mips][microMIPSr6] Implement ALUIPC and AUIPC instructions
This patch implements ALUIPC and AUIPC instructions using mapping.

Differential Revision: http://reviews.llvm.org/D8441


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236858 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 14:25:11 +00:00