Chris Lattner
2668959b88
Rename PowerPC*.h to PPC*.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23743 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:51:18 +00:00
Chris Lattner
ec4b73cb09
Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachine
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still should be merged into the PPC32TargetMachine class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23741 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:44:05 +00:00
Chris Lattner
f13befb456
Make the JIT default to the DAG isel instead of the pattern isel, like LLC.
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The Pattern isel has some strange memory corruption issues going on. :(
This should have been converted over anyway, but it got forgotten somehow
when switching to the dag isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23523 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-29 17:31:03 +00:00
Chris Lattner
5e8d2dc197
Move the post-lsr simplify cfg pass after lowereh, so it can clean up after
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eh lowering as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23459 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-27 00:14:41 +00:00
Chris Lattner
73e37c35be
turn on dag isel by default
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23226 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 19:53:54 +00:00
Jim Laskey
b1e1180ca0
1. Use SubtargetFeatures in llc/lli.
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2. Propagate feature "string" to all targets.
3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23192 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-01 21:38:21 +00:00
Nate Begeman
73bfa71524
Remove the X86 and PowerPC Simple instruction selectors; their time has
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passed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:53:15 +00:00
Chris Lattner
8482dd894d
add a beta option for turning on dag->dag isel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22837 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 19:33:30 +00:00
Chris Lattner
b0096bd19d
Turn loop strength reduction on by default.
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Only run createLowerConstantExpressionsPass for the simple isel. The DAG
isel has no need for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22794 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-15 23:47:04 +00:00
Nate Begeman
8f331325a2
Remove support for 64b PPC, it's been broken for a long time. It'll be
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back once a DAG->DAG ISel exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22778 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-13 05:59:16 +00:00
Chris Lattner
3c304a3ba1
Consolidate the GPOpt stuff to all use the Subtarget, instead of still
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depending on the command line option. Now the command line option just
sets the subtarget as appropriate. G5 opts will now default to on on
G5-enabled nightly testers among other machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22688 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-05 22:05:03 +00:00
Chris Lattner
4e624ecd07
don't crash when running the PPC backend on non-ppc hosts without specifying
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a subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22677 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-05 16:17:22 +00:00
Nate Begeman
3d72d14887
Use the new subtarget support to automatically choose the correct ABI
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and asm printer for PowerPC if one is not specified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22659 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-04 20:49:48 +00:00
Nate Begeman
8c00f8cdc7
Add Subtarget support to PowerPC. Next up, using it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22644 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-04 07:12:09 +00:00
Jeff Cohen
00b16889ab
Eliminate all remaining tabs and trailing spaces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-27 06:12:32 +00:00
Nate Begeman
2497e6391f
Support building non-PIC
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Remove the LoadHiAddr pseudo-instruction.
Optimization of stores to and loads from statics.
Force JIT to use new non-PIC codepaths.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22494 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-21 20:44:43 +00:00
Chris Lattner
2130c08930
revert to using 4-byte alignment for doubles, as specified by the ABI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22493 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-21 19:17:18 +00:00
Nate Begeman
adeb43ddf4
Generate mfocrf when targeting g5. Generate fsqrt/fsqrts when targetin g5.
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8-byte align doubles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22486 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-20 22:42:00 +00:00
Nate Begeman
a3fd400fa8
Integrate SelectFPExpr into SelectExpr. This gets PPC32 closer to being
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automatically generated from a target description.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22470 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-19 16:51:05 +00:00
Chris Lattner
0431c96cec
Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile
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interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22282 91177308-0d34-0410-b5e6-96231b3b80d8
2005-06-25 02:48:37 +00:00
Misha Brukman
b5f662fa03
Remove trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21425 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-21 23:30:14 +00:00
Nate Begeman
f8b02949e3
Make pattern isel default for ppc
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Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
0 == off
1 == on
2 == target default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21309 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-15 22:12:16 +00:00
Nate Begeman
d3e6b94020
Remove 64 bit simple ISel, it never worked correctly
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Add initial (buggy) implementation of 64 bit pattern ISel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21096 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05 08:51:15 +00:00
Nate Begeman
5e9666129a
Implement more of the PPC32 Pattern ISel:
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1) dynamic stack alloc
2) loads
3) shifts
4) subtract
5) immediate form of add, and, or, xor
6) change flag from -pattern-isel to -enable-ppc-pattern-isel
Remove dead arguments from getGlobalBaseReg in the simple ISel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20810 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-24 06:28:42 +00:00
Nate Begeman
a9795f81e9
Addition of the PPC32 Pattern ISel. While it is far from complete, it will
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be brought up to parity with the current simple ISel in the coming days.
Currently, -pattern-isel is required to trigger it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-24 04:41:43 +00:00
Chris Lattner
4318a3d0e9
cleanup the cfg after lsr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20410 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-02 21:56:00 +00:00
Chris Lattner
0c7490617a
Add a temporary option for llc-beta: -enable-lsr-for-ppc, which turns on
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Loop Strength Reduction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20399 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-02 06:19:22 +00:00
Chris Lattner
3ea78c4276
Use the target triple to pick this target.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18830 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-12 17:40:28 +00:00
Chris Lattner
9d0087e043
The LLVM bool type shall have 1 byte alignment on PPC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18311 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-28 21:16:45 +00:00
Chris Lattner
2a0c0dff0b
The JIT works enough
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18228 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-25 04:14:54 +00:00
Chris Lattner
05ad23711e
Remove this method.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18159 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 18:47:42 +00:00
Nate Begeman
dd30751654
Don't return value from void function. This is only temporary anyway while
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the JIT is made to work!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18155 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 10:04:49 +00:00
Chris Lattner
c9a6b1f4f6
Be really paranoid about not breaking stuff yet
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18152 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 06:56:18 +00:00
Chris Lattner
e4fce6f19c
Move JITInfo from PPCTM to PPC32TM
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18140 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 05:56:40 +00:00
Chris Lattner
1deb74d7ee
Remove this method, it's not clear how it could be implemented indep of 32 or 64-bit mode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18038 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 04:17:17 +00:00
Chris Lattner
097714b319
Disable the JIT until it can sorta kinda work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17230 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-25 20:53:41 +00:00
Chris Lattner
cbb9812d0d
bling bling!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16873 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-10 16:26:13 +00:00
Nate Begeman
ed42853be1
All PPC instructions are now auto-printed
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32 and 64 bit AsmWriters unified
Darwin and AIX specific features of AsmWriter split out
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16163 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-04 05:00:00 +00:00
Reid Spencer
551ccae044
Changes For Bug 352
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Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-01 22:55:40 +00:00
Chris Lattner
f908888553
Do not register ppc64 yet, as it breaks the SparcV9 backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15955 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-20 18:09:18 +00:00
Misha Brukman
983e92dc0d
LR needs to be saved at 16-byte offset on a 64-bit arch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15929 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 21:36:14 +00:00
Misha Brukman
66aa3e0e8b
No need for an `is64bit' flag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15857 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:06:47 +00:00
Nate Begeman
ca068e861b
Replace PowerPCPEI.cpp with target independant PrologEpilogInserter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15746 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 22:16:36 +00:00
Misha Brukman
f5f70685b6
Disable PPC64 backend by default because LLC cannot choose automatically between
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SparcV9 and PowerPC64 without target triples, since they are both 64-bit
big-endian targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15688 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 17:16:43 +00:00
Misha Brukman
1d3527edbf
* Move AIX into the llvm namespace to be accessed from RegisterInfo
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* Mark InstrInfo with 32 vs. 64 bit flag
* Enable the 64-bit isel and asm printer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15672 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 23:47:08 +00:00
Misha Brukman
9582822341
Hyphenate ##-bit and remove first-person from comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15663 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 13:35:44 +00:00
Nate Begeman
7a4fe9be7e
Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15662 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:40:04 +00:00
Misha Brukman
0145881cb9
Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15636 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 00:11:25 +00:00
Misha Brukman
7103fba019
CodePrinter -> AsmPrinter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15599 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-09 22:27:45 +00:00
Chris Lattner
3ea934668b
Changes commited for Nate Begeman:
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Use a PowerPC specific prolog epilog inserter to control where spilled
callee save regs are placed on the stack.
Get rid of implicit return address stack slot, save return address reg
(LR) in appropriate slot
Improve code generated for functions that don't have calls or access
globals
Note from Chris: PowerPCPEI will eventually be eliminated, once the
functionality is merged into CodeGen/PrologEpilogInserter.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15536 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-06 06:58:50 +00:00