Evan Cheng
292da949f6
If a livein is not used in the block. It's live through.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37764 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 18:47:28 +00:00
Evan Cheng
e47c333a12
Partial fix for PR1502: If a EH register is needed in a successor of landing pad, add it as livein to all the blocks in the paths between the landing pad and the specified block.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37763 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 18:45:32 +00:00
Dan Gohman
6595cb3000
Rename ("shrinkify") MVT::isExtendedValueType to MVT::isExtendedVT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37758 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 16:08:04 +00:00
Dan Gohman
8c8c5fcbd7
Use getVectorTypeBreakdown in FunctionLoweringInfo::CreateRegForValue
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to compute the number and type of registers needed for vector values
instead of computing it manually. This fixes PR1529.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37755 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 14:34:07 +00:00
Dan Gohman
89b20c07e9
Make the comment for ScalarizeVectorOp mention that it is only for use
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with single-element vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37752 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 14:06:22 +00:00
Duraid Madina
df82c93f2a
ok, this is something of a dirty hack, but it seems to work. (fixes e.g.
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the SPASS miscompilation)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37750 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 09:01:14 +00:00
Duraid Madina
b2efabd571
ok, this much doesn't seem to bork anything
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37749 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 08:31:07 +00:00
Duraid Madina
4e378c6504
revert evan's fixes (and my doofusness) since they had a huge code
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quality hit. will look at this soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37748 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 08:11:59 +00:00
Duraid Madina
669f7382be
pull evan's fixes - should help the nightly tester (but there are still
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some issues)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37747 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 07:07:13 +00:00
Evan Cheng
041040717d
Replace std::set with SmallPtrSet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37746 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 05:23:00 +00:00
Evan Cheng
75611fb4e6
Fix an obvious bug. Old code only worked for the entry block.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37743 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 01:16:36 +00:00
Evan Cheng
7ac19afbb1
Correctly handle implcit def / use operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37740 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-26 21:05:13 +00:00
Evan Cheng
4efe74129f
Properly handle kills of a physical register which has sub-registers that are read by later instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37739 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-26 21:03:35 +00:00
Duraid Madina
837a600a90
tidy this file up a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37725 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-26 00:21:58 +00:00
Duraid Madina
2e0930cf37
A bunch of fixes to the BigBlock allocator improve compile-time by ~20%
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and code quality by ~2% on my tests.
A big thank you to Roman Levenstein for this patch! See
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070618/050717.html
for more details.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37724 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25 23:46:54 +00:00
Dan Gohman
7f32156bb9
Generalize MVT::ValueType and associated functions to be able to represent
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extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.
This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25 16:23:39 +00:00
Dan Gohman
ea859be53c
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
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TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 14:59:07 +00:00
Duraid Madina
a8c7682939
check in the BigBlock local register allocator
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37703 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 08:27:12 +00:00
Evan Cheng
0b2ce1fc19
std::set is really really terrible. Switch to SmallPtrSet to reduce compile time. For Duraid's example. The overall isel time is reduced from 0.6255 sec to 0.1876 sec.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37701 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 01:35:51 +00:00
Dan Gohman
2d74a318de
Tidy up ValueType names in comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37688 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-21 14:48:26 +00:00
Dan Gohman
b9f1019696
Rename TargetLowering::getNumElements and friends to
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TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number of elements for vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37687 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-21 14:42:22 +00:00
Evan Cheng
b13cdbd865
Xforms:
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(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))
(sub x, (select cc, 0, c)) -> (select cc, x, (sub, x, c))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37685 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-21 07:39:16 +00:00
Evan Cheng
9ffd340daf
Avoid if-converting simple block that ends with unconditional branch or fallthrough unless it branches / falls to the 'false' block. Not profitable, may end up increasing code size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37660 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 21:45:13 +00:00
Dan Gohman
b5bec2b6f6
Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration
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for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 14:13:56 +00:00
Chris Lattner
85ef254630
document and hide two options.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37651 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 05:47:49 +00:00
Dan Gohman
82a87a0172
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
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with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 01:48:05 +00:00
Evan Cheng
eaa91b0a1f
Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37643 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 01:26:51 +00:00
Chris Lattner
aeeccfc5b2
add isVarArg to CCState
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37640 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 00:11:09 +00:00
Evan Cheng
c4047a8e96
Fix some fragile code wrt CFG edge updating.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37634 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-18 22:44:57 +00:00
Evan Cheng
2bdb7d0cc8
Move CorrectExtraCFGEdges() from BranchFolding.cpp to a MachineBasicBlock method.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37633 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-18 22:43:58 +00:00
Chris Lattner
e10e6f7a36
make ComputeTopDownOrdering significantly faster and use less stack space
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by making it non-recursive
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37629 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-18 21:28:10 +00:00
Dan Gohman
7a0a4fc912
Make chain dependencies blue, in addition to being dashed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37626 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-18 15:30:16 +00:00
Evan Cheng
a1a878791b
Properly remove duplicate instructions as result of diamond if-conversion. Other bug fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37623 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-18 08:37:25 +00:00
Evan Cheng
e882fca902
Really turn if-converter loose:
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1. Consider all possible ifcvt cases at once. No longer restricted to bottom
up iterative approach.
2. Sort all possible cases based on a cost function. Perform the most profitable
ones first invalidate others that target the same blocks.
3. Fixed a number of bugs related to block duplication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37613 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-16 09:34:52 +00:00
Tanya Lattner
24e5aada7d
Codegen support (stripped out) for the annotate attribute.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37608 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-15 22:26:58 +00:00
Evan Cheng
a2acf840a7
Not every predicable block can be safely duplicated.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37607 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-15 21:18:05 +00:00
Chris Lattner
c2c28fc24c
Fix CodeGen/X86/inline-asm-x-scalar.ll:test4, by retaining regclass info
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for tied register constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37601 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-15 19:11:01 +00:00
Evan Cheng
bf9d02eaf6
MachineInstr::isPredicable() is no longer needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37599 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-15 19:06:07 +00:00
Duncan Sands
f40708223e
Workaround for PR1508.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37597 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-15 19:04:19 +00:00
Evan Cheng
9333545980
Extra edges are deleted later if needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37593 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-15 17:34:48 +00:00
Evan Cheng
2c8c3a4a0d
Allow small blocks to be duplicated to enable if-conversion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37590 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-15 07:36:12 +00:00
Evan Cheng
bc198eeba6
No really, clear predcessors states.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37581 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 23:34:09 +00:00
Evan Cheng
e37e24331c
If BB is predicated, invalidate its predecessor(s) which would if-convert it. It needs to be re-analyzed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37580 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 23:13:19 +00:00
Dan Gohman
51eaa86758
Rename MVT::getVectorBaseType to MVT::getVectorElementType.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37579 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 22:58:02 +00:00
Evan Cheng
b7c908bb81
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37577 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 21:26:08 +00:00
Dan Gohman
c101e95cb6
Add a target hook to allow loads from constant pools to be rematerialized, and an
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implementation for x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37576 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 20:50:44 +00:00
Evan Cheng
86ff296e63
Fix some stupid bugs that have effectively disabled if-conversion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37575 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 20:28:52 +00:00
Duncan Sands
ea632439d4
Only correctly lower exception handing intrinsics if exception handling is
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turned on. Likewise for scanning of invokes to mark landing pads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37570 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-13 16:53:21 +00:00
Dan Gohman
6595635175
Introduce new SelectionDAG node opcodes VEXTRACT_SUBVECTOR and
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VCONCAT_VECTORS. Use these for CopyToReg and CopyFromReg legalizing in
the case that the full register is to be split into subvectors instead
of scalars. This replaces uses of VBIT_CONVERT to present values as
vector-of-vector types in order to make whole subvectors accessible via
BUILD_VECTOR and EXTRACT_VECTOR_ELT.
This is in preparation for adding extended ValueType values, where
having vector-of-vector types is undesirable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37569 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-13 15:12:02 +00:00
Dan Gohman
2046e12f02
When creating CopyFromReg nodes, always use legal types. And use the
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correct types for the result vector, even though it is currently bitcasted
to a different type immediately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37568 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-13 14:55:16 +00:00