Commit Graph

1598 Commits

Author SHA1 Message Date
Matt Arsenault
29f97a6c46 R600/SI: Use v_madmk_f32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230149 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-21 21:29:10 +00:00
Matt Arsenault
c490f78e53 R600/SI: Try to use v_madak_f32
This is a code size optimization when the constant
only has one use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230148 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-21 21:29:07 +00:00
Matt Arsenault
9036390498 R600/SI: Don't crash when getting immediate operand size
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230147 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-21 21:29:04 +00:00
Matt Arsenault
dc9d5dcdd7 R600/SI: Fix mad*k definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230146 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-21 21:29:00 +00:00
Tim Northover
ca7e0787f0 CodeGen: convert CCState interface to using ArrayRefs
Everyone except R600 was manually passing the length of a static array
at each callsite, calculated in a variety of interesting ways. Far
easier to let ArrayRef handle that.

There should be no functional change, but out of tree targets may have
to tweak their calls as with these examples.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230118 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-21 02:11:17 +00:00
Matt Arsenault
16fc5e9c0f R600/SI: Remove v_sub_f64 pseudo
The expansion code does the same thing. Since
the operands were not defined with the correct
types, this has the side effect of fixing operand
folding since the expanded pseudo would never use
SGPRs or inline immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230072 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-20 22:10:45 +00:00
Matt Arsenault
bbb748eece R600: Use new fmad node.
This enables a few useful combines that used to only
use fma.

Also since v_mad_f32 apparently does not support denormals,
disable the existing cases that are custom handled if they are
requested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230071 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-20 22:10:41 +00:00
Michael Kuperstein
2b5910a767 Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229841 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 11:38:11 +00:00
Michael Kuperstein
23dd089d8f Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.

No functional change.

Differential Revision: http://reviews.llvm.org/D7065

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229831 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 09:01:04 +00:00
Eric Christopher
9a6b4219e2 Remove a few more calls to TargetMachine::getSubtarget from the
R600 port.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229804 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:10:55 +00:00
Eric Christopher
fde0733828 Grab the subtarget off of the machine function for the R600
asm printer and clean up a bunch of uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229803 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:10:53 +00:00
Eric Christopher
2b8ccbf2ad Remove the DisasmEnabled AsmPrinter variable and just look it
up on the subtarget where it's set anyhow than looking it up
2-3 times in the same place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229802 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:10:49 +00:00
Eric Christopher
b724ec6c13 80-column fixups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229789 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:15:33 +00:00
Marek Olsak
4f5a891372 R600/SI: Fix READLANE and WRITELANE lane select for VI
VOP2 declares vsrc1, but VOP3 declares src1.
We can't use the same "ins" if the operands have different names in VOP2
and VOP3 encodings.

This fixes a hang in geometry shaders which spill M0 on VI.
(BTW it doesn't look like M0 needs spilling and the spilling seems
duplicated 3 times)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229752 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 22:12:45 +00:00
Marek Olsak
2a0d0dedf0 R600/SI: Simplify verification of AMDGPU::OPERAND_REG_INLINE_C
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229751 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 22:12:41 +00:00
Marek Olsak
342d0d73c0 R600/SI: Remove explicit VOP operand checking
This should be handled by the OperandType checking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229750 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 22:12:37 +00:00
Tom Stellard
d0da9ebb0a R600/SI: Don't set isCodeGenOnly = 1 on all instructions
We only need to set this on pseudo instructions which won't
be used by the assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229689 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:17 +00:00
Tom Stellard
d1971ae8ba R600/SI: Add missing VOP1 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229688 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:15 +00:00
Tom Stellard
16b731f19f R600/SI: Add missing VOP2 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229687 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:14 +00:00
Tom Stellard
585290a32a R600/SI: Add definition for S_CBRANCH_G_FORK
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229686 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:13 +00:00
Tom Stellard
fc0347ac9c R600/SI: Add missing SOP1 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229685 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:11 +00:00
Tom Stellard
2ad48511fd R600/SI: Refactor SOP2 definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229684 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:09 +00:00
Matt Arsenault
333507b7af R600/SI: Rename dst encoding field to be consistent with docs
The docs call this vdst instead of just dst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229614 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:15:37 +00:00
Matt Arsenault
4fd9c8677c R600/SI: Consistently capitalize encoding field names
Some formats capitalized these, but most didn't. Change
them all to be consistently lowercase.

Now, non-encoding fields and convenience bits are capitalized.
Also remove weird looking empty line in some of the formats.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229613 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:15:35 +00:00
Matt Arsenault
85d96c94d6 R600/SI: Set noNamedPositionallyEncodedOperands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229612 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:15:32 +00:00
Matt Arsenault
abf19e5c1b R600/SI: Fix src1_modifiers for class instructions
src1 doesn't have modifiers, but the operand was missing
resulting in an encoding build error when all fields
are required.'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229611 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:15:30 +00:00
Matt Arsenault
5177e9551c R600/SI: Fix not setting clamp / omod for v_cndmask_b32_e64
Rename the multiclass since it now applies to the output
modifiers as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229610 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:15:27 +00:00
Matt Arsenault
b1beec140e R600: Fix operand encoding error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229609 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:10:42 +00:00
Matt Arsenault
76f78b9ac2 R600/SI: Fix encoding error from glc bit on VI SMRD instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229608 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:10:40 +00:00
Matt Arsenault
9e39c99180 R600/SI: Fix operand encoding for flat instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229607 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:10:37 +00:00
Matt Arsenault
642c65e2df R600/SI: Fix error from vdst on no return atomics
Set the ignored field to 0 so we can enable
noNamedPositionallyEncodedOperands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229606 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:10:35 +00:00
Matt Arsenault
2422768a8a R600/SI: Add missing offset operand to buffer bothen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229605 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:04:38 +00:00
Matt Arsenault
fe524d5902 R600/SI: Add missing soffset operand to global atomics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229604 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:04:35 +00:00
Matt Arsenault
a0abb2055a R600/SI: Fix brace identation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229603 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:04:31 +00:00
Tom Stellard
ec5b9ab433 R600/SI: Fix asam errors in SIFoldOperands
We were trying to fold into implicit uses, which led to out of bounds
access of the MCInstrDesc::OpInfo arrray.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229533 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 20:11:54 +00:00
Tom Stellard
7a7153e5ee R600/SI: Extend private extload pattern to include zext loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229507 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 16:36:00 +00:00
Benjamin Kramer
1a50a12b43 Prefer SmallVector::append/insert over push_back loops.
Same functionality, but hoists the vector growth out of the loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229500 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 15:29:18 +00:00
Andrew Trick
4f7d60c1ea AArch64: Safely handle the incoming sret call argument.
This adds a safe interface to the machine independent InputArg struct
for accessing the index of the original (IR-level) argument. When a
non-native return type is lowered, we generate the hidden
machine-level sret argument on-the-fly. Before this fix, we were
representing this argument as OrigArgIndex == 0, which is an outright
lie. In particular this crashed in the AArch64 backend where we
actually try to access the type of the original argument.

Now we use a sentinel value for machine arguments that have no
original argument index. AArch64, ARM, Mips, and PPC now check for this
case before accessing the original argument.

Fixes <rdar://19792160> Null pointer assertion in AArch64TargetLowering

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229413 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-16 18:10:47 +00:00
Aaron Ballman
66981fe208 Removing LLVM_DELETED_FUNCTION, as MSVC 2012 was the last reason for requiring the macro. NFC; LLVM edition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229340 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-15 22:54:22 +00:00
Matt Arsenault
8a44761afe R600/SI: Implement correct f64 fdiv
This version passes the OpenCL conformance test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229239 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 04:30:08 +00:00
Matt Arsenault
fd31a769ce R600/SI: Use complex operand folding for div_scale
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229238 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 04:24:28 +00:00
Matt Arsenault
9295d69bea R600/SI: Fix implicit vcc operand to v_div_fmas_*
This should allow finally fixing the f64 fdiv implementation.

Test is disabled for VI since there seems to be a problem with one
of the buffer load instructions on it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229236 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 04:22:00 +00:00
Matt Arsenault
f1b6c1f287 R600/SI: Fix schedule model for v_div_scale_{f32|f64}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229235 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 04:03:18 +00:00
Matt Arsenault
958cf585ce R600/SI: Really fix size of VReg_1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229234 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 03:54:32 +00:00
Matt Arsenault
b79a67d967 R600/SI: Rename encoding field to match docs for VOP3b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229233 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 03:54:29 +00:00
Matt Arsenault
abcfb2b907 R600/SI: Fix not encoding src2 for v_div_scale_{f32|f64}
This apparently got lost in the VI changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229230 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 03:40:35 +00:00
Matt Arsenault
124991cc67 R600/SI: Fix VOP3b encoding on VI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229228 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 03:02:23 +00:00
Matt Arsenault
e7ff4c1321 R600/SI: Fix phys reg copies in SIFoldOperands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229227 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 02:55:57 +00:00
Matt Arsenault
9b6d620f89 R600/SI: Fix copies from SGPR to VCC
This shows up without optimizations when vcc is required
to be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229226 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 02:55:56 +00:00
Matt Arsenault
582d603f17 R600/SI: Add hack to copy from a VGPR to VCC
This hopefully should be fixed when VReg_1 is removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229225 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 02:55:54 +00:00