Andrey Churbanov
2cc396bfb0
Checking commit access; removed one space added in previous test checkin by Jim
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189673 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-30 14:40:24 +00:00
Benjamin Kramer
d7a178eee3
X86: Add a description of the Intel Atom Silvermont CPU.
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Currently this is just the atom model with SSE4.2 enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189669 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-30 14:05:32 +00:00
Craig Topper
a9080653c2
Fixup BZHI selection to remove an unneeded zero extension.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189656 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-30 07:16:16 +00:00
Craig Topper
74f269176f
Remove unused X86andn_flag node.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189654 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-30 07:06:26 +00:00
Craig Topper
b6ac30a155
Teach X86 backend to create BMI2 BZHI instructions from (and X, (add (shl 1, Y), -1)). Fixes PR17038.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189653 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-30 06:52:21 +00:00
Cameron Esfahani
441c557708
Clean up some usage of Triple. The base class has methods for determining if the target is iOS and Linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189604 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-29 20:23:14 +00:00
Elena Demikhovsky
4edfa2278a
AVX-512: added extend and truncate instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189580 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-29 11:56:53 +00:00
Kevin Enderby
e54726a87a
The darwin integrated assembler for X86 in 64-bit mode is not rejecting
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32-bit absolute addressing in instructions likei this:
mov $_f, %rsi
which is not supported in 64-bit mode.
rdar://8827134
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189543 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-29 00:19:03 +00:00
Elena Demikhovsky
2fb982aa72
AVX-512: added SQRT, VRSQRT14, VCOMISS, VUCOMISS, VRCP14, VPABS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189472 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-28 11:21:58 +00:00
Eric Christopher
6b6345f016
Remove support for the .debug_inlined section. No known software
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in use supports it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189439 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-28 04:04:28 +00:00
NAKAMURA Takumi
5be1752dcd
X86JITInfo.cpp: Apply x64 version of X86CompilationCallback() to Cygwin64.
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For now, (defined(X86_64_JIT) && defined(__CYGWIN__)) satisfies Cygwin64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189437 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-28 03:04:09 +00:00
NAKAMURA Takumi
6a15b6a269
X86Subtarget.h: Recognize x86_64-cygwin.
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In the LLVM side, x86_64-cygwin is almost as same as x86_64-mingw32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189436 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-28 03:04:02 +00:00
David Majnemer
7cde9d0286
[ms-inline asm] Support offsets after segment registers
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Summary: MASM let's you do stuff like 'MOV FS:20, EAX' and 'MOV EAX, FS:20'
Reviewers: craig.topper, rnk
Reviewed By: rnk
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D1470
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-27 21:56:17 +00:00
Elena Demikhovsky
d371d4f0f4
AVX-512: added conversion instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189349 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-27 13:54:04 +00:00
Elena Demikhovsky
1567abe74f
AVX-512: Added FMA instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189326 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-27 08:39:25 +00:00
Charles Davis
f69a29b23a
Revert "Fix the build broken by r189315." and "Move everything depending on Object/MachOFormat.h over to Support/MachO.h."
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This reverts commits r189319 and r189315. r189315 broke some tests on what I
believe are big-endian platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189321 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-27 05:38:30 +00:00
Charles Davis
9c3dd1b0d1
Move everything depending on Object/MachOFormat.h over to Support/MachO.h.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189315 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-27 05:00:43 +00:00
Elena Demikhovsky
92bfb54770
AVX-512: Added shuffle instructions -
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VPSHUFD, VPERMILPS, VMOVDDUP, VMOVLHPS, VMOVHLPS, VSHUFPS, VALIGN
single and double forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189215 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-26 12:45:35 +00:00
Craig Topper
318f4e679b
Make sure x86 instructions using ssmem/sdmem operand types are only able to parse memory operands of the proper size in Intel syntax. Primarily affects some of sse cvt instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189206 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-26 00:39:04 +00:00
Craig Topper
f0509f3637
Remove some unnecessary PredicateMethod overrides. Add RenderMethod overrides to remove forwarding in the X86AsmParser code itself. No functional change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189205 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-26 00:13:09 +00:00
Craig Topper
c648f85f7b
Put some of the AVX-512 parsing stuff in a more consistent place with the existing functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189204 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-25 23:18:05 +00:00
Craig Topper
a4959f3f6e
First round of fixes for the x86 fixes for the x86 move accumulator from/to memory offset instructions.
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-Assembly parser now properly check the size of the memory operation specified in intel syntax. So 'mov word ptr [5], al' is no longer accepted.
-x86-32 disassembly of these instructions no longer sign extends the 32-bit address immediate based on size.
-Intel syntax printing prints the ptr size and places brackets around the address immediate.
Known remaining issues with these instructions:
-Segment override prefix is not supported. PR16962 and PR16961.
-Immediate size should be changed by address size prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189201 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-25 22:23:38 +00:00
Elena Demikhovsky
41f7baf181
AVX-512: added UNPACK instructions and tests for all-zero/all-ones vectors
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189189 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-25 12:54:30 +00:00
Craig Topper
916f1a1470
Add hasSideEffects/mayLoad/mayStore flags to the X86 moffs8/moffs16/moffs32/moffs64 versions of move.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189182 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-24 20:31:14 +00:00
Craig Topper
f86778a848
Remove trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189178 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-24 19:50:11 +00:00
Rafael Espindola
4aa8bdaa46
Rename features to match what gcc and clang use.
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There is no advantage in being different and using the same names simplifies
clang a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189141 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-23 20:21:34 +00:00
Jim Cownie
f89c749870
Checking commit access; added one space
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189111 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-23 15:51:37 +00:00
Elena Demikhovsky
1765e74c15
AVX-512: Added masked SHIFT commands, more encoding tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189005 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-22 12:18:28 +00:00
Elena Demikhovsky
8ba76daba0
AVX-512: Added SHIFT instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188899 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 09:36:02 +00:00
Craig Topper
5bdf397e25
Synchronize VEX JIT encoding code with the MCJIT version. Fix a bug in the MCJIT code where CurOp was being incremented even if the operand it was pointing at wasn't used. Maybe only matters if there are any EVEX_K instructions that aren't VEX_4V.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188868 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 05:57:45 +00:00
Nadav Rotem
ec7b5e9290
In LLVM FMA3 operands are dst, src1, src2, src3, however dst is not encoded as it is always src1. This was causing the encoding of the operands to be off by one.
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Patch by Chris Bieneman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188866 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 05:03:10 +00:00
Craig Topper
33b5fe7f16
Rename mattr names for AVX-512 to from avx-512 -> avx512f, avx-512-pfi -> av512pf, avx-512-cdi -> avx512cd, avx-512-eri->avx512er. This matches better with official docs and what gcc patches appearto be using. I didn't touch the has* functions or the feature flag names to avoid change the td and lowering file while commits are still happening.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188859 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 03:57:57 +00:00
NAKAMURA Takumi
d5a2eb0925
X86TargetMachine.cpp: Clarify to emit GOT in i686-{cygming|win32}-elf for mcjit.
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I suppose all "lli -use-mcjit i686-*" should require GOT, (and to fail.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188856 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 02:37:25 +00:00
Elena Demikhovsky
38cd21a3e9
AVX-512: Added more patterns for VMOVSS, VMOVSD, VMOVD, VMOVQ
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188786 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-20 11:00:29 +00:00
Craig Topper
1299e49ba7
Fix formatting. No functional change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188746 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-20 05:23:59 +00:00
Craig Topper
3b7722cf3a
Add AVX-512 and related features to the CPUID detection code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188745 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-20 05:22:42 +00:00
Craig Topper
b5e1d5b46f
Move AVX and non-AVX replication inside a couple multiclasses to avoid repeating each instruction for both individually.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188743 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-20 04:24:14 +00:00
Elena Demikhovsky
f12df0ad50
AVX-512: added arithmetic and logical operations.
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ADD, SUB, MUL integer and FP types. OR, AND, XOR.
Added embeded broadcast form for these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188673 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-19 13:26:14 +00:00
Elena Demikhovsky
3491d67d3a
AVX-512: Added VMOVD, VMOVQ, VMOVSS, VMOVSD instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188637 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 13:08:57 +00:00
Craig Topper
ff79bc6e18
Make more of the lowering helpers static. Also use MVT instead of EVT in a couple places.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188629 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 08:53:01 +00:00
Craig Topper
0163356ad1
Don't use v16i32 for load pattern matching. All 512-bit loads are cated to v8i64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188534 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 06:07:34 +00:00
Bill Wendling
e427297997
Constify the function parameters.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188469 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-15 18:46:14 +00:00
Craig Topper
d36e1efa4b
Revert r188449 as it turns out we're just missing the instructions that need the v16i32/v16f32 matching.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188454 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-15 08:38:25 +00:00
Craig Topper
46ceaf4ba6
Don't let isPermImmMask handle v16i32 since VPERMI doesn't match on that type. Remove 128-bit vector handling from isPermImmMask too, it's covered by isPSHUFDMask.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188449 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-15 07:30:51 +00:00
Craig Topper
07ad0c4c99
Use MVT instead of EVT in X86ISelDAGToDAG since all the types should be legal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188446 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-15 05:57:07 +00:00
Craig Topper
8d725b9a03
Use MVT in place of EVT in more X86 operation lowering functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188445 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-15 05:33:45 +00:00
Craig Topper
5a0910b349
Replace getValueType().getSimpleVT() with getSimpleValueType(). Also remove one weird cast from MVT->EVT just to call getSimpleVT().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188441 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-15 02:33:50 +00:00
Craig Topper
35e194fbad
Make more helper methods into static functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188366 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 07:53:41 +00:00
Craig Topper
8971717313
Remove tab characters.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188365 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 07:35:18 +00:00
Craig Topper
158ec07008
Make some helper methods static.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188364 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 07:34:43 +00:00