Commit Graph

89925 Commits

Author SHA1 Message Date
Peter Collingbourne
2de6d3b20f Fix test by matching movaps instead of AVX-only vmovaps
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175914 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 19:53:30 +00:00
Peter Collingbourne
c4952bfc31 x86_64: designate most general purpose and SSE registers as callee save under coldcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175911 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 19:19:44 +00:00
Peter Collingbourne
e178c4f6f4 Revert "Test commit"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175910 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 19:19:41 +00:00
Peter Collingbourne
dc2a7005dd Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175909 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 19:18:15 +00:00
Benjamin Kramer
70c808f5b7 An Optional<T> is pod-like if the inner type is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175908 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 18:58:26 +00:00
Pete Cooper
b7eb78409c Remove unused CHECK lines copied from another test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175905 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 18:16:21 +00:00
Renato Golin
fd4af7d334 More tests to global struct vectorizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175898 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 16:18:31 +00:00
Pekka Jaaskelainen
45b2c25efb Made it more explicit that the self-referential llvm.loop identifier metadata
should be unique for each loop.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175888 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 12:03:07 +00:00
Michel Danzer
890dc92680 R600/SI: Add pattern for sign extension of i1 to i32.
16 more little piglits with radeonsi.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175887 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 11:22:58 +00:00
Michel Danzer
dd24703f95 R600/SI: Add pattern for logical or of i1 values.
24 more little piglits with radeonsi.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175886 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 11:22:54 +00:00
Michel Danzer
86f7e67db3 R600/SI: Add pattern for fceil.
9 more little piglits with radeonsi.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175885 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 11:22:49 +00:00
Kristof Beyls
29e05fe7a8 Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions.
The Printer will now print instructions with the correct alignment specifier syntax, like
    vld1.8  {d16}, [r0:64]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175884 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 10:01:33 +00:00
Bill Wendling
351b7a10e2 Use references to attribute groups on the call/invoke instructions.
Listing all of the attributes for the callee of a call/invoke instruction is way
too much and makes the IR unreadable. Use references to attributes instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175877 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 09:09:42 +00:00
Reed Kotler
00ddc5a727 Fix a nomenclature mistake. Slt->Slti in the functions. The "i" refers
to the immediate operand of sli or cmp function.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175865 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 05:59:39 +00:00
Reed Kotler
7617d032ae Expand mips16 SelT form pseudso/macros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175862 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 05:10:51 +00:00
Pete Cooper
b704ffbb46 Fix isa<> check which could never be true.
It was incorrectly checking a Function* being an IntrinsicInst* which
isn't possible.  It should always have been checking the CallInst* instead.

Added test case for x86 which ensures we only get one constant load.
It was 2 before this change.

rdar://problem/13267920

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175853 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 01:50:38 +00:00
Andrew Trick
667754e239 Remove code copied from GenRegisterInfo.inc.
There's no apparent reason this code was copied from generated source
into a .cpp. It sets a bad example for those working on other targets
and trying to understand the register info API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175849 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 01:15:08 +00:00
Eli Bendersky
46e0d1d58c Code cleanup: pass Offset by pointer to parseInstruction to more explicitly
convey that it's a INOUT argument.
Also, if parsing of entry instructions fails, don't push the entry.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175847 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 00:50:48 +00:00
Bill Wendling
bd2acfab4a Remove warning about default covering no cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175846 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 00:50:09 +00:00
Bill Wendling
d18e0b94bf Add a bitmask for NoBuiltin. This should *not* be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175843 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 00:40:12 +00:00
Bill Wendling
143d46476c Implement the NoBuiltin attribute.
The 'nobuiltin' attribute is applied to call sites to indicate that LLVM should
not treat the callee function as a built-in function. I.e., it shouldn't try to
replace that function with different code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175835 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22 00:12:35 +00:00
Cameron Zwarich
a931a12e04 Stop relying on physical register kill flags in isKilled() in the two-address
pass. One of the callers of isKilled() can cope with overapproximation of kills
and the other can't, so I added a flag to indicate this.

In theory this could pessimize code slightly, but in practice most physical
register uses are kills, and most important kills of physical registers are the
only uses of that register prior to register allocation, so we can recognize
them as kills even without kill flags.

This is relevant because LiveIntervals gets rid of all kill flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175821 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 22:58:42 +00:00
Eli Bendersky
7bf3d6a043 Previously, parsing capability of the .debug_frame section was added
to lib/DebugInfo, with dumping in llvm-dwarfdump. This patch adds
initial ability to parse and dump CFA instructions contained in
entries.

To keep it manageable, the patch omits some more advanced capabilities
(accounted in TODOs):

* Parsing of instructions with BLOCK arguments (expression lists)
* Dumping of actual instruction arguments (currently only names are
dumped). This is quite tricky since the dumper has to effectively
"interpret" the instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175820 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 22:53:19 +00:00
David Blaikie
0711d46a72 Limit cast machinery to preserve const and not accept temporaries
After cleaning up the following type hierarchies:
  * TypeLoc: r175462
  * SVal: r175594
  * CFGElement: r175462
  * ProgramPoint: r175812
that all invoked undefined behavior by causing a derived copy construction of a
base object through an invalid cast (thus supporting code that relied on
casting temporaries that were direct base objects) Clang/LLVM is now clean of
casts of temporaries. So here's some fun SFINAE machinery (courtesy of Eli
Friedman, with some porting back from C++11 to LLVM's traits by me) to cause
compile-time failures if llvm::cast & friends are ever passed an rvalue.

This should avoid a repeat of anything even remotely like PR14321/r168124.

Thanks to Jordan Rose for the help with the various Static Analyzer related
hierarchies that needed cleaning up, Eli for the SFINAE, Richard Smith, John
McCall, Ted Kremenek, and Anna Zaks for their input/reviews/patience along the
way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175819 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 22:48:34 +00:00
Renato Golin
e18bce5317 Allow GlobalValues to vectorize with AliasAnalysis
Storing the load/store instructions with the values
and inspect them using Alias Analysis to make sure
they don't alias, since the GEP pointer operand doesn't
take the offset into account.

Trying hard to not add any extra cost to loads and stores
that don't overlap on global values, AA is *only* calculated
if all of the previous attempts failed.

Using biggest vector register size as the stride for the
vectorization access, as we're being conservative and
the cost model (which calculates the real vectorization
factor) is only run after the legalization phase.

We might re-think this relationship in the future, but
for now, I'd rather be safe than sorry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175818 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 22:39:03 +00:00
Lang Hames
b489e29976 Re-apply r175688, with the changes suggested by Jakob in PR15320.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175809 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 22:16:43 +00:00
Chad Rosier
5e5529c74c Remove dead code and whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175804 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 21:40:51 +00:00
Pedro Artigas
633e24dc04 Clear the whole table including the tombstones, since the tombstone count will
be set to zero that is what it was intended. Should improve performance of 
the data structure when clear is invoked frequently (both compile time and
memory usage).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175799 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 21:32:00 +00:00
Eli Bendersky
700ed80d3d Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
to TargetFrameLowering, where it belongs. Incidentally, this allows us
to delete some duplicated (and slightly different!) code in TRI.

There are potentially other layering problems that can be cleaned up
as a result, or in a similar manner.

The refactoring was OK'd by Anton Korobeynikov on llvmdev.

Note: this touches the target interfaces, so out-of-tree targets may
be affected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 20:05:00 +00:00
Bill Wendling
fece442c69 Don't assert on empty attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175785 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 19:46:51 +00:00
Anshuman Dasgupta
6585d3b64b Hexagon: Expand cttz, ctlz, and ctpop for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175783 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 19:39:40 +00:00
Jakob Stoklund Olesen
601158a18e Make RAFast::UsedInInstr indexed by register units.
This fixes some problems with too conservative checking where we were
marking all aliases of a register as used, and then also checking all
aliases when allocating a register.

<rdar://problem/13249625>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175782 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 19:35:21 +00:00
Evan Cheng
b300455b58 Radar numbers don't belong in source code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175775 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 18:37:54 +00:00
Bill Schmidt
399eafb580 Trivial cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175771 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 17:26:05 +00:00
Paul Redmond
8f0696c7a7 add missing space which prevented the llvm.loop code-block from appearing in the
generated html.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175769 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 17:20:45 +00:00
Bill Schmidt
53b0b0e754 Large code model support for PowerPC.
Large code model is identical to medium code model except that the
addis/addi sequence for "local" accesses is never used.  All accesses
use the addis/ld sequence.

The coding changes are straightforward; most of the patch is taken up
with creating variants of the medium model tests for large model.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175767 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 17:12:27 +00:00
Lang Hames
f6c80bde65 Revert r175688 - It broke a test case (see PR15320).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175765 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 17:01:59 +00:00
Eli Bendersky
8389f24a66 getX86SubSuperRegister has a special mode with High=true for i64 which
exists solely to enable it to call itself for i8 with some registers.
The proposed patch simplifies the function somewhat to make the High
bit only meaningful for the i8 mode, which makes sense. No functional
difference (getX86SubSuperRegister is not getting called from anywhere
outside with i64 and High=true).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175762 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 16:40:18 +00:00
Benjamin Kramer
f31bd0f7d9 DAGCombiner: Make the post-legalize vector op optimization more aggressive.
A legal BUILD_VECTOR goes in and gets constant folded into another legal
BUILD_VECTOR so we don't lose any legality here. The problematic PPC
optimization that made this check necessary was fixed recently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175759 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:24:35 +00:00
Christian Konig
1484904807 R600/SI: inline V_ADD|SUB_F32 patterns
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175758 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:41 +00:00
Christian Konig
4fb98259b5 R600/SI: replace IMPLICIT_DEF with SIOperand.ZERO
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175757 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:36 +00:00
Christian Konig
1fbb3b3ce5 R600/SI: replace SI_V_CNDLT with a pattern
It actually fixes quite a bunch of piglit tests.

This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175756 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:32 +00:00
Christian Konig
664a061f81 R600/SI: use patterns for clamp, fabs, fneg
Instead of using custom inserters, it's simpler and
should make DAG folding easier.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175755 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:27 +00:00
Christian Konig
53f22df199 R600/SI: add all the other missing asm operands v2
v2: put implicit parameters in []

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175754 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:22 +00:00
Christian Konig
ee44118ef7 R600/SI: add the missing M*BUF|IMG asm operands
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175753 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:17 +00:00
Christian Konig
f17d0d6f80 R600/SI: add the missing S_* asm operands
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175752 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:13 +00:00
Christian Konig
b4dc10c8c5 R600/SI: rework VOP3 classes
Order the classes and add asm operands.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175751 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:09 +00:00
Christian Konig
7b3dab2673 R600/SI: simplify VOPC_* pattern v2
Fixing asm operation names.

v2: fix name of the e64 encoding, also add asm operands

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175750 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:04 +00:00
Christian Konig
477963aff4 R600/SI: rework VOP2_* pattern v2
Fixing asm operation names.

v2: use ZERO constant, also add asm operands

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175749 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:16:58 +00:00
Christian Konig
a38ccb4b32 R600/SI: rework VOP1_* patterns v2
Fixing asm operation names.

v2: use ZERO constant, also add asm operands

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175748 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:16:53 +00:00