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3070cd7e80
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7447 Commits

Author SHA1 Message Date
Anton Korobeynikov
3070cd7e80 Add TODO list for MSIL backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35244 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 21:48:59 +00:00
Anton Korobeynikov
099883f7eb Let the new backend begin! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35242 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 21:38:25 +00:00
Dale Johannesen
aceaf5d26e add generation of unnecessary push/pop around calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35241 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 21:16:39 +00:00
Nicolas Geoffray
82d4264c1f Protect R31's frame offset from being used by callee-saved registers, when R31 
is the frame pointer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35233 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 16:44:14 +00:00
Evan Cheng
768143547b Mark re-materializable instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35230 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 00:16:56 +00:00
Evan Cheng
a125cbe839 Updated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35229 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 22:32:39 +00:00
Dale Johannesen
8e59e163db do not share old induction variables when this would result in invalid 
instructions (that would have to be split later)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 21:54:54 +00:00
Lauro Ramos Venancio
64c88d741e bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted: 
mov lr, pc
    bx lr
So, the function was not called.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35218 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 17:57:23 +00:00
Evan Cheng
c70d1849b7 Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35207 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 08:11:30 +00:00
Evan Cheng
5603dcf21e New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35206 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 08:10:17 +00:00
Evan Cheng
bf2c8b3c96 Added MRegisterInfo hook to re-materialize an instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 08:09:38 +00:00
Chris Lattner
a16b7cb1d3 Two changes: 
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35204 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 06:08:29 +00:00
Chris Lattner
1719e13da0 fix indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35202 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 02:25:53 +00:00
Dale Johannesen
80dae195c7 fix obvious comment bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35196 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 00:30:56 +00:00
Evan Cheng
9f6636ff0c Fix naming inconsistencies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 07:48:02 +00:00
Evan Cheng
fa775d09c6 Special LDR instructions to load from non-pc-relative constantpools. These are 
rematerializable. Only used for constant generation for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 07:20:03 +00:00
Evan Cheng
a251570417 Constant generation instructions are re-materializable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35161 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 07:09:02 +00:00
Evan Cheng
e2e9e44d8f Added isReMaterializable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35160 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 06:22:07 +00:00
Chris Lattner
d435dbcbf9 fix a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35152 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 00:39:32 +00:00
Chris Lattner
11a3a9d27d minor updates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35143 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-18 22:41:33 +00:00
Nick Lewycky
7f4ba44f37 This is implemented. We now generate: 
entry:
        icmp ugt i32 %x, 4              ; <i1>:0 [#uses=1]
        br i1 %0, label %cond_true, label %cond_false

cond_true:              ; preds = %entry
        %tmp1 = tail call i32 (...)* @bar( i32 12 )             ; <i32> [#uses=0]
        ret void

cond_false:             ; preds = %entry
        switch i32 %x, label %cond_true15 [
                 i32 4, label %cond_true3
                 i32 3, label %cond_true7
                 i32 2, label %cond_true11
                 i32 0, label %cond_false17
        ]

...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35142 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-18 14:37:20 +00:00
Devang Patel
84f7fd2483 Support 'I' inline asm constraint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35129 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-17 00:13:28 +00:00
Lauro Ramos Venancio
368f20fda4 Only ARMv6 has BSWAP. 
Fix MultiSource/Applications/aha test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-16 22:54:16 +00:00
Bill Wendling
1b7a81d3ae And now support for MMX logical operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-16 09:44:46 +00:00
Evan Cheng
2770747216 Added isLegalAddressExpression(). Only allows X +/- C for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-16 08:43:56 +00:00
Bill Wendling
74027e98f1 Multiplication support for MMX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-15 21:24:36 +00:00
Evan Cheng
ba693005e9 Under X86-64 large code model, do not emit 32-bit pc relative calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35108 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 22:11:11 +00:00
Evan Cheng
4485d3897b Notes about codegen issues. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35107 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 21:03:53 +00:00
Evan Cheng
e70ef98043 Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35105 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 20:20:19 +00:00
Evan Cheng
774be29769 Oops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35104 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 19:44:58 +00:00
Evan Cheng
a19ac52863 X86-64 JIT is in large code model. Need stubs for direct calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35097 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 10:51:55 +00:00
Evan Cheng
8510dc086e x86-64 JIT stub codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35096 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 10:48:08 +00:00
Evan Cheng
5c0b61a64b Preliminary support for X86-64 JIT stub codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35095 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 10:44:30 +00:00
Evan Cheng
a13fd108f2 AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35088 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 21:05:54 +00:00
Evan Cheng
961f879ed8 Zero is always a legal AM immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35087 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 20:37:59 +00:00
Nicolas Geoffray
b2ec1cc6cb Stack and register alignment of call arguments in the ELF ABI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35083 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 15:02:46 +00:00
Evan Cheng
e8308df0b9 Implement getTargetLowering() or else LSR won't be using ARM specific hooks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35077 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 01:20:42 +00:00
Evan Cheng
b01fad6d19 Updated TargetLowering LSR addressing mode hooks for ARM and Thumb. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35075 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 23:30:29 +00:00
Evan Cheng
861939152d More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35074 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 23:29:01 +00:00
Evan Cheng
a8a155e77f More flexible TargetLowering LSR hooks for testing whether an immediate is 
a legal target address immediate or scale.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35073 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 23:28:50 +00:00
Evan Cheng
37e8856f74 Stupid bug: SSE2 supports v2i64 add / sub. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35070 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 22:58:52 +00:00
Bill Wendling
c1fb0473ed Adding more arithmetic operators to MMX. This is an almost exact copy of 
the addition. Please let me know if you have suggestions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35055 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-10 09:57:05 +00:00
Evan Cheng
1a9da0d66c Minor stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35049 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 19:46:06 +00:00
Evan Cheng
44f4fca3c0 Add comments about LSR / ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35048 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 19:35:33 +00:00
Evan Cheng
2265b49193 Unfinished work and ideas related to register scavenger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35047 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 19:34:51 +00:00
Dale Johannesen
818c085232 apply comments from review of last patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35045 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 19:18:59 +00:00
Dale Johannesen
a6bc6fc170 Add some observations from CoreGraphics benchmark. Remove register 
scavenging todo item, since it is now implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35044 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 17:58:17 +00:00
Evan Cheng
23a9570494 Implement inline asm modifier c. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35035 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 22:42:46 +00:00
Bill Wendling
2f88dcdfb3 Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that 
moves, loads, etc. are recognized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35031 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 22:09:11 +00:00
Evan Cheng
b582b1b1fc Fix a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35030 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 21:59:30 +00:00