Akira Hatanaka
8f3af87e99
Move class and instruction definitions for conditional moves to a seperate file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142220 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 18:43:19 +00:00
Akira Hatanaka
bdfd98a080
Redefine count-leading 0s and 1s instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142216 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 18:26:37 +00:00
Akira Hatanaka
89d306669e
Redefine mfhi/lo and mthi/lo instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142214 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 18:24:15 +00:00
Akira Hatanaka
f1fddcd9e0
Redefine multiply and divide instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142211 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 18:21:24 +00:00
Akira Hatanaka
2d0a61da62
Add definition of a base class for logical shift/rotate instructions with two
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source registers and redefine 32-bit and 64-bit instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142210 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 18:17:58 +00:00
Akira Hatanaka
363934665d
Add definition of a base class for logical shift/rotate immediate instructions
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and have 32-bit and 64-bit instructions derive from it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142207 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 18:06:56 +00:00
Akira Hatanaka
a01820a508
Add definition of immZExt5_64 and redefine immZExt5 as an ImmLeaf.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142205 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 18:01:00 +00:00
Akira Hatanaka
41f9a430cb
Define base class LogicNOR and make 32-bit and 64-bit NOR derive from it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141761 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 01:05:13 +00:00
Akira Hatanaka
6baabc1dd0
Fix encoding of 32-bit integer instructions. Change names of operands and nodes.
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Remove unused classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141757 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 00:56:06 +00:00
Akira Hatanaka
80eb994929
Change name of class to ArithOverflowR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141743 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 23:43:48 +00:00
Akira Hatanaka
2dfd3a9789
Define class ArithLogicI. Make 32-bit and 64-bit arithmetic and logical
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instructions with two register operands derive from it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141742 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 23:38:52 +00:00
Akira Hatanaka
76d9f1c022
Fix comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141737 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 23:12:12 +00:00
Akira Hatanaka
c2f3ac9de2
Define classes ArithLogicR and ArithLogicOfR and make 32-bit and 64-bit
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arithmetic and logical instructions with three register operands derive from
them. Fix instruction encoding too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141736 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 23:05:46 +00:00
Akira Hatanaka
d8212b2916
Remove unused PatLeaf.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141720 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 21:53:08 +00:00
Akira Hatanaka
395d76c5a3
Remove redundancy in setcc patterns using multiclass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141715 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 21:40:01 +00:00
Akira Hatanaka
b07a3d6897
Use sltiu instead of sltu when a register operand and immediate are compared.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 20:44:43 +00:00
Akira Hatanaka
06f8231bfb
Add patterns for conditional branches with 64-bit register operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141696 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 19:09:09 +00:00
Akira Hatanaka
8191f34797
Add support for 64-bit set-on-less-than instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141695 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 18:53:46 +00:00
Akira Hatanaka
3e3427a5c3
Add support for conditional branch instructions with 64-bit register operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141694 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 18:49:17 +00:00
Akira Hatanaka
1acb7df498
Make changes necessary for supporting floating point load and store instructions
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that have 64-bit pointers or access the 32 x 64-bit floating pointer register
file. Update functions in MipsInstrInfo.cpp too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 01:12:52 +00:00
Akira Hatanaka
7bd19bd519
Add definitions of 64-bit loads and stores. Add a patterns for unaligned
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zextloadi32 for which there is no corresponding pseudo or real instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141608 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:27:28 +00:00
Akira Hatanaka
d55bb38ddc
Change definitions of classes LoadM and StoreM in preparation for adding support
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for 64-bit load and store instructions. Add definitions of 64-bit memory operand
and 16-bit immediate operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141603 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:11:12 +00:00
Akira Hatanaka
cb518ee5dd
Add patterns for unaligned load and store instructions and enable the
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instruction selector to generate them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141471 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 02:24:10 +00:00
Akira Hatanaka
dda4a07cd8
Add support for 64-bit divide instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 21:06:13 +00:00
Akira Hatanaka
36787939b2
Add definitions of instructions which move values between 64-bit integer
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registers and 64-bit HI and LO registers. Fix encoding of the 32-bit versions
of the instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141015 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 19:28:44 +00:00
Akira Hatanaka
95934844e3
Preparation for adding simple Mips64 instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24 01:34:44 +00:00
Akira Hatanaka
40eda4626d
Make changes in instruction and pattern definitions so that tablegen does not
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complain it cannot infer types in patterns. Fix a mistake in definition of
SDT_MipsExtractElementF64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 23:31:54 +00:00
Akira Hatanaka
5663344127
Change the names of functions isMips* to hasMips*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140214 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 23:53:09 +00:00
Akira Hatanaka
a4b97f327d
Add pattern used to match MipsLo, which is needed when the instruction selector
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tries to match a dead MipsLo node (explanation in the link below).
http://article.gmane.org/gmane.comp.compilers.llvm.devel/42757/match=dagcombiner+dead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-13 20:13:58 +00:00
Akira Hatanaka
8ddf6531b8
Drop support for Mips1 and Mips2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139405 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09 20:45:50 +00:00
Bruno Cardoso Lopes
44d12eb998
Clenup and fix encoding for Mips ins and ext instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137943 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 16:30:49 +00:00
Akira Hatanaka
667645f814
Changed definition of EXT and INS per Bruno's comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137892 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:59:46 +00:00
Akira Hatanaka
511961a44c
Add support for half-word unaligned loads and stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137848 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 18:49:18 +00:00
Akira Hatanaka
bb15e117d3
Add support for ext and ins.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137804 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 02:05:42 +00:00
Akira Hatanaka
5c21c9e78e
Define unaligned load and store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137515 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 21:30:06 +00:00
Akira Hatanaka
1f8d822023
Add isIndirectBranch flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137351 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:05:37 +00:00
Akira Hatanaka
de9416e261
Change name of class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135550 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 00:53:09 +00:00
Akira Hatanaka
32b7ebb163
Define classes for definitions of atomic instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135546 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 00:23:01 +00:00
Akira Hatanaka
db54826f20
Lower memory barriers to sync instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 23:30:50 +00:00
Akira Hatanaka
0d7d0b5cb7
Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from
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moving them out of the loop. Previously, stores and loads to a stack frame
object were inserted to accomplish this. Remove the code that was needed to do
this. Patch by Sasa Stankovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135415 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 18:52:12 +00:00
Akira Hatanaka
78d62b2c7f
Remove unnecessary newline.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134645 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 22:06:18 +00:00
Akira Hatanaka
03236be44a
Rather than having printMemOperand change the way memory operands are printed
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based on a modifier, split it into two functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134637 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 20:54:20 +00:00
Akira Hatanaka
d3ac47f805
Reverse order of operands of address operand mem so that the base operand comes
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before the offset. This change will enable simplification of function
MipsRegisterInfo::eliminateFrameIndex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 18:57:00 +00:00
Akira Hatanaka
21afc63ea7
Re-apply 132758 and 132768 which were speculatively reverted in 132777.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-21 00:40:49 +00:00
Eric Christopher
6f3661fdcd
Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132777 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-09 16:03:19 +00:00
Akira Hatanaka
69b9044c66
Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of the
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dynamically allocated stack area was not set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132758 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-08 21:28:09 +00:00
Akira Hatanaka
6cd4b4e657
Add comments for wrapper node patterns in MipsInstrInfo.td.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132717 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-07 18:00:14 +00:00
Bruno Cardoso Lopes
4e694c96f1
This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,
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nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions.
The intrinsics are implemented by creating pseudo-instructions, which are
then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter.
Patch by Sasa Stankovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 02:54:07 +00:00
Bruno Cardoso Lopes
d979686bb4
This patch implements the thread local storage. Implemented are General
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Dynamic, Initial Exec and Local Exec TLS models.
Patch by Sasa Stankovic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 02:53:58 +00:00
Akira Hatanaka
342837d0dc
Define a wrapper node for target constant nodes (tglobaladdr, etc.).
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Need this to prevent emitting illegal conditional move instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132240 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-28 01:07:07 +00:00