Bruno Cardoso Lopes
34a491bd8e
Move SSE and AVX shuffle, unpack and compare code to more appropriate places
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106702 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 00:15:50 +00:00
Bill Wendling
4b722108e2
We are missing opportunites to use ldm. Take code like this:
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void t(int *cp0, int *cp1, int *dp, int fmd) {
int c0, c1, d0, d1, d2, d3;
c0 = (*cp0++ & 0xffff) | ((*cp1++ << 16) & 0xffff0000);
c1 = (*cp0++ & 0xffff) | ((*cp1++ << 16) & 0xffff0000);
/* ... */
}
It code gens into something pretty bad. But with this change (analogous to the
X86 back-end), it will use ldm and generate few instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106693 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 23:00:16 +00:00
Bruno Cardoso Lopes
e93e300ad0
Add AVX MOVMSK{PS,PD}rr instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106683 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 21:30:27 +00:00
Bruno Cardoso Lopes
428256b818
Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106678 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 21:10:57 +00:00
Eric Christopher
749bb7e2d9
Update according to feedback.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:49:35 +00:00
Bruno Cardoso Lopes
7dbfd07e32
Add AVX SHUF{PS,PD}{rr,rm} instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106672 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:07:15 +00:00
Nico Weber
50b9efc2a8
Add support for the x86 instructions "pusha" and "popa".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:00:58 +00:00
Dale Johannesen
e39fdbe118
Do not do tail calls to external symbols. If the
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branch turns out to be ARM-to-Thumb or vice versa
the linker cannot resolve this. 8120438.
If this optimization is going to be useful we probably
need a compiler flag "assume callees are same architecture"
or something like that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106662 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 18:52:34 +00:00
Daniel Dunbar
cbe762b5d1
Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 17:09:26 +00:00
Jim Grosbach
f1ab49e83a
The generic DAG combiner can now fold atomic fences when needed, so switch
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to using that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106633 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 16:25:07 +00:00
Jim Grosbach
5def57aaf4
When using libcall expansions for the atomic intrinsics, the explicit
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MEMBARRIER fences aren't necessary for ARM. Tell the combiner to fold them
away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106631 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 16:08:49 +00:00
Eric Christopher
18ebf74781
Update uses, defs, and comments for darwin tls patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106621 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 08:01:49 +00:00
Daniel Dunbar
d24c9d5f91
Revert r106066, "Create a more targeted fix for not sinking instructions into a range where it"... it causes bzip2 to be miscompiled by Clang.
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Conflicts:
lib/CodeGen/MachineSink.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 00:48:25 +00:00
Bruno Cardoso Lopes
62a76c6401
Add AVX compare packed instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106600 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 23:37:59 +00:00
Bruno Cardoso Lopes
0caca3967b
Reapply support for AVX unpack and interleave instructions, with
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testcases this time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106593 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 23:02:38 +00:00
Bruno Cardoso Lopes
c3d57b179c
Add AVX MOV{SS,SD}{rr,rm} instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 22:38:56 +00:00
Bill Wendling
19d8597bca
Fix the formatting of the switch statement and add a missing break.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106586 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 22:16:17 +00:00
Bob Wilson
a3a204664d
Thumb1 functions using @llvm.returnaddress were not saving the incoming LR.
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Radar 8031193.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106582 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 22:04:24 +00:00
Jim Grosbach
dd11ee2273
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106574 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 20:52:02 +00:00
Bruno Cardoso Lopes
d3a067bbc2
Reorganize logical and arithmetic SSE 1 & 2 instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106557 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 18:17:40 +00:00
Bruno Cardoso Lopes
f23919b3e9
Reorganize SSE instructions, making easier to see oportunities for refactoring
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106556 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 18:09:32 +00:00
Dan Gohman
fe60104ac9
Use pre-increment instead of post-increment when the result is not used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106542 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 15:08:57 +00:00
Evan Cheng
4d54e5b2dd
Tail merging pass shall not break up IT blocks. rdar://8115404
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106517 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 01:18:16 +00:00
Chris Lattner
ceea301c1d
make sure to initialize indent_level
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 00:40:26 +00:00
Chris Lattner
3284877064
add some support for blockaddress. This isn't really enough to be useful,
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but it will cover uses of blockaddress that are actually in a function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106502 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 23:19:36 +00:00
Chris Lattner
1018c24c13
eliminate a mutable global variable, use raw_ostream::indent instead of
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rolling our own.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106501 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 23:14:47 +00:00
Chris Lattner
7e6d7451ae
un-indent a huge amount of code out of an anonymous namespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106500 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 23:12:56 +00:00
Bruno Cardoso Lopes
c27d1e4d17
revert r106482
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106499 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 22:59:03 +00:00
Bruno Cardoso Lopes
b7cc3f6ae6
change parameter name to avoid confusion with global definition
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106486 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 21:28:07 +00:00
Bob Wilson
56a1a69a35
sign_extend_inreg needs to be expanded for pre-v6 Thumb as well as ARM.
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Radar 8104310.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106484 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 21:27:34 +00:00
Jim Grosbach
a967d1121a
LEApcrelJT shouldn't be marked as neverHasSideEffects, as we don't want it
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being moved around away from the jump table it references. rdar://8104340
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106483 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 21:27:27 +00:00
Bruno Cardoso Lopes
b44e8b2d11
Add unpack and interleave AVX instructions, encoding tests cooming soon
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106482 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 21:21:48 +00:00
Evan Cheng
d95ea2da28
Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores which have already been processed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106481 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 21:21:14 +00:00
Eric Christopher
be4e066ff9
Remove isTwoAddress from SystemZ.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106467 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 20:25:57 +00:00
Eric Christopher
c63a404d56
Remove isTwoAddress from Sparc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 20:22:35 +00:00
Eric Christopher
c452d79c43
Remove isTwoAddress from Mips.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106465 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 20:19:21 +00:00
Eric Christopher
b82a7ea1b2
Remove isTwoAddress from Blackfin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106457 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 20:13:37 +00:00
Eric Christopher
f704408bf7
Remove isTwoAddress from MSP430.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106455 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 20:07:30 +00:00
Eric Christopher
658ebcc7ec
Make 80-column.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106448 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 18:56:55 +00:00
Eric Christopher
90301312d5
Remove isTwoAddress from PIC16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106447 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 18:55:01 +00:00
Eric Christopher
4a232f0836
Remove isTwoAddress from XCore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106446 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 18:51:38 +00:00
Eric Christopher
23265d0054
Remove isTwoAddress from Alpha.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106445 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 18:48:55 +00:00
Bruno Cardoso Lopes
c79e43aee3
Move part of SSE 1 & 2 compare, shuffle and unpack instructions closely. Preparing them for refactoring and to the addition of their AVX forms
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106437 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 18:36:04 +00:00
Bruno Cardoso Lopes
59bb6fae9a
Add AVX regular (non-aliased ones) and,or,xor,andn packed instructions. They are already tested in the MC framework, no test needed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106436 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 18:22:54 +00:00
Dale Johannesen
b0ccb757b3
Fix PR 7433. Silly typo in non-Darwin ARM tail call
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handling, plus correct R9 handling in that mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106434 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 18:21:49 +00:00
Eric Christopher
18fb00b4b9
Add some codegen patterns for x86_64-linux-gnu tls codegen matching.
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Based on a patch by Patrick Marlier!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 18:21:27 +00:00
Jim Grosbach
9cfcfeb24b
early exit for dbg_value instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106430 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 17:49:23 +00:00
Chris Lattner
9e13715fd5
remove some dead variables reported by clang++
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106428 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 17:20:18 +00:00
Kalle Raiskila
951b229ccf
Mark the SPU 'lr' instruction to never have side effects.
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This allows the fast regiser allocator to remove redundant
register moves.
Update a set of tests that depend on the register allocator
to be linear scan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106420 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 15:08:16 +00:00
Kalle Raiskila
91fdee125c
Fix the lowering of VECTOR_SHUFFLE on SPU to handle splats.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106419 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 14:42:19 +00:00