Commit Graph

2532 Commits

Author SHA1 Message Date
Duncan Sands
4a307ecce6 Support for expanding the result of EXTRACT_ELEMENT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52621 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-23 15:08:15 +00:00
Duncan Sands
ab09b7e8f3 Cleanup up LegalizeTypes handling of loads and
stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52620 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-23 14:19:45 +00:00
Duncan Sands
69bfb15ecd Make custom lowering of ADD work correctly. This
fixes PR2476; patch by Richard Osborne.  The same
problem exists for a bunch of other operators, but
I'm ignoring this because they will be automagically
fixed when the new LegalizeTypes infrastructure lands,
since it already solves this problem centrally.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52610 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-22 09:42:16 +00:00
Dan Gohman
5686752099 Simplify some getNode calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52604 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-21 22:06:07 +00:00
Dan Gohman
2f1d3108e4 canClobberPhysRegDefs shouldn't called without checking hasPhysRegDefs;
check this with an assert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52603 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-21 22:05:24 +00:00
Dan Gohman
317adcc9c6 Use clear() to zero an existing APInt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52601 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-21 22:02:15 +00:00
Dan Gohman
8d96144b0e Remove a redundant return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52585 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-21 19:34:57 +00:00
Dan Gohman
94d7a5f815 Remove ScheduleDAG's SUnitMap altogether. Instead, use SDNode's NodeId
field, which is otherwise unused after instruction selection, as an index
into the SUnit array.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52583 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-21 19:18:17 +00:00
Dan Gohman
3627e34486 Add a priority queue class, which is a wrapper around std::priority_queue
and provides fairly efficient removal of arbitrary elements. Switch
ScheduleDAGRRList from std::set to this new priority queue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52582 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-21 18:35:25 +00:00
Duncan Sands
a1ace76c70 Support for load/store of expanded float types. I
don't know if a truncating store is possible here,
but added support for it anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52577 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-21 17:00:47 +00:00
Dan Gohman
4c8c83022b Change ScheduleDAG's SUnitMap from DenseMap<SDNode*, vector<SUnit*> >
to DenseMap<SDNode*, SUnit*>, and adjust the way cloned SUnit nodes are
handled so that only the original node needs to be in the map.
This speeds up llc on 447.dealII.llvm.bc by about 2%.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52576 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-21 15:52:51 +00:00
Dan Gohman
16c6859651 Simplify some template parameterization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52571 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-21 01:08:22 +00:00
Duncan Sands
78cd649ad3 Share some code that is common between integer and
float expansion (and sometimes vector splitting too).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52548 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-20 18:40:50 +00:00
Duncan Sands
4fc4fd657d Rename the operation of turning a float type into an
integer of the same type.  Before it was "promotion",
but this is confusing because it is quite different
to promotion of integers.  Call it "softening" instead,
inspired by "soft float".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52546 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-20 17:49:55 +00:00
Dan Gohman
3461cc9e98 Clean up some uses of std::distance, now that we have allnodes_size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52545 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-20 17:15:19 +00:00
Dan Gohman
ab8ec0a26c Teach ReturnInst lowering about aggregate return values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52522 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-20 01:29:26 +00:00
Dan Gohman
dded0fd398 Fix the index calculations for the extractvalue lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52517 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-20 00:54:19 +00:00
Dan Gohman
8f36f6d117 Simplify the ComputeLinearIndex logic and fix a few bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52516 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-20 00:53:00 +00:00
Evan Cheng
c8af52c898 ISD::UNDEF should be expanded recursively / iteratively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-19 22:01:11 +00:00
Duncan Sands
69b01e92a2 Split type expansion into ExpandInteger and ExpandFloat
rather than bundling them together.  Rename FloatToInt
to PromoteFloat (better, if not perfect).  Reorganize
files by types rather than by operations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52408 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-17 14:27:01 +00:00
Chris Lattner
ead0d88ad7 add a new -enable-value-prop flag for llcbeta, that enables propagation
of value info (sign/zero ext info) from one MBB to another.  This doesn't
handle much right now because of two limitations:

1) only handles zext/sext, not random bit propagation (no assert exists 
   for this)
2) doesn't handle phis.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52383 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-17 06:09:18 +00:00
Duncan Sands
a47c6c3703 Fix spelling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52381 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-17 03:24:13 +00:00
Duncan Sands
ad205a7687 Allow these transforms for types like i256 while
still excluding types like i1 (not byte sized)
and i120 (loading an i120 requires loading an i64,
an i32, an i16 and an i8, which is expensive). 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52310 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 08:14:38 +00:00
Duncan Sands
ec87aa87fe The transforms in visitEXTRACT_VECTOR_ELT are
not valid if the load is volatile.  Hopefully
all wrong DAG combiner transforms of volatile
loads and stores have now been caught.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52293 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-15 20:12:31 +00:00
Duncan Sands
7d0d846064 LegalizeTypes support for INSERT_VECTOR_ELT with
a non-constant index.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52292 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-15 20:00:14 +00:00
Duncan Sands
184a876ee6 Remove a redundant AfterLegalize check. Turn
on some code when !AfterLegalize - but since
this whole code section is turned off by an
"if (0)" it's not really turning anything on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52276 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-14 17:48:34 +00:00
Andrew Lenharth
507a58ac9b add missing atomic intrinsic from gcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52270 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-14 05:48:15 +00:00
Duncan Sands
d4b9c17fb7 Disable some DAG combiner optimizations that may be
wrong for volatile loads and stores.  In fact this
is almost all of them!  There are three types of
problems: (1) it is wrong to change the width of
a volatile memory access.  These may be used to
do memory mapped i/o, in which case a load can have
an effect even if the result is not used.  Consider
loading an i32 but only using the lower 8 bits.  It
is wrong to change this into a load of an i8, because
you are no longer tickling the other three bytes.  It
is also unwise to make a load/store wider.  For
example, changing an i16 load into an i32 load is
wrong no matter how aligned things are, since the
fact of loading an additional 2 bytes can have
i/o side-effects.  (2) it is wrong to change the
number of volatile load/stores: they may be counted
by the hardware.  (3) it is wrong to change a volatile
load/store that requires one memory access into one
that requires several.  For example on x86-32, you
can store a double in one processor operation, but to
store an i64 requires two (two i32 stores).  In a
multi-threaded program you may want to bitcast an i64
to a double and store as a double because that will
occur atomically, and be indivisible to other threads.
So it would be wrong to convert the store-of-double
into a store of an i64, because this will become two
i32 stores - no longer atomic.  My policy here is
to say that the number of processor operations for
an illegal operation is undefined.  So it is alright
to change a store of an i64 (requires at least two
stores; but could be validly lowered to memcpy for
example) into a store of double (one processor op).
In short, if the new store is legal and has the same
size then I say that the transform is ok.  It would
also be possible to say that transforms are always
ok if before they were illegal, whether after they
are illegal or not, but that's more awkward to do
and I doubt it buys us anything much.
However this exposed an interesting thing - on x86-32
a store of i64 is considered legal!  That is because
operations are marked legal by default, regardless of
whether the type is legal or not.  In some ways this
is clever: before type legalization this means that
operations on illegal types are considered legal;
after type legalization there are no illegal types
so now operations are only legal if they really are.
But I consider this to be too cunning for mere mortals.
Better to do things explicitly by testing AfterLegalize.
So I have changed things so that operations with illegal
types are considered illegal - indeed they can never
map to a machine operation.  However this means that
the DAG combiner is more conservative because before
it was "accidentally" performing transforms where the
type was illegal because the operation was nonetheless
marked legal.  So in a few such places I added a check
on AfterLegalize, which I suppose was actually just
forgotten before.  This causes the DAG combiner to do
slightly more than it used to, which resulted in the X86
backend blowing up because it got a slightly surprising
node it wasn't expecting, so I tweaked it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52254 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-13 19:07:40 +00:00
Duncan Sands
edfcf598fa Sometimes (rarely) nodes held in LegalizeTypes
maps can be deleted.  This happens when RAUW
replaces a node N with another equivalent node
E, deleting the first node.  Solve this by
adding (N, E) to ReplacedNodes, which is already
used to remap nodes to replacements.  This means
that deleted nodes are being allowed in maps,
which can be delicate: the memory may be reused
for a new node which might get confused with the
old deleted node pointer hanging around in the
maps, so detect this and flush out maps if it
occurs (ExpungeNode).  The expunging operation
is expensive, however it never occurs during
a llvm-gcc bootstrap or anywhere in the nightly
testsuite.  It occurs three times in "make check":
Alpha/illegal-element-type.ll,
PowerPC/illegal-element-type.ll and
X86/mmx-shift.ll.  If expunging proves to be too
expensive then there are other more complicated
ways of solving the problem.
In the normal case this patch adds the overhead
of a few more map lookups, which is hopefully
negligable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52214 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-11 11:42:12 +00:00
Dan Gohman
9ea3f56d07 Teach isGAPlusOffset to respect a GlobalAddressSDNode's offset
value, which is something that apparently isn't used much.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52158 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 22:05:52 +00:00
Dan Gohman
f5025cfa68 CodeGen support for aggregate-value function arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52156 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 21:19:23 +00:00
Duncan Sands
893076354a Various tweaks related to apint codegen. No functionality
change for non-funky-sized integers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52151 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 15:48:25 +00:00
Dan Gohman
8a6ccb5f73 Handle empty aggregate values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52150 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 15:21:47 +00:00
Duncan Sands
8eab8a2798 Remove some DAG combiner assumptions about sizes
of integer types.  Fix the isMask APInt method to
actually work (hopefully) rather than crashing
because it adds apints of different bitwidths.
It looks like isShiftedMask is also broken, but
I'm leaving that one to the APInt people (it is
not used anywhere).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52142 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 11:32:28 +00:00
Duncan Sands
8e4eb09b1e Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits.  Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-08 20:54:56 +00:00
Dan Gohman
1d685a46bf CodeGen support for insertvalue and extractvalue, and for loads and
stores of aggregate values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52069 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-07 02:02:36 +00:00
Owen Anderson
2d389e8ad7 Connect successors before creating the DAG node for the branch. This has
no visible functionality change, but enables a future patch where node creation
will update the CFG if it decides to create an unconditional rather than a conditional branch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52067 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-07 00:00:23 +00:00
Duncan Sands
3b3adbb745 Tighten up the abstraction slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52045 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 12:49:32 +00:00
Duncan Sands
83ec4b6711 Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 12:08:01 +00:00
Evan Cheng
fb4db316d8 Fix a memcpy lowering bug. Even though the memcpy alignment is smaller than the desired alignment, the frame destination alignment may still be larger than the desired alignment. Don't change its alignment to something smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51970 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-04 23:37:54 +00:00
Scott Michel
ba12f57ebe Fix spellnig error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51917 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-03 19:13:20 +00:00
Dan Gohman
33b625bee4 Fold adds and subtracts of zero immediately, instead of waiting
for dagcombine to do this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51886 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-02 22:27:05 +00:00
Scott Michel
8bf61e8c2a Add necessary 64-bit support so that gcc frontend compiles (mostly). Current
issue is operand promotion for setcc/select... but looks like the fundamental
stuff is implemented for CellSPU.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51884 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-02 22:18:03 +00:00
Dan Gohman
2830741866 Remove an unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51807 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-31 01:44:25 +00:00
Dan Gohman
493e03851d Remove an unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51721 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-30 00:56:36 +00:00
Dan Gohman
21323f3a82 Expand small memmovs using inline code. Set the X86 threshold for expanding
memmove to a more plausible value, now that it's actually being used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 19:42:22 +00:00
Evan Cheng
f26ffe987c Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 08:22:04 +00:00
Duncan Sands
43e2a03530 Fix some constructs that gcc-4.4 warns about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51591 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-27 11:50:51 +00:00
Dan Gohman
ee335e35ac Add #includes to make some dependencies explicit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51496 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-23 20:40:06 +00:00
Dan Gohman
a332f17c8c Generalize the new code in instcombine's ComputeNumSignBits for handling
and/or to handle more cases (such as this add-sitofp.ll testcase), and
port it to selectiondag's ComputeNumSignBits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51469 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-23 02:28:01 +00:00
Dan Gohman
4fa2a3f0ef Use isSingleValueType instead of isFirstClassType to
exclude struct and array types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51460 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-23 00:34:04 +00:00
Dan Gohman
c84941be0a Port the fix for the select operator from instcombine's
ComputeNumSignBits to SelectionDAG's ComputeNumSignBits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51348 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 20:59:51 +00:00
Dan Gohman
1fdfa6aabf Code simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51345 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 20:56:33 +00:00
Evan Cheng
446efddfcd If the result of a BIT_CONVERT is a v1* vector, it doesn't mean its source is a v1* vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51192 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-16 17:19:05 +00:00
Duncan Sands
419cafb9fb Silence the compiler warning differently. The
original method caused gcc-4.2 to complain.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51186 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-16 09:19:16 +00:00
Nate Begeman
b434513a20 Actually scalarize the operand to BIT_CONVERT instead of asking someone to do
something with a v1 type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51160 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15 20:40:58 +00:00
Dan Gohman
041e2eb517 IR support for extractvalue and insertvalue instructions. Also, begin
moving toward making structs and arrays first-class types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51157 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15 19:50:34 +00:00
Evan Cheng
f0df03134e Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15 08:39:06 +00:00
Evan Cheng
97e60d9e8c Use a better idiom to silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51131 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 21:08:07 +00:00
Evan Cheng
3521334467 Really silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51126 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 20:29:30 +00:00
Evan Cheng
b2031145e3 Really silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51123 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 20:26:35 +00:00
Evan Cheng
5087124721 Silence some compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51115 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 20:07:51 +00:00
Dan Gohman
d64a78c9ed When bit-twiddling CondCode values for integer comparisons produces
SETOEQ, is it does with (SETEQ & SETULE), map it to SETEQ.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51112 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 18:17:09 +00:00
Dan Gohman
9c78a39907 Whitespace cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51089 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 00:43:10 +00:00
Evan Cheng
77f0b7a50a Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
pshufd $1, (%rdi), %xmm0
        movd %xmm0, %eax
=>
        movl 4(%rdi), %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51026 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 08:35:03 +00:00
Dan Gohman
844731a7f1 Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51017 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 00:00:25 +00:00
Nate Begeman
0d1704b955 Teach Legalize how to scalarize VSETCC
Teach X86 a few more vsetcc patterns.  Custom lowering for unsupported ones is next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51009 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 23:09:43 +00:00
Evan Cheng
9bfa03c6fd Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 23:04:07 +00:00
Evan Cheng
ad4196b44a Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can make use of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50991 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 19:56:52 +00:00
Nate Begeman
b43e9c1965 Add support for vicmp/vfcmp codegen, more legalize support coming.
This is necessary to unbreak the build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50988 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 19:40:03 +00:00
Dan Gohman
9ab9ee8209 Fix a missing break in the ISD::FLT_ROUNDS_ handling. Patch by giuma!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50967 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 16:07:15 +00:00
Anton Korobeynikov
0b12ecf6ff Turn StripPointerCast() into a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50836 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-07 22:54:15 +00:00
Dan Gohman
42ac929ed9 Fix a bug in the ComputeMaskedBits logic for multiply.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50793 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-07 00:35:55 +00:00
Anton Korobeynikov
b04adddd50 Make StripPointerCast a common function (should we mak it method of Value instead?)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50775 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06 22:52:30 +00:00
Dan Gohman
4a3f6c8882 Make several variable declarations static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06 01:53:16 +00:00
Dan Gohman
54eed37131 Instead of enumerating each opcode that isn't handled that
ComputeMaskedBits handles, just use a 'default:'. This avoids
TargetLowering's list getting out of date with SelectionDAG's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50693 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06 00:53:29 +00:00
Dan Gohman
23e1df8b8d Correct the value of LowBits in srem and urem handling in
ComputeMaskedBits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06 00:51:48 +00:00
Mon P Wang
63307c335a Added addition atomic instrinsics and, or, xor, min, and max.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05 19:05:59 +00:00
Dan Gohman
1d9cd50677 Fix a mistake in the computation of leading zeros for udiv.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50591 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-02 21:30:02 +00:00
Dan Gohman
7ceda160b3 Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50562 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-02 00:05:03 +00:00
Dan Gohman
1fa850bdd2 Use push_back(...) instead of resize(1, ...), per review feedback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50561 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-02 00:03:54 +00:00
Dan Gohman
cba3b44d25 Fix uninitialized uses of the FPC variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50558 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-01 23:40:44 +00:00
Chris Lattner
6bf30ab347 don't randomly miscompile seto/setuo just because we are in
ffastmath mode.  This fixes rdar://5902801, a miscompilation
of gcc.dg/builtins-8.c.

Bill, please pull this into Tak.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50523 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-01 07:26:11 +00:00
Arnold Schwaighofer
30e62c098b Tail call optimization improvements:
Move platform independent code (lowering of possibly overwritten
arguments, check for tail call optimization eligibility) from
target X86ISelectionLowering.cpp to TargetLowering.h and
SelectionDAGISel.cpp.

Initial PowerPC tail call implementation:

Support ppc32 implemented and tested (passes my tests and
test-suite llvm-test).  
Support ppc64 implemented and half tested (passes my tests).
On ppc tail call optimization is performed if 
  caller and callee are fastcc
  call is a tail call (in tail call position, call followed by ret)
  no variable argument lists or byval arguments
  option -tailcallopt is enabled
Supported:
 * non pic tail calls on linux/darwin
 * module-local tail calls on linux(PIC/GOT)/darwin(PIC)
 * inter-module tail calls on darwin(PIC)
If constraints are not met a normal call will be emitted.

A test checking the argument lowering behaviour on x86-64 was added.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50477 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-30 09:16:33 +00:00
Scott Michel
82747a5484 Fix custom target lowering for zero/any/sign_extend: make sure that
DAG.UpdateNodeOperands() is called before (not after) the call to
TLI.LowerOperation().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50461 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-30 00:26:38 +00:00
Roman Levenstein
a0201d5204 Use std::set instead of std::priority_queue for the RegReductionPriorityQueue.
This removes the existing bottleneck related to the removal of elements from 
the middle of the queue.

Also fixes a subtle bug in ScheduleDAGRRList::CapturePred:
It was updating the state of the SUnit before removing it. As a result, the
comparison operators were working incorrectly and this SUnit could not be removed 
from the queue properly.

Reviewed by Evan and Dan. Approved by Dan.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50412 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29 09:07:59 +00:00
Chris Lattner
3fb2968f2f make the vector conversion magic handle multiple results.
We now compile test2/test3 to:

_test2:
	## InlineAsm Start
	set %xmm0, %xmm1
	## InlineAsm End
	addps	%xmm1, %xmm0
	ret
_test3:
	## InlineAsm Start
	set %xmm0, %xmm1
	## InlineAsm End
	paddd	%xmm1, %xmm0
	ret

as expected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50389 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29 04:48:56 +00:00
Chris Lattner
41f6259a4b add support for multiple return values in inline asm. This is a step
towards PR2094.  It now compiles the attached .ll file to:

_sad16_sse2:
	movslq	%ecx, %rax
	## InlineAsm Start
	%ecx %rdx %rax %rax %r8d %rdx %rsi
	## InlineAsm End
	## InlineAsm Start
	set %eax
	## InlineAsm End
	ret

which is pretty decent for a 3 output, 4 input asm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50386 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29 04:29:54 +00:00
Evan Cheng
33bf38ad88 Fix a bug in RegsForValue::getCopyToRegs() that causes cyclical scheduling units. If it's creating multiple CopyToReg nodes that are "flagged" together, it should not create a TokenFactor for it's chain outputs:
c1, f1 = CopyToReg                                                                                                                                                                                             
c2, f2 = CopyToReg                                                                                                                                                                                             
c3     = TokenFactor c1, c2                                                                                                                                                                                    
 ...                                                                                                                                                                                                                      
       = user c3, ..., f2

Now that the two CopyToReg's and the user are "flagged" together. They effectively forms a single scheduling unit. The TokenFactor is now both an operand and a successor of the Flagged nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50376 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 22:07:13 +00:00
Dan Gohman
187db7b950 Evan pointed out that folding sext to zext may not be correct
if the zext is not legal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50368 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 18:47:17 +00:00
Dan Gohman
ebc3a3a3b2 Delete an unused constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50367 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 18:28:49 +00:00
Dan Gohman
10a6b7ab65 Add a comment to CreateRegForValue that clarifies the handling of
aggregate types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50366 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 18:19:43 +00:00
Dan Gohman
0fe00906c8 Rewrite the comments for RegsForValue and its members, and
reorder some of the members for clarity.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50365 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 18:10:39 +00:00
Dan Gohman
b20d4f8d49 Don't call size() on each iteration of the loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50361 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 17:42:03 +00:00
Dan Gohman
1f13c686df Fix the SVOffset values for loads and stores produced by
memcpy/memset expansion. It was a bug for the SVOffset value
to be used in the actual address calculations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50359 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 17:15:20 +00:00
Dan Gohman
23e8b71526 Teach InstCombine's ComputeMaskedBits what SelectionDAG's
ComputeMaskedBits knows about cttz, ctlz, and ctpop. Teach
SelectionDAG's ComputeMaskedBits what InstCombine's knows
about SRem. And teach them both some things about high bits
in Mul, UDiv, URem, and Sub. This allows instcombine and
dagcombine to eliminate sign-extension operations in
several new cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50358 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 17:02:21 +00:00
Dan Gohman
8f0ad582e8 Teach DAGCombine to convert (sext x) to (zext x) when the
sign-bit of x is known to be zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50357 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 16:58:24 +00:00
Chris Lattner
6833b0601b Another collection of random cleanups. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50341 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 07:16:35 +00:00
Chris Lattner
b606dba13b Remove the SmallVector ctor that converts from a SmallVectorImpl. This
conversion open the door for many nasty implicit conversion issues, and
can be easily solved by initializing with (V.begin(), V.end()) when 
needed.

This patch includes many small cleanups for sdisel also.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50340 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 06:44:42 +00:00
Chris Lattner
8eaff0449c switch RegsForValue::Regs to be a SmallVector to avoid
heap thrash on tiny (usually single-element) vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50335 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 06:02:19 +00:00