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40fe18f66e
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13655 Commits

Author SHA1 Message Date
Kevin Enderby
40fe18f66e Fix the encoding of the movntdqa X86 instruction. It was missing the 0x66 
prefix which is part of the opcode encoding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95729 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:10:31 +00:00
Chris Lattner
5d672cfab0 Add ability for MCInstPrinters to add comments for instructions. 
Enhance the x86 backend to show the hex values of immediates in
comments when they are large.  For example:

        movl    $1072693248, 4(%esp)    ## imm = 0x3FF00000



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95728 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:10:18 +00:00
David Greene
51898d7a89 TableGen fragment refactoring. 
Move some utility TableGen defs, classes, etc. into a common file so
they may be used my multiple pattern files.  We will use this for
the AVX specification to help with the transition from the current
SSE specification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95727 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 23:52:19 +00:00
Johnny Chen
4814e711ab Add VBIF/VBIT for disassembly only. 
A8.6.279


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95713 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 23:05:23 +00:00
Daniel Dunbar
869fe12cc0 MC/X86: Add a dummy implementation of MCFixup generation for hacky X86 MCCodeEmitter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95709 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 23:00:03 +00:00
Daniel Dunbar
73c557458c MC: First cut at MCFixup, for getting fixup/relocation information out of an MCCodeEmitter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95708 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 22:59:55 +00:00
Johnny Chen
c9745049e6 Added VMRS/VMSR for disassembly only. 
A8.6.335 & A8.6.336


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95703 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 22:35:38 +00:00
Chris Lattner
a8168ec732 port encoder enhancements over to the new encoder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95699 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 21:57:34 +00:00
Chris Lattner
9e8528fc5c fix X86 encoder to output [disp] only addresses with no SIB byte 
in X86-32 mode.  This is still required in x86-64 mode to avoid
forming [disp+rip] encoding.  Rewrite the SIB byte decision logic
to be actually understandable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95693 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 21:47:19 +00:00
Chris Lattner
32f9a2c54e revert r95689: getX86RegNum(BaseReg) != N86::ESP is 
a confusing idiom to check for ESP or RSP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95690 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 21:21:26 +00:00
Chris Lattner
203efab2a5 simplify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95689 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 21:00:12 +00:00
Chris Lattner
518bb53485 move target-independent opcodes out of TargetInstrInfo 
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 19:54:29 +00:00
Jim Grosbach
4152778605 Radar 7417921 
tMOVCCi pattern only valid for low registers, as the Thumb1 mov immediate to
register instruction only works with low registers. Allowing high registers
for the instruction resulted in the assembler choosing the wide (32-bit)
encoding for the mov, but LLVM though the instruction was only 16 bits wide,
so offset calculations for constant pools became incorrect, leading to
out of range constant pool entries.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95686 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 19:51:37 +00:00
Johnny Chen
2d658df873 Added vcvtb/vcvtt (between half-precision and single-precision, VFP). 
For disassembly only.

A8.6.300


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95669 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 17:21:56 +00:00
Chris Lattner
97dce2a9aa move PR3462 to here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95650 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 05:55:14 +00:00
Chris Lattner
1728472726 add a note from PR6194 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95649 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 05:45:29 +00:00
Chris Lattner
e16b0fc3cb Implement x86 asm parsing support for %st and %st(4) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95634 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 00:49:22 +00:00
Chris Lattner
b8d6e98e56 pass stringref by value instead of by const& 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95627 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 00:34:28 +00:00
Chris Lattner
cf031f6d66 move PR6212 to this file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95624 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 00:11:10 +00:00
Chris Lattner
c133457269 this is done, tested by CodeGen/ARM/iabs.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95609 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 23:48:10 +00:00
Jim Grosbach
a87ded2695 tighten up eh.setjmp sequence a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95603 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 23:22:00 +00:00
Chris Lattner
3484110c67 unify the paths for external symbols and global variables: 
2 files changed, 48 insertions(+), 83 deletions(-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95599 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 23:03:41 +00:00
Chris Lattner
8fb2e233a0 switch the rest of the "@ concatentation" logic in the X86 
backend to use X86MCTargetExpr, simplifying a bunch of code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95595 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 22:52:47 +00:00
Sean Callanan
3bdbdd06c8 Fixed the AT&T AsmLexer to report the proper strings 
for register tokens.  Before, if it encountered
'%al,' it would report 'al,' as the token.  Now it
correctly reports '%al'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95594 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 22:50:23 +00:00
Chris Lattner
017ec35e28 switch ELF @GOTOFF references to use X86MCTargetExpr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95593 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 22:33:55 +00:00
Chris Lattner
25ceb5f317 add an x86 implementation of MCTargetExpr for 
representing @GOT and friends.  Use it for
personality references as a first use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95588 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 22:09:08 +00:00
Johnny Chen
15b423f772 Add VCVTR (between floating-point and integer, VFP) for disassembly purpose. 
The 'R' suffix means the to-integer operations use the rounding mode specified
by the FPSCR, encoded as Inst{7} = 0.

A8.6.295


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95584 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 22:02:41 +00:00
Dan Gohman
1797ed50f4 Rename the PerformTailCallOpt variable to GuaranteedTailCallOpt to reflect 
its current purpose.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95564 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 20:27:50 +00:00
Johnny Chen
7edd8e38c4 Add VCMP (VFP floating-point compare without 'E' bit set) for disassembly purpose. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95560 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 19:41:48 +00:00
Johnny Chen
23401d6f8c Added VMOVRRS/VMOVSRR to ARMInstrVFP.td for disassembly purpose. 
A8.6.331 VMOV (between two ARM core registers and two single-precision registers)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95548 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 17:26:09 +00:00
Torok Edwin
acf2a65786 Fix x86 JIT stub on MSVC. 
Thanks to Kristaps Straupe for noticing the bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95537 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 08:37:27 +00:00
Bruno Cardoso Lopes
6059b8551d Add suport for VASTART on Mips. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95506 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-06 21:00:02 +00:00
Bruno Cardoso Lopes
b37a742333 First step towards varargs support in Mips: 
- o32 cc must pass all arguments in A0...A3 and stack regardless
if its type (but respect the alignment).
- Store all variable arguments back to the caller stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95500 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-06 19:20:49 +00:00
Evan Cheng
00a99a3584 Run codegen dce pass for all targets at all optimization levels. Previously it's 
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95493 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-06 09:07:11 +00:00
Rafael Espindola
2f82ca904a Fix alignment on ppc linux. This fixes the build of crtend.o 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95477 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-06 03:32:21 +00:00
Evan Cheng
f22f9b35d6 Do not emit callseq instructions around sibcalls. This eliminated some unnecessary stack adjustments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95475 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-06 03:28:46 +00:00
Jakob Stoklund Olesen
570a4a5d9c Reintroduce the InlineHint function attribute. 
This time it's for real! I am going to hook this up in the frontends as well.

The inliner has some experimental heuristics for dealing with the inline hint.
When given a -respect-inlinehint option, functions marked with the inline
keyword are given a threshold just above the default for -O3.

We need some experiments to determine if that is the right thing to do.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95466 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-06 01:16:28 +00:00
Bob Wilson
e6373eb826 Handle AddrMode6 (for NEON load/stores) in Thumb2's rewriteT2FrameIndex. 
Radar 7614112.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95456 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-06 00:24:38 +00:00
Chris Lattner
8f60e4d679 fix incorrect encoding of SBB8mi that Kevin noticed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95448 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-05 22:56:11 +00:00
Chris Lattner
3f1118310e fix a case where we'd mis-encode fisttp because of an incorrect (and 
redundant with a correct one) pattern that was added for the disassembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95446 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-05 22:49:06 +00:00
Chris Lattner
faa75f6f6f add note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95445 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-05 22:48:33 +00:00
Chris Lattner
39a612e6f9 port X86InstrInfo::determineREX over to the new encoder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95440 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-05 22:10:22 +00:00
Chris Lattner
00cb3fe786 wire up 64-bit MCCodeEmitter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95438 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-05 21:51:35 +00:00
Chris Lattner
be1778fea7 really kill off the last MRMInitReg inst, remove logic from encoder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95437 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-05 21:34:18 +00:00
Chris Lattner
28c1d29b09 lower the last of the MRMInitReg instructions in MCInstLower. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95435 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-05 21:30:49 +00:00
Chris Lattner
35e0e84f93 teach X86MCInstLower to lower the MOV32r0 and MOV8r0 
pseudo instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95433 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-05 21:21:06 +00:00
Chris Lattner
ff928976f8 genericize helpers, use them for MOV16r0/MOV64r0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95432 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-05 21:15:57 +00:00
Chris Lattner
c74e333ecc factor code better in X86MCInstLower::Lower, teach it to 
lower the SETB* instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95431 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-05 21:13:48 +00:00
Chris Lattner
82ed17eb47 implement the rest of the encoding types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95414 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-05 19:37:31 +00:00
Chris Lattner
74a2151392 move functions for decoding X86II values into the X86II namespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95410 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-05 19:24:13 +00:00