Commit Graph

115323 Commits

Author SHA1 Message Date
Eric Christopher
a0485f5b9f Use the cached subtarget off of the machine function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232129 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 00:49:50 +00:00
Eric Christopher
caedadfcaa Use the cached subtarget off of the machine function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232128 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 00:38:19 +00:00
Sanjay Patel
cae9695fbb [X86, AVX2] Replace inserti128 and extracti128 intrinsics with generic shuffles
This should complete the job started in r231794 and continued in r232045:
We want to replace as much custom x86 shuffling via intrinsics
as possible because pushing the code down the generic shuffle
optimization path allows for better codegen and less complexity
in LLVM.

AVX2 introduced proper integer variants of the hacked integer insert/extract
C intrinsics that were created for this same functionality with AVX1.

This should complete the removal of insert/extract128 intrinsics.

The Clang precursor patch for this change was checked in at r232109.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232120 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 23:16:18 +00:00
Eric Christopher
740aee4b53 Move a variable into the assert where it's used - fixes a -Asserts
build warning/error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232119 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 23:13:03 +00:00
Eric Christopher
88d724909e In preparation for moving ARM's TargetRegisterInfo to the TargetMachine
merge Thumb1RegisterInfo and Thumb2RegisterInfo. This will enable
us to match the TargetMachine for our TargetRegisterInfo classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232117 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 22:48:50 +00:00
Simon Pilgrim
7385cafb7a Removed useless palignr test - we don't actually provide a llvm.x86.ssse3.palign.r.128 intrinsic
Differential Revision: http://reviews.llvm.org/D8302

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232108 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 21:42:03 +00:00
Tom Stellard
d996c4b8ad R600/SI: Don't print scc reg in sopc assembly string
This is how the proprietary driver prints sopc instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232106 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 21:34:28 +00:00
Tom Stellard
3d712a6373 R600/SI: Remove _e32 and _e64 suffixes from mnemonics
Instead print them as part of the $dst operand.  The AsmMatcher
requires the 32-bit and 64-bit encodings have the same mnemonic in
order to parse them correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232105 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 21:34:22 +00:00
Andrew Kaylor
d434c0d548 Adding WinEHPrepare tests (currently XFAILs)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232104 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 21:32:59 +00:00
Eric Christopher
94a887226d Migrate the AArch64 TargetRegisterInfo to its TargetMachine
implementation. This requires a bit of scaffolding and a few fixups
that'll go away once all of the ports have been migrated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232103 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 21:04:46 +00:00
Eric Christopher
323b9bb0d3 Remove unused headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232102 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 21:04:42 +00:00
Krzysztof Parzyszek
49fa37992d Unxfail passing test on Hexagon
test/CodeGen/Generic/2008-02-20-MatchingMem.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232098 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 20:38:10 +00:00
Hal Finkel
8faeecead0 Revert "r232027 - Add infrastructure for support of multiple memory constraints"
This (r232027) has caused PR22883; so it seems those bits might be used by
something else after all. Reverting until we can figure out what else to do.

Original commit message:

The operand flag word for ISD::INLINEASM nodes now contains a 15-bit
memory constraint ID when the operand kind is Kind_Mem. This constraint
ID is a numeric equivalent to the constraint code string and is converted
with a target specific hook in TargetLowering.

This patch maps all memory constraints to InlineAsm::Constraint_m so there
is no functional change at this point. It just proves that using these
previously unused bits in the encoding of the flag word doesn't break anything.

The next patch will make each target preserve the current mapping of
everything to Constraint_m for itself while changing the target independent
implementation of the hook to return Constraint_Unknown appropriately. Each
target will then be adapted in separate patches to use appropriate Constraint_*
values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232093 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 20:09:39 +00:00
Logan Chien
fed84edb61 [autoconf] Fix the build failure by quoting the strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232090 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 19:56:25 +00:00
Quentin Colombet
be45e0e669 [X86] Fix a regression introduced by r223641.
The permps and permd instructions have their operands swapped compared to the
intrinsic definition. Therefore, they do not fall into the INTR_TYPE_2OP
category.

I did not create a new category for those two, as they are the only one AFAICT
in that case.

<rdar://problem/20108262>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232085 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 19:34:12 +00:00
Frederic Riss
63a0e366a1 Reapply "[dsymutil] Gather function ranges during DIE selection."
This reverts commit r231967 which reinstates r231957.

Now that IntervalMap uses explicitely aligned storage, it should be safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232080 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 18:45:10 +00:00
Frederic Riss
a11c9307f6 [ADT] IntervalMap: use AlignedCharArrayUnion.
Currently IntervalMap would assert when used with keys bigger than host
pointers. This patch uses the AlignedCharArrayUnion functionality to
overcome that limitation.

Differential Revision: http://reviews.llvm.org/D8268

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232079 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 18:45:07 +00:00
Yaron Keren
217f2279be Add missing include guards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232078 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 18:39:54 +00:00
Eric Christopher
63fb193745 Fix comment formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232076 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 18:23:01 +00:00
Eric Christopher
f516a66bdd Remove the need to cache the subtarget in the X86 TargetRegisterInfo
classes. Use a Triple instead and simplify a lot of the querying
logic to use lookups on the Triple.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232071 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 17:54:19 +00:00
Chris Bieneman
a08ee010be Refactoring CMake CrossCompile module.
* put most of the cross-compiling support into a function llvm_create_cross_target_internal.
* when CrossCompile is included it still generates a NATIVE target.
* llvm_create_cross_target function takes a target_name which should match a toolchain.
* llvm_create_cross_target can now be used to target more than one cross-compilation target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232067 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 17:33:34 +00:00
Logan Chien
f7a833adfd [docs] Update the doxygen configuration file.
Update the doxygen configuration file and Makefile build rules
to provide better output (simply use the default stylesheet and template
from the Doxygen distribution.)

This CL has upgrade doxygen.cfg.in to Doxygen 1.8.6.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232064 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 17:26:27 +00:00
Logan Chien
e0c1a3e9ab [autoconf] Regenerate autoconf configure script.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232063 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 17:25:25 +00:00
Logan Chien
4c841fd7f4 [autoconf] Refine doxygen document options.
This CL adds --enable-doxygen-search to enable doxygen search engine
and --enable-doxygen-qt-help to enable the Qt help file generation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232062 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 17:25:01 +00:00
Krzysztof Parzyszek
7b110fe366 Remove unused complex patterns for addressing modes on Hexagon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232057 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 16:44:50 +00:00
Sanjay Patel
320572f378 make an array of constants explicitly const
Suggested by Craig Topper in D8184.

This goes with r232047.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232056 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 16:29:58 +00:00
Chris Bieneman
a1a34e5477 Doing some cleanup to the iOS toolchain.
* There is no reason to require SDKROOT as an environment variable because we can derive it from xcrun
* Setting CMAKE_RANLIB makes our static archives usable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232053 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 16:19:16 +00:00
Sanjay Patel
656ef652cc IRBuilder: add a CreateShuffleVector function that takes an ArrayRef of int
This is a convenience function to ease mask creation of ShuffleVectors
in AutoUpgrade and other places.

Differential Revision: http://reviews.llvm.org/D8184



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232047 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 15:27:07 +00:00
Andrea Di Biagio
be9322ae7c [X86] Fix wrong target specific combine on SETCC nodes.
Part of the folding logic implemented by function 'PerformISDSETCCCombine'
only worked under the assumption that the condition code in input could have
been either SETNE or SETEQ.
Unfortunately that assumption was incorrect, and in some cases the algorithm
ended up incorrectly folding SETCC nodes.

The incorrect folding only affected SETCC dag nodes where:
 - one of the operands was a build_vector of all zeroes;
 - the other operand was a SIGN_EXTEND from a vector of MVT:i1 elements;
 - the condition code was neither SETNE nor SETEQ.

Example:
  (setcc (v4i32 (sign_extend v4i1:%A)), (v4i32 VectorOfAllZeroes), setge)

Before this patch, the entire dag node sequence from the example was
incorrectly folded to node %A.

With this patch, the dag node sequence is folded to a
  (xor %A, (v4i1 VectorOfAllOnes)).

Added test setcc-combine.ll.

Thanks to Greg Bedwell for spotting this issue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232046 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 15:16:58 +00:00
Sanjay Patel
b4c1547749 [X86, AVX] replace vextractf128 intrinsics with generic shuffles
Now that we've replaced the vinsertf128 intrinsics, 
do the same for their extract twins.

This is very much like D8086 (checked in at r231794):
We want to replace as much custom x86 shuffling via intrinsics
as possible because pushing the code down the generic shuffle
optimization path allows for better codegen and less complexity
in LLVM.

This is also the LLVM sibling to the cfe D8275 patch.

Differential Revision: http://reviews.llvm.org/D8276



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232045 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 15:15:19 +00:00
Aaron Ballman
e6a494a4bc Silencing an "enumeral and non-enumeral type in conditional expression" warning; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232035 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 13:24:06 +00:00
Simon Pilgrim
df0acf35f3 [X86][AVX2] Added missing palignr stack folding test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232033 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 13:12:33 +00:00
Daniel Sanders
67f6425792 Add infrastructure for support of multiple memory constraints.
Summary:
The operand flag word for ISD::INLINEASM nodes now contains a 15-bit
memory constraint ID when the operand kind is Kind_Mem. This constraint
ID is a numeric equivalent to the constraint code string and is converted
with a target specific hook in TargetLowering.

This patch maps all memory constraints to InlineAsm::Constraint_m so there
is no functional change at this point. It just proves that using these
previously unused bits in the encoding of the flag word doesn't break anything.

The next patch will make each target preserve the current mapping of
everything to Constraint_m for itself while changing the target independent
implementation of the hook to return Constraint_Unknown appropriately. Each
target will then be adapted in separate patches to use appropriate Constraint_*
values.

Reviewers: hfinkel

Reviewed By: hfinkel

Subscribers: hfinkel, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8171


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232027 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 11:00:48 +00:00
Davide Italiano
f23883936c [Object/ELF] Add support for setVisibility()
This is a prerequisite to implement symbol visibility for ELF
in lld.

Differential Revision:	http://reviews.llvm.org/D8279


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232020 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 07:48:25 +00:00
Elena Demikhovsky
3209a40889 AVX-512: Added encoding tests for VPROR, VPROL instructions,
fixed opcode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232018 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 07:28:41 +00:00
Eric Christopher
257ea92cdf Remove some unnecessary forward declarations and put a couple more
where they're supposed to reside.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232014 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 06:07:16 +00:00
Eric Christopher
013ed4aa69 Remove the need to cache the subtarget in the Sparc TargetRegisterInfo
classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232013 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 05:55:26 +00:00
Eric Christopher
ae02704ac7 Remove the need to cache the subtarget in the Mips TargetRegisterInfo
classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232012 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 05:43:57 +00:00
Kevin Qin
a56999c5de Reapply 'Run LICM pass after loop unrolling pass.'
It's firstly committed at r231630, and reverted at r231635.

Function pass InstructionSimplifier is inserted as barrier to
make sure loop unroll pass won't affect on LICM pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232011 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 05:36:01 +00:00
Eric Christopher
d86e30a88e Remove the need to cache the subtarget in the ARM TargetRegisterInfo
classes. Replace the frame pointer initialization with a static function
that'll look it up via the subtarget on the MachineFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232010 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 05:12:31 +00:00
Justin Bogner
db9db0b2a1 docs: Fix a typo in my previous commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232009 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 04:43:01 +00:00
Justin Bogner
88a84e3804 docs: Document the llvm-cov show and report commands
Add a basic synopsis of how to work with instrprof based coverage
using the llvm-cov tools.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232007 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 04:18:21 +00:00
Eric Christopher
6bfa6d9c08 Remove the need to cache the subtarget in the AArch64 TargetRegisterInfo
classes. Replace it with a cache to the Triple and use that
where applicable at the moment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232005 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 02:04:46 +00:00
Jingyue Wu
3ea0adcdd5 [NVPTXAsmPrinter] do not print .align on function headers
Summary:
PTX does not allow .align directives on function headers.

Fixes PR21551.

Test Plan: test/Codegen/NVPTX/function-align.ll

Reviewers: eliben, jholewinski

Reviewed By: eliben, jholewinski

Subscribers: llvm-commits, eliben, jpienaar, jholewinski

Differential Revision: http://reviews.llvm.org/D8274

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232004 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 01:50:30 +00:00
Reid Kleckner
b2d414391a Make llvm.eh.actions an intrinsic and add docs for it
These docs *don't* match the way WinEHPrepare uses them yet, and
verifier support isn't implemented either. The implementation will come
after the documentation text is reviewed and agreed upon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232003 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 01:45:37 +00:00
Eric Christopher
e4a40f7a1c Remove the need to cache the subtarget in the PowerPC TargetRegisterInfo
classes. Replace it with a cache to the TargetMachine and use that
where applicable at the moment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232002 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 01:42:51 +00:00
Justin Bogner
13775e54b6 docs: Try to fix a couple of internal links in the llvm-profdata manual
These links seem broken on llvm.org/docs. Change them to use the
sphinx-recommended style to see if that helps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232001 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 01:38:50 +00:00
Reid Kleckner
b53bb04b2f Remove some CHECK-NOT lines in favor of CHECK-NEXT
NFC, this is just shorter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232000 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 01:38:48 +00:00
Eric Christopher
0d09accb60 Update for a new year.
Patch by Tanya Lattner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231998 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 01:25:29 +00:00
Krzysztof Parzyszek
55d4acbaf2 Fix build break introduced in r231992
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231996 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 00:49:13 +00:00