Commit Graph

2458 Commits

Author SHA1 Message Date
Dale Johannesen
442b7bfc80 Use the output of the asm so the optimizer won't
delete it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 01:51:40 +00:00
Evan Cheng
87d696a4d2 Fix PR3934 part 2. findOnlyInterestingUse() was not setting IsCopy and IsDstPhys which are returned by value and used by callee. This happened to work on the earlier test cases because of a logic error in the caller side.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 00:32:25 +00:00
Evan Cheng
3005ed6048 PR3934: Fix a bogus two-address pass assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 20:04:24 +00:00
Dan Gohman
21e3dfbc86 Implement x86 h-register extract support.
- Add patterns for h-register extract, which avoids a shift and mask,
   and in some cases a temporary register.
 - Add address-mode matching for turning (X>>(8-n))&(255<<n), where
   n is a valid address-mode scale value, into an h-register extract
   and a scaled-offset address.
 - Replace X86's MOV32to32_ and related instructions with the new
   target-independent COPY_TO_SUBREG instruction.

On x86-64 there are complicated constraints on h registers, and
CodeGen doesn't currently provide a high-level way to express all of them,
so they are handled with a bunch of special code. This code currently only
supports extracts where the result is used by a zero-extend or a store,
though these are fairly common.

These transformations are not always beneficial; since there are only
4 h registers, they sometimes require extra move instructions, and
this sometimes increases register pressure because it can force out
values that would otherwise be in one of those registers. However,
this appears to be relatively uncommon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 16:09:41 +00:00
Rafael Espindola
7ff5bff45e X86-64 TLS support for local exec and initial exec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68947 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 13:02:49 +00:00
Chris Lattner
266c7bbbbc Add a new "available_externally" linkage type. This is intended
to support C99 inline, GNU extern inline, etc.  Related bugzilla's
include PR3517, PR3100, & PR2933.  Nothing uses this yet, but it
appears to work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 05:44:34 +00:00
Rafael Espindola
b215776fa1 In X86DAGToDAGISel::MatchWrapper, if base or index are set, avoid matching
only if symbolic addresses are RIP relatives.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68924 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12 23:00:38 +00:00
Rafael Espindola
1cefb74190 Add tests for the parts of X86-64 TLS that are already implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68901 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12 10:43:41 +00:00
Chris Lattner
8d57b778b5 fix a cross-block fastisel crash handling overflow intrinsics.
See comment for details.  This fixes rdar://6772169


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68890 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12 07:51:14 +00:00
Chris Lattner
dbf1e2b08b move a target-specific test into its directory so it isn't run if you
don't configure the ARM target in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68843 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 23:58:38 +00:00
Chris Lattner
296185c264 fix two problems with machine sinking:
1. Sinking would crash when the first instruction of a block was
   sunk due to iterator problems.
2. Instructions could be sunk to their current block, causing an
   infinite loop.

This fixes PR3968


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 16:38:36 +00:00
Rafael Espindola
dbcfb3080a Don't fold a load if the other operand is a TLS address.
With this we generate

movl    %gs:0, %eax
leal    i@NTPOFF(%eax), %eax

instead of

movl    $i@NTPOFF, %eax
addl    %gs:0, %eax



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 10:09:34 +00:00
Bob Wilson
d9df501704 Fix pr3954. The register scavenger asserts for inline assembly with
register destinations that are tied to source operands.  The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly.  The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68714 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 17:16:43 +00:00
Chris Lattner
0c8382ce9a reg0 references are not real registers. This fixes a crash on the
attached testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68712 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 16:50:43 +00:00
Dan Gohman
57fc82d409 Generalize ExtendUsesToFormExtLoad to be usable for ANY_EXTEND,
in addition to ZERO_EXTEND and SIGN_EXTEND. Fix a bug in the
way it checked for live-out values, and simplify the way it
find users by using SDNode::use_iterator's (relatively) new
features. Also, make it slightly more permissive on targets
with free truncates.

In SelectionDAGBuild, avoid creating ANY_EXTEND nodes that are
larger than necessary. If the target's SwitchAmountTy has
enough bits, use it. This exposes the truncate to optimization
early, enabling more optimizations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68670 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 03:51:29 +00:00
Rafael Espindola
094fad37b9 Re-apply 68552.
Tested by bootstrapping llvm-gcc and using that to build llvm.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68645 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 21:14:34 +00:00
Bob Wilson
83593a369b Add testcase for PR3795.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68620 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 18:00:55 +00:00
Duncan Sands
3d0355b825 Soft float support for FREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68614 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 16:20:57 +00:00
Duncan Sands
7beb1ec298 Soft float support for undef. Reported by Xerxes Rånby.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68607 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 13:33:37 +00:00
Dan Gohman
4da69c77cf Fully escape the grep string for this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68580 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 00:54:40 +00:00
Dan Gohman
ac03132018 Update this test for recent codegen improvements. CodeGen is now
using an lea in place of a mov and an add for this test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68579 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 00:51:11 +00:00
Dan Gohman
97121ba2af Implement support for using modeling implicit-zero-extension on x86-64
with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.

This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.

Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.

Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.

Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.

Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 00:15:30 +00:00
Bill Wendling
044b5344c4 Temporarily revert r68552. This was causing a failure in the self-hosting LLVM
builds.

--- Reverse-merging (from foreign repository) r68552 into '.':
U    test/CodeGen/X86/tls8.ll
U    test/CodeGen/X86/tls10.ll
U    test/CodeGen/X86/tls2.ll
U    test/CodeGen/X86/tls6.ll
U    lib/Target/X86/X86Instr64bit.td
U    lib/Target/X86/X86InstrSSE.td
U    lib/Target/X86/X86InstrInfo.td
U    lib/Target/X86/X86RegisterInfo.cpp
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86CodeEmitter.cpp
U    lib/Target/X86/X86FastISel.cpp
U    lib/Target/X86/X86InstrInfo.h
U    lib/Target/X86/X86ISelDAGToDAG.cpp
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U    lib/Target/X86/X86ISelLowering.h
U    lib/Target/X86/X86InstrInfo.cpp
U    lib/Target/X86/X86InstrBuilder.h
U    lib/Target/X86/X86RegisterInfo.td



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68560 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07 22:35:25 +00:00
Rafael Espindola
2a6411bbbd Reduce code duplication on the TLS implementation.
This introduces a small regression on the generated code
quality in the case we are just computing addresses, not
loading values.

Will work on it and on X86-64 support.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68552 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07 21:37:46 +00:00
Dan Gohman
4fd552880c Don't attempt to handle aggregate argument values in FastISel; let
SelectionDAG do those. This fixes PR3955.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68546 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07 20:40:11 +00:00
Bob Wilson
8f3434647d Handle 'a' modifier in ARM inline assembly.
Patch by Richard Pennington.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68464 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-06 21:46:51 +00:00
Nick Lewycky
cfdd807cfa Try SSE2?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-04 10:24:24 +00:00
Nick Lewycky
2cd1b777d7 Fix test on non-x86 platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68419 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-04 07:20:43 +00:00
Dan Gohman
f50c7981ae Fix a TargetLowering optimization so that it doesn't duplicate
loads when an input node has multiple uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68398 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 20:11:30 +00:00
Mon P Wang
1e95580925 Added a x86 dag combine to increase the chances to use a
movq for v2i64 on x86-32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68368 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 02:43:30 +00:00
Bob Wilson
bf6396bed0 Fix PR3862: Recognize some ARM-specific constraints for immediates in inline
assembly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-01 17:58:54 +00:00
Evan Cheng
6fb2168aae Fully general expansion of integer shift of any size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68134 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 19:39:24 +00:00
Dan Gohman
431efa19aa Add an explicit -asm-verbose to these tests, to make it
possible to run the tests with -asm-verbose defaulting
to false.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 18:20:47 +00:00
Owen Anderson
696a1307ba Remove the "fast" cases for spill and restore point determination, as these were subtlely wrong in obscure cases. Patch the testcase
to account for this change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68093 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 08:27:09 +00:00
Dan Gohman
07c26ee87e Fix live-out reg logic to not insert over-aggressive AssertZExt
instructions. This fixes lua.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68083 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 01:38:29 +00:00
Evan Cheng
e6f350d755 Turn a 2-address instruction into a 3-address one when it's profitable even if the two-address operand is killed.
e.g.
%reg1024<def> = MOV r1
%reg1025<def> = ADD %reg1024, %reg1026
r0            = MOV %reg1025

If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 21:34:07 +00:00
Anton Korobeynikov
30ffe8150f Tweak test for recent relro stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 15:28:40 +00:00
Evan Cheng
878071e6d0 Forgot this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68025 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 06:17:34 +00:00
Anton Korobeynikov
807117dc56 Testcase for recent ro/relocs stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68008 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-29 17:14:57 +00:00
Duncan Sands
004e27cc1b Fix PR3899: add support for extracting floats from vectors
when using -soft-float.
Based on a patch by Jakob Stoklund Olesen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-29 13:51:06 +00:00
Arnold Schwaighofer
11ff97801b Make check in CheckTailCallReturnConstraints for ignorable instructions between
a CALL and a RET node more generic. Add a test for tail calls with a void
return.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67943 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28 12:36:29 +00:00
Arnold Schwaighofer
e75fd69f15 Enable tail call optimization for functions that return a struct (bug 3664) and for functions that return types that need extending (e.g i1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67934 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28 08:33:27 +00:00
Evan Cheng
0b0cd9113a Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
x * 40
=>
shlq    $3, %rdi
leaq    (%rdi,%rdi,4), %rax

This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq    (%rdi,%rdi,2), %rax
leaq    (%rsi,%rax,8), %rax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28 05:57:29 +00:00
Dan Gohman
1a36744b07 Fix this test so that it doesn't spuriously fail due to some
unrelated debugging output happening to contain the string "store".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67849 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-27 16:17:22 +00:00
Evan Cheng
0802851816 Add -march=x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67783 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-26 23:03:32 +00:00
Bill Wendling
dccbfea503 Add -f to RUN line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-26 06:17:54 +00:00
Chris Lattner
a95dbf23f8 no need for eh info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67740 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-26 05:51:18 +00:00
Bill Wendling
24c98cebc8 Add testcase for r67728.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67729 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-26 01:52:47 +00:00
Evan Cheng
e597282fe5 Add a test case for PR3779: when to promote the function return value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67702 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-25 20:30:19 +00:00
Evan Cheng
3927f438b5 Revert 67132. This is breaking some objective-c apps.
Also fixes SDISel so it *does not* force promote return value if the function is not marked signext / zeroext.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67701 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-25 20:20:11 +00:00