Reid Spencer
03aee2e3f2
For Bug 543:
...
Allow the ThrowErrno function to optionally accept an error number
parameter so that callers can specify the error number to be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21384 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-21 02:30:32 +00:00
Misha Brukman
d6a29a5304
Remove trailing whitespace, patch by Markus Oberhumer.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21379 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-20 16:05:03 +00:00
Misha Brukman
22c46da12b
Add FIXME by Markus Oberhumer from bug 545: not checking for "." in $PATH may
...
result in returning executable files that won't be runnable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21378 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-20 15:42:11 +00:00
Misha Brukman
8177bf8904
Do not mark directories as `executable', we only want program files
...
Patch by Markus Oberhumer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21377 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-20 15:33:22 +00:00
Misha Brukman
4619c75f64
Ignore dangling symlinks in getDirectoryContents()
...
Thanks to Markus Oberhumer for the patch!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21370 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-20 04:04:07 +00:00
Misha Brukman
4b2afe6394
Initialize fields mode, uid, and gid.
...
Patch by Markus Oberhumer. Thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21369 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-20 03:55:35 +00:00
Misha Brukman
72a9caa260
Align comments together for consistency
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21368 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-20 03:52:59 +00:00
Chris Lattner
7d27fc0252
Wrap some long lines.
...
Make IPSCCP strip off dead constant exprs that are using functions, making
them appear as though their address is taken. This allows us to propagate
some more pool descriptors, lowering the overhead of pool alloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21363 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 19:16:19 +00:00
Chris Lattner
20b463629b
fix PR549
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21360 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 15:27:29 +00:00
Chris Lattner
240d6f4c9d
Eliminate a broken transformation, fixing PR548
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21354 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 06:04:18 +00:00
Chris Lattner
f577c6122f
Add completely untested support for mtcrf/mfcrf encoding
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21353 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 05:41:52 +00:00
Chris Lattner
14522e31d9
switch over the rest of the formats that use RC to use isDOT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21352 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 05:21:30 +00:00
Chris Lattner
883059fb58
Convert the XForm instrs and XSForm instruction over to use isDOT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21351 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 05:15:18 +00:00
Chris Lattner
97a2d42999
Now that the ppc64 and vmx operands of I are always 0, forward substitute
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them away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21350 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 05:05:22 +00:00
Chris Lattner
a611ab72ca
convert over bform and iform instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21349 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 05:00:59 +00:00
Chris Lattner
57226fbc7b
Convert over DForm and DSForm instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21348 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 04:59:28 +00:00
Chris Lattner
e19d0b1130
Convert XLForm and XForm instructions over to use PPC64 when appropriate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21347 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 04:51:30 +00:00
Chris Lattner
5035cef732
Convert XO XS and XFX forms to use isPPC64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21346 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 04:40:07 +00:00
Chris Lattner
0bdc6f1fd4
Turn PPC64 and VMX into classes that can be added to instructions instead of
...
bits that must be passed up the inheritance hierarchy. Convert MForm and AForm
instructions over
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21345 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-19 04:32:54 +00:00
Nate Begeman
1cbf3abbb8
Next round of PPC CR optimizations. For the following code:
...
int %bar(float %a, float %b, float %c, float %d) {
entry:
%tmp.1 = setlt float %a, %d
%tmp.2 = setlt float %b, %d
%or = or bool %tmp.1, %tmp.2
%tmp.3 = setgt float %c, %d
%tmp.4 = or bool %or, %tmp.3
%tmp.5 = and bool %tmp.4, true
%retval = cast bool %tmp.5 to int
ret int %retval
}
We now emit:
_bar:
.LBB_bar_0: ; entry
fcmpu cr0, f1, f4
fcmpu cr1, f2, f4
cror 0, 0, 4
fcmpu cr1, f3, f4
cror 28, 0, 5
mfcr r2
rlwinm r3, r2, 29, 31, 31
blr
Instead of:
_bar:
.LBB_bar_0: ; entry
fcmpu cr7, f1, f4
mfcr r2
rlwinm r2, r2, 29, 31, 31
fcmpu cr7, f2, f4
mfcr r3
rlwinm r3, r3, 29, 31, 31
or r2, r2, r3
fcmpu cr7, f3, f4
mfcr r3
rlwinm r3, r3, 30, 31, 31
or r3, r2, r3
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21321 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-18 07:48:09 +00:00
Chris Lattner
ea96b5edbb
silence a bogus warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21320 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-18 05:26:21 +00:00
Chris Lattner
fda2b55e1b
Fold setcc of MVT::i1 operands into logical operations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21319 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-18 04:48:12 +00:00
Chris Lattner
4a44c8df19
Another minor simplification: handle setcc (zero_extend x), c -> setcc(x, c')
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21318 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-18 04:30:45 +00:00
Chris Lattner
7467c9b086
Another simple xform
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21317 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-18 04:11:19 +00:00
Chris Lattner
706aa9685a
Fold:
...
// (X != 0) | (Y != 0) -> (X|Y != 0)
// (X == 0) & (Y == 0) -> (X|Y == 0)
Compiling this:
int %bar(int %a, int %b) {
entry:
%tmp.1 = setne int %a, 0
%tmp.2 = setne int %b, 0
%tmp.3 = or bool %tmp.1, %tmp.2
%retval = cast bool %tmp.3 to int
ret int %retval
}
to this:
_bar:
or r2, r3, r4
addic r3, r2, -1
subfe r3, r3, r2
blr
instead of:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r3, r2, r3
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21316 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-18 03:59:53 +00:00
Chris Lattner
36019aa5c6
Make the AND elimination operation recursive and significantly more powerful,
...
eliminating an and for Nate's testcase:
int %bar(int %a, int %b) {
entry:
%tmp.1 = setne int %a, 0
%tmp.2 = setne int %b, 0
%tmp.3 = or bool %tmp.1, %tmp.2
%retval = cast bool %tmp.3 to int
ret int %retval
}
generating:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r3, r2, r3
blr
instead of:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r2, r2, r3
rlwinm r3, r2, 0, 31, 31
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21315 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-18 03:48:41 +00:00
Nate Begeman
16ac709c63
Change codegen for setcc to read the bit directly out of the condition
...
register. Added support in the .td file for the g5-specific variant
of cr -> gpr moves that executes faster, but we currently don't
generate it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21314 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-18 02:43:24 +00:00
Chris Lattner
d91ff7cd3b
Add support for targets that require stubs for external functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21313 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-18 01:44:27 +00:00
Chris Lattner
477d1de9b2
Handle ExternalSymbol operands in the PPC JIT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21312 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-18 00:46:10 +00:00
Nate Begeman
f8b02949e3
Make pattern isel default for ppc
...
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
0 == off
1 == on
2 == target default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21309 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-15 22:12:16 +00:00
Chris Lattner
36d12733bb
a new simple pass, which will be extended to be more useful in the future.
...
This pass forward branches through conditions when it can show that the
conditions is either always true or false for a predecessor. This currently
only handles the most simple cases of this, but is successful at threading
across 2489 branches and 65 switch instructions in 176.gcc, which isn't bad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21306 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-15 19:28:32 +00:00
Andrew Lenharth
1e0d9bda62
fix calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21303 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-14 17:34:20 +00:00
Andrew Lenharth
3ae1829fe5
a 21264 fix, and fix the operator precidence on an and -> zap check (should fix hundreds of test cases
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21302 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-14 16:24:00 +00:00
Duraid Madina
1ce0c015ad
print negative 64 bit immediates as negative numbers, makes things a little
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easier on the eyes, not that numbers like 18446744073709541376 are bad or
anything
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21300 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-14 10:08:01 +00:00
Duraid Madina
3eb7150c3e
oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21299 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-14 10:06:35 +00:00
Nate Begeman
7bfba7d5e3
Implement multi-way branches through logical ops on condition registers.
...
This can generate considerably shorter code, reducing the size of crafty
by almost 1%. Also fix the printing of mcrf. The code is currently
disabled until it gets a bit more testing, but should work as-is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21298 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-14 09:45:08 +00:00
Nate Begeman
72ea281d61
Add a couple missing transforms in getSetCC that were triggering assertions
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in the PPC Pattern ISel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21297 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-14 08:56:52 +00:00
Duraid Madina
c4ccc2db6b
we have zextloads, not sextloads!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21296 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-14 08:37:32 +00:00
Nate Begeman
ef7288c824
Add the necessary support to codegen condition register logical ops with
...
register allocated condition registers. Make sure that the printed
output is gas compatible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21295 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-14 03:20:38 +00:00
Nate Begeman
1b7f7fbf95
Start allocating condition registers. Almost all explicit uses of CR0 are
...
now gone. Next step is to get rid of the remaining ones and then start
allocating bools to CRs where appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21294 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 23:15:44 +00:00
Nate Begeman
3664ceffdd
Implement the fold shift X, zext(Y) -> shift X, Y at the target level,
...
where it is safe to do so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21293 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 22:14:14 +00:00
Nate Begeman
eea805e74c
Disbale the broken fold of shift + sz[ext] for now
...
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
always produces zero or one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21291 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 21:23:31 +00:00
Chris Lattner
97e001dec7
fix an infinite loop
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21289 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 20:06:29 +00:00
Chris Lattner
fd8d389ede
fix some serious miscompiles on ia64, alpha, and ppc
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21288 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 19:53:40 +00:00
Chris Lattner
51679c430f
avoid work when possible, perhaps fix the problem nate and andrew are seeing
...
with != 0 comparisons vanishing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21287 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 19:41:05 +00:00
Andrew Lenharth
c24b537399
WOW, function calls still seem to work after this.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21286 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 17:17:28 +00:00
Andrew Lenharth
556c44e116
prepare for func call optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21285 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 16:19:50 +00:00
Duraid Madina
ed09502a0b
* add the shladd instruction
...
* fold left shifts of 1, 2, 3 or 4 bits into adds
This doesn't save much now, but should get a serious workout once
multiplies by constants get converted to shift/add/sub sequences.
Hold on! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21282 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 06:12:04 +00:00
Andrew Lenharth
4f7cba5af8
add matches for SxADDL and company, as well as simplify the SxADDQ code
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21281 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 05:19:55 +00:00
Chris Lattner
e9c35e7309
Implement expansion of unsigned i64 -> FP.
...
Note that this probably only works for little endian targets, but is enough
to get siod working :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21280 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 05:09:42 +00:00
Duraid Madina
c02780eed1
* if ANDing with a constant of the form:
...
0x00000..00FFF..FF
^ ^
^ ^
any number of
0's followed by
some number of
1's
then we use dep.z to just paste zeros over the input. For the special
cases where this is zxt1/zxt2/zxt4, we use those instructions instead,
because we're all about readability!!!
that's what it's about!! readability!
*twitch* ;D
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21279 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 04:50:54 +00:00
Andrew Lenharth
483f22d817
added all flavors of zap for anding
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21276 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 03:47:03 +00:00
Chris Lattner
ffe284c651
Make expansion of uint->fp cast assert out instead of infinitely recurse.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21275 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 03:42:14 +00:00
Chris Lattner
5bf2686a1b
Fix some mysteriously missing {}'s which cause the miscompilation of
...
Olden/mst, Ptrdist/bc, Obsequi, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21274 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 03:29:53 +00:00
Chris Lattner
e666fcfbdd
add back the optimization that Nate added for shl X, (zext_inreg y)
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21273 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 02:58:13 +00:00
Chris Lattner
8a8dbfa57c
Oops, remove these too.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21272 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 02:47:57 +00:00
Chris Lattner
519f40ba4e
remove one more occurance of this that snuck in
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21271 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 02:46:17 +00:00
Chris Lattner
2942e9c301
Remove support for ZERO_EXTEND_INREG. This pessimizes code, genering stuff
...
like this:
ldah $1,1($31)
lda $1,-1($1)
and $0,$1,$24
instead of this:
zap $0,252,$24
To get this back, the selector should recognize the ISD::AND case where this
happens and emit the appropriate ZAP instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21270 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 02:43:40 +00:00
Chris Lattner
6ac614a4f2
Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causing
...
things like this:
mov r9 = 65535;;
and r8 = r8, r9;;
To be emitted instead of:
zxt2 r8 = r8;;
To get this back, the selector for ISD::AND should recognize this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21269 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 02:41:52 +00:00
Chris Lattner
c951d87fe9
Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit
...
andi instructions instead of rlwinm instructions for zero extend, but they
seem like they would take the same time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21268 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 02:40:26 +00:00
Chris Lattner
91302a10ae
Z_E_I is gone
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21267 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 02:39:05 +00:00
Chris Lattner
23993561e2
Instead of making ZERO_EXTEND_INREG nodes, use the helper method in
...
SelectionDAG to do the job with AND. Don't legalize Z_E_I anymore as
it is gone
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21266 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 02:38:47 +00:00
Chris Lattner
0f2287baa1
Remove all foldings of ZERO_EXTEND_INREG, moving them to work for AND nodes
...
instead. OVerall, this increases the amount of folding we can do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21265 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 02:38:18 +00:00
Nate Begeman
db81ebab89
Fold shift x, [sz]ext(y) -> shift x, y
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21262 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 23:32:28 +00:00
Nate Begeman
b882752bd0
Fold shift by size larger than type size to undef
...
Make llvm undef values generate ISD::UNDEF nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21261 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 23:12:17 +00:00
Nate Begeman
9765c25eb7
Implement setcc op, -1 sequences
...
Remove dead setcc op, 0 sequences
Coming later: generalization of op, imm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21260 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 21:22:28 +00:00
Chris Lattner
1c51c6ac13
promote extload i1 -> extload i8
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21258 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 20:30:10 +00:00
Chris Lattner
3464547968
add an argument to allow avoiding deleting phi nodes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21255 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 18:52:14 +00:00
Chris Lattner
151c80be81
Get rid of this for_each loop
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21253 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 18:51:33 +00:00
Duraid Madina
e8fd25f5c5
* OK, after changing to use liveIn/liveOut instead of IDEFs,
...
to avoid redundant mov out3=r44 type instructions, we need to
tell the register allocator the truth about out? registers.
FIXME: unfortunately, since the list of allocatable registers is immutable,
we can't simply 'delete r127' from the allocation order, say, if 'out0' is
used. The only correct thing we can do is have a linear order of regs:
out7, out6 ... out2, out1, out0, r32, r33, r34 ... r126, r127
and slide a 'window' of 96 registers along this line, depending on how many
of the out? regs a function actually uses. The only downside of this is
that the out? registers will be allocated _first_, which makes the
resulting assembly ugly. :( Note this in the README. Hope this gets fixed
soon. :) (note the 3rd person speech there)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21252 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 18:42:59 +00:00
Andrew Lenharth
0b04b5d562
Get rid of idefs for arguments (oops)
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21251 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 17:47:57 +00:00
Andrew Lenharth
e1c5a00e8b
Get rid of idefs for arguments
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21250 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 17:35:16 +00:00
Chris Lattner
9c24ba642e
Put out* into the allocation order, allowing the register allocator to
...
coallesce moves into outgoing args.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21249 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 15:12:51 +00:00
Chris Lattner
ea6f770fb0
Make sure to realize that calls use their argument regs
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21248 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 15:12:19 +00:00
Duraid Madina
ca494fddcd
stop emitting IDEFs for args - change to using liveIn/liveOut
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21247 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 14:54:44 +00:00
Nate Begeman
7af0248af4
Initial support for allocation condition registers
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21246 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 07:04:16 +00:00
Chris Lattner
af2e3e0859
Fix a crash analyzing MultiSource/Benchmarks/MallocBench/gs
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21245 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 03:59:27 +00:00
Chris Lattner
fd1f1ee0ba
Remove some redundant checks, add a couple of new ones. This allows us to
...
compile this:
int foo (unsigned long a, unsigned long long g) {
return a >= g;
}
To:
foo:
movl 8(%esp), %eax
cmpl %eax, 4(%esp)
setae %al
cmpl $0, 12(%esp)
sete %cl
andb %al, %cl
movzbl %cl, %eax
ret
instead of:
foo:
movl 8(%esp), %eax
cmpl %eax, 4(%esp)
setae %al
movzbw %al, %cx
movl 12(%esp), %edx
cmpl $0, %edx
sete %al
movzbw %al, %ax
cmpl $0, %edx
cmove %cx, %ax
movzbl %al, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21244 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 02:54:39 +00:00
Chris Lattner
5b95ed652f
Emit comparisons against the sign bit better. Codegen this:
...
bool %test1(long %X) {
%A = setlt long %X, 0
ret bool %A
}
like this:
test1:
cmpl $0, 8(%esp)
setl %al
movzbl %al, %eax
ret
instead of:
test1:
movl 8(%esp), %ecx
cmpl $0, %ecx
setl %al
movzbw %al, %ax
cmpl $0, 4(%esp)
setb %dl
movzbw %dl, %dx
cmpl $0, %ecx
cmove %dx, %ax
movzbl %al, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21243 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 02:19:10 +00:00
Chris Lattner
08b698e38d
Emit long comparison against -1 better. Instead of this (x86):
...
test2:
movl 8(%esp), %eax
notl %eax
movl 4(%esp), %ecx
notl %ecx
orl %eax, %ecx
cmpl $0, %ecx
sete %al
movzbl %al, %eax
ret
or this (PPC):
_test2:
nor r2, r4, r4
nor r3, r3, r3
or r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
Emit this:
test2:
movl 8(%esp), %eax
andl 4(%esp), %eax
cmpl $-1, %eax
sete %al
movzbl %al, %eax
ret
or this:
_test2:
.LBB_test2_0: ;
and r2, r4, r3
cmpwi cr0, r2, -1
li r3, 1
li r2, 0
beq .LBB_test2_2 ;
.LBB_test2_1: ;
or r3, r2, r2
.LBB_test2_2: ;
blr
it seems like the PPC isel could do better for R32 == -1 case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21242 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 01:46:05 +00:00
Chris Lattner
3b2c1d95a2
canonicalize x <u 1 -> x == 0. On this testcase:
...
unsigned long long g;
unsigned long foo (unsigned long a) {
return (a >= g) ? 1 : 0;
}
It changes the ppc code from:
_foo:
.LBB_foo_0: ; entry
mflr r11
stw r11, 8(r1)
bl "L00000$pb"
"L00000$pb":
mflr r2
addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2)
lwz r4, 0(r2)
lwz r2, 4(r2)
cmplw cr0, r3, r2
li r2, 1
li r3, 0
bge .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r3, r3
.LBB_foo_2: ; entry
cmplwi cr0, r4, 1
li r3, 1
li r5, 0
blt .LBB_foo_4 ; entry
.LBB_foo_3: ; entry
or r3, r5, r5
.LBB_foo_4: ; entry
cmpwi cr0, r4, 0
beq .LBB_foo_6 ; entry
.LBB_foo_5: ; entry
or r2, r3, r3
.LBB_foo_6: ; entry
rlwinm r3, r2, 0, 31, 31
lwz r11, 8(r1)
mtlr r11
blr
to:
_foo:
.LBB_foo_0: ; entry
mflr r11
stw r11, 8(r1)
bl "L00000$pb"
"L00000$pb":
mflr r2
addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2)
lwz r4, 0(r2)
lwz r2, 4(r2)
cmplw cr0, r3, r2
li r2, 1
li r3, 0
bge .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r3, r3
.LBB_foo_2: ; entry
cntlzw r3, r4
srwi r3, r3, 5
cmpwi cr0, r4, 0
beq .LBB_foo_4 ; entry
.LBB_foo_3: ; entry
or r2, r3, r3
.LBB_foo_4: ; entry
rlwinm r3, r2, 0, 31, 31
lwz r11, 8(r1)
mtlr r11
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21241 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 00:28:49 +00:00
Nate Begeman
9f833d3085
Implement bitfield clears
...
Implement divide by negative power of two
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21240 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 00:10:02 +00:00
Nate Begeman
ef9531efed
Update PPC readme. Remove things that are done or aren't ppc specific
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21232 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 20:48:57 +00:00
Chris Lattner
bd0781ed12
Teach the dag mechanism that this:
...
long long test2(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) + B;
}
is equivalent to this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
Now they are both codegen'd to this on ppc:
_test2:
blr
or this on x86:
test2:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21231 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 20:29:59 +00:00
Chris Lattner
ee27f57a6a
Fix expansion of shifts by exactly NVT bits on arch's (like X86) that have
...
masking shifts.
This fixes the miscompilation of this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
into this:
test1:
movl 4(%esp), %edx
movl %edx, %eax
orl 8(%esp), %eax
ret
allowing us to generate this instead:
test1:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21230 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 20:08:52 +00:00
Chris Lattner
30e82431b3
IA64 supports this operation.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21228 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 18:55:36 +00:00
Chris Lattner
5eef9f3bc9
ORo sets CR0
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21227 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 15:03:48 +00:00
Chris Lattner
6b4ea2cfa2
Revert the previous patch, which I didn't mean to check in.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21226 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 15:03:41 +00:00
Chris Lattner
26d4fdb968
Fix a minor bug (ORo didn't mark that it set CR0).
...
Refactor how . instructions are handled. In particular, instead of passing
the RC flag all the way up the inheritance hierarchy, just make a new tblgen
class 'DOT' which can be added to an instruction definition.
For example, instead of this:
-def AND : XForm_6<31, 28, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
-let Defs = [CR0] in
-def ANDo : XForm_6<31, 28, 1, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
- "and. $rA, $rS, $rB">;
We now have this:
+def AND : XForm_6<31, 28, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
"and $rA, $rS, $rB">;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21225 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 15:01:39 +00:00
Duraid Madina
21478e55db
hmm, should probably change addImm() to take 64-bit arguments one day anyway.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21224 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 07:16:39 +00:00
Nate Begeman
c7bd4827cd
Add recording variants of ISD::AND and ISD::OR. This kills almost 1000
...
(1.5%) instructions in 186.crafty
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21222 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 06:34:10 +00:00
Duraid Madina
5ef2ec9929
assorted fixes:
...
* clean up immediates (we use 14, 22 and 64 bit immediates now. sane.)
* fold r0/f0/f1 registers into comparisons against 0/0.0/1.0
* fix nasty thinko - didn't use two-address form of conditional add
for extending bools to integers, so occasionally there would be
garbage in the result. it's amazing how often zeros are just
sitting around in registers ;) - this should fix a bunch of tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21221 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 05:55:56 +00:00
Jeff Cohen
01c5513683
Eliminate tabs
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21216 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 03:44:22 +00:00
Nate Begeman
c7c16575fe
Fix libcall code to not pass a NULL Chain to LowerCallTo
...
Fix libcall code to not crash or assert looking for an ADJCALLSTACKUP node
when it is known that there is no ADJCALLSTACKDOWN to match.
Expand i64 multiply when ISD::MULHU is legal for the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21214 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 03:01:51 +00:00
Chris Lattner
2bb6f41282
Don't bother sign/zext_inreg'ing the result of an and operation if we know
...
the result does change as a result of the extend.
This improves codegen for Alpha on this testcase:
int %a(ushort* %i) {
%tmp.1 = load ushort* %i
%tmp.2 = cast ushort %tmp.1 to int
%tmp.4 = and int %tmp.2, 1
ret int %tmp.4
}
Generating:
a:
ldgp $29, 0($27)
ldwu $0,0($16)
and $0,1,$0
ret $31,($26),1
instead of:
a:
ldgp $29, 0($27)
ldwu $0,0($16)
and $0,1,$0
addl $0,0,$0
ret $31,($26),1
btw, alpha really should switch to livein/outs for args :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21213 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 23:37:16 +00:00
Chris Lattner
01ff7216dd
Teach legalize to deal with targets that don't support some SEXTLOAD/ZEXTLOADs
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21212 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 22:54:25 +00:00
Chris Lattner
6841dec8c1
don't zextload fp values!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21209 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 17:40:35 +00:00
Nate Begeman
709c806a1e
Fix another fixme: factor out the constant fp generation code.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21207 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 06:06:10 +00:00
Nate Begeman
c5b1cd22b5
Fix 64 bit argument loading that straddles the args in regs / args on stack
...
boundary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21206 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 05:53:14 +00:00
Chris Lattner
232ee95a09
Until we have a dag combiner, promote using zextload's instead of extloads.
...
This gives the optimizer a bit of information about the top-part of the
value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21205 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 04:33:47 +00:00
Chris Lattner
45278e37eb
Fold zext_inreg(zextload), likewise for sext's
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21204 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 04:33:08 +00:00
Chris Lattner
edeecfcbd5
add a simple xform
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21203 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 04:04:49 +00:00
Nate Begeman
340f290783
Remove unnecessary Implicit Defs. Since r0 is not in allocation, we do not
...
have to inform the register allocator it might be stepped on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21202 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 03:59:42 +00:00
Nate Begeman
27499e3f1b
Make sure that BRCOND branches can be converted into long branches too.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21198 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 01:48:29 +00:00
Nate Begeman
a0e3e9474f
Don't hand ISD::CALL nodes off to SelectExprFP. This fixes siod.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21197 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 01:14:13 +00:00
Chris Lattner
dea29e25c3
Fix a thinko. If the operand is promoted, pass the promoted value into
...
the new zero extend, not the original operand. This fixes cast bool -> long
on ppc.
Add an unrelated fixme
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21196 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 01:13:15 +00:00
Chris Lattner
51d2ed976f
rename getPPCOpcodeForSetCCNumber -> getPPCOpcodeForSetCCOpode to be more
...
correct. Remove the EmitComparison retvalue, as it is always the first arg.
Fix a place where we incorrectly passed in the setcc opcode instead of the
setcc number, causing us to miscompile crafty. Crafty now works!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21195 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 01:03:31 +00:00
Nate Begeman
706471e291
fix ISD::BRCONDTWOWAY codegen to not deference the end() iterator
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21193 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 23:35:05 +00:00
Chris Lattner
9184bfbbf4
Fix CodeGen/Generic/2005-05-09-GlobalInPHI.ll, which was reduced from 254.gap.
...
This caused the "use before a def" assertion on some programs.
With this patch, 254.gap now passes with the PPC backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21191 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 22:05:17 +00:00
Chris Lattner
a2daa8c78d
add a little peephole optimization. This allows us to codegen:
...
int a(short i) {
return i & 1;
}
as
_a:
andi. r3, r3, 1
blr
instead of:
_a:
rlwinm r2, r3, 0, 16, 31
andi. r3, r2, 1
blr
on ppc. It should also help the other risc targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21189 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 21:43:54 +00:00
Chris Lattner
91277ea45c
do not set the root to null if an argument is dead
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21188 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 21:23:24 +00:00
Nate Begeman
cd08e4cb7e
Add rlwnm instruction for variable rotate
...
Generate rotate left/right immediate
Generate code for brcondtwoway
Use new livein/liveout functionality
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21187 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 20:09:12 +00:00
Chris Lattner
27ee3a332d
Fix a crash on 173.applu by asking for a constant bigger than 32-bits.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21185 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 19:47:21 +00:00
Chris Lattner
f429a3e0f6
Switch this instruction selector over to using liveins and liveouts, eliminating
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implicit defs on entry to the function. yaay :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21184 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 16:32:30 +00:00
Chris Lattner
8e7d87b228
there is no need to remove this instruction, linscan does it already as it
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removes noop moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21183 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 16:24:20 +00:00
Chris Lattner
799a919dbc
Adjust live intervals to support a livein set
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21182 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 16:17:50 +00:00
Chris Lattner
4c52f0ec8c
Use live out sets for return values instead of imp_defs, which is cleaner and faster.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21181 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 15:23:56 +00:00
Chris Lattner
d493b34d31
Consider the livein/out set for a function, allowing targets to not have to
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use ugly imp_def/imp_uses for arguments and return values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21180 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 15:23:25 +00:00
Duraid Madina
e00e5ded51
ok, the "ia64 has a boatload of registers" joke stopped being funny today ;)
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* fix overallocation of integer (stacked) registers: we can't allocate
registers for local use if they are required as output registers
this fixes 'toast' in the test suite, and all sorts of larger programs
like bzip2 etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21178 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 11:53:00 +00:00
Nate Begeman
af4ab1b103
Optimize FSEL a bit for fneg arguments. This fixes the recently added test
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case so that we emit
_test_fneg_sel:
.LBB_test_fneg_sel_0: ;
fsel f1, f1, f3, f2
blr
instead of:
_test_fneg_sel:
.LBB_test_fneg_sel_0: ;
fneg f0, f1
fneg f0, f0
fsel f1, f0, f3, f2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21177 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 09:33:07 +00:00
Chris Lattner
67ac5f459e
Fix CodeGen/SparcV9/2005-05-09-GEP-Crash.ll a crash on some specfp program
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lets hope this doesn't break other programs with induced entropy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21174 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 06:27:14 +00:00
Chris Lattner
59723e9698
recognize some patterns as fabs operations, so that fabs at the source level
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is deconstructed then reconstructed here. This catches 19 fabs's in 177.mesa
9 in 168.wupwise, 5 in 171.swim, 3 in 172.mgrid, and 14 in 173.applu out of
specfp2000.
This allows the X86 code generator to make MUCH better code than before for
each of these and saves one instr on ppc.
This depends on the previous CFE patch to expose these correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21171 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 05:15:53 +00:00
Chris Lattner
e7ccd4acd2
Emit BRCONDTWOWAY when possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21167 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 03:30:29 +00:00
Chris Lattner
411e888c1b
Legalize BRCONDTWOWAY into a BRCOND/BR pair if a target doesn't support it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21166 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 03:30:19 +00:00
Chris Lattner
ef847df087
print and fold BRCONDTWOWAY correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21165 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 03:27:28 +00:00
Chris Lattner
da4d4694a8
This target does not support/want ISD::BRCONDTWOWAY
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21164 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 03:22:37 +00:00
Chris Lattner
644db4ec5f
This target does not yet support ISD::BRCONDTWOWAY
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21163 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 03:22:30 +00:00
Nate Begeman
e88aa5b4d1
64b: Expand S/UREM
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32b: No longer pattern match fneg(fsub(fmul)) as fnmsub
Pattern match fsub a, mul(b, c) as fnmsub
Pattern match fadd a, mul(b, c) as fmadd
Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21161 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 03:05:51 +00:00
Chris Lattner
485df9b84b
canonicalize a bunch of operations involving fneg
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21160 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 03:02:46 +00:00
Nate Begeman
a9532d5dde
Fix 64b shifts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21159 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-08 23:45:01 +00:00
Nate Begeman
f3f2d6d378
Match Mac OS X 64 bit calling conventions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21157 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-08 21:26:05 +00:00
Andrew Lenharth
a32b9e31c6
collect a few statistics, factor constants (constant loading and mult), fix logic operation pattern matchs, supress FP div when int dividing by a constant
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21156 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-08 17:28:49 +00:00
Duraid Madina
6dcceb5ecb
fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn)
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fix hack in division (clean up frcpa instruction)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21153 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-08 10:01:48 +00:00
Chris Lattner
bf70b838e7
Fix bug: InstCombine/2005-05-07-UDivSelectCrash.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21152 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-08 04:03:26 +00:00
Nate Begeman
7e7fadd2ea
Optimized code sequences for setcc reg, 0
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Optimized code sequence for (a < 0) ? b : 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21150 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 20:30:01 +00:00
Andrew Lenharth
d3355e22a7
Alpha zero extends setcc results
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21149 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 20:11:32 +00:00
Chris Lattner
5a6bace3ab
If a target zero or sign extends the result of its setcc, allow folding of
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this into sign/zero extension instructions later.
On PPC, for example, this testcase:
%G = external global sbyte
implementation
void %test(int %X, int %Y) {
%C = setlt int %X, %Y
%D = cast bool %C to sbyte
store sbyte %D, sbyte* %G
ret void
}
Now codegens to:
cmpw cr0, r3, r4
li r3, 1
li r4, 0
blt .LBB_test_2 ;
.LBB_test_1: ;
or r3, r4, r4
.LBB_test_2: ;
addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
stb r3, 0(r2)
instead of:
cmpw cr0, r3, r4
li r3, 1
li r4, 0
blt .LBB_test_2 ;
.LBB_test_1: ;
or r3, r4, r4
.LBB_test_2: ;
*** rlwinm r3, r3, 0, 31, 31
addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
stb r3, 0(r2)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21148 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 19:43:53 +00:00
Chris Lattner
cbd06fc3d7
PowerPC zero extends setcc results
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21147 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 19:41:49 +00:00
Chris Lattner
6659bd7592
X86 zero extends setcc results
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21146 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 19:41:46 +00:00
Chris Lattner
2467392c59
Remove somethign I had for testing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21144 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 18:58:54 +00:00
Andrew Lenharth
2966e84a8d
fix a small optimization opertunity and make gcc happy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21143 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 18:15:28 +00:00
Chris Lattner
67255a1d17
This patch does two things. First, it canonicalizes 'X >= C' -> 'X > C-1'
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(likewise for <= >=u >=u).
Second, it implements a special case hack to turn 'X gtu SINTMAX' -> 'X lt 0'
On powerpc, for example, this changes this:
lis r2, 32767
ori r2, r2, 65535
cmplw cr0, r3, r2
bgt .LBB_test_2
into:
cmpwi cr0, r3, 0
blt .LBB_test_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21142 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 18:14:58 +00:00
Andrew Lenharth
320174f009
fixup magic constant making code. tested by thousands of random divisions.... by 10000. ok, so random divisors would be good too, but this at least fixes some things
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21140 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 17:19:16 +00:00
Andrew Lenharth
9bf59d7ed2
lowercase instructions, makes diff happier
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21139 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 17:17:48 +00:00
Chris Lattner
7edc8c223e
Implement the following xforms:
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(X-Y)-X --> -Y
A + (B - A) --> B
(B - A) + A --> B
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21138 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 17:14:51 +00:00
Chris Lattner
08954a26e4
Implement InstCombine/add.ll:test28, transforming C1-(X+C2) --> (C1-C2)-X.
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This occurs several dozen times in specint2k, particularly in crafty and gcc
apparently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21136 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 16:28:01 +00:00
Chris Lattner
43d84d6b71
Transform X-(X+Y) == -Y and X-(Y+X) == -Y
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21134 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 16:15:25 +00:00
Andrew Lenharth
273a1f956f
It wasn't happy about this either
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21133 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 14:18:13 +00:00
Andrew Lenharth
706be918ca
Yea, it wasn't happy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21132 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 13:55:53 +00:00
Duraid Madina
e6a0b6cbda
teach asmprinter to print s8/s14 operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21131 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 12:34:36 +00:00