22588 Commits

Author SHA1 Message Date
Benjamin Kramer
c975958498 ARM: Let the assembler reject v5 instructions in v4 mode.
PR18524.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199559 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-18 19:03:19 +00:00
NAKAMURA Takumi
ee760949ab [CMake] Add llvm-tblgen to dependencies of check-llvm.
llvm-tblgen is not built when external LLVM_TABLEGEN is specified.
Even then, llvm-tblgen should be built for testing tblgen itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199558 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-18 19:01:08 +00:00
Benjamin Kramer
8e937c39bb InstCombine: Make the (fmul X, -1.0) -> (fsub -0.0, X) transform handle vectors too.
PR18532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199553 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-18 16:43:14 +00:00
Adrian Prantl
f9af5bdd63 Debug info (LTO): Move the creation of accessibility flags to
getOrCreateSubprogramDIE to avoid attributes being added twice when DIEs
are merged.

rdar://problem/15842330.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199536 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-18 02:12:00 +00:00
Owen Anderson
774cec5748 Fix more instances of dropped fast math flags when optimizing FADD instructions. All found by inspection (aka grep).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199528 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-18 00:48:14 +00:00
Reid Kleckner
3cbfa1617f Add an inalloca flag to allocas
Summary:
The only current use of this flag is to mark the alloca as dynamic, even
if its in the entry block.  The stack adjustment for the alloca can
never be folded into the prologue because the call may clear it and it
has to be allocated at the top of the stack.

Reviewers: majnemer

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2571

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199525 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 23:58:17 +00:00
Rui Ueyama
9106d365f5 llvm-objdump/COFF: Print ordinal base number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199518 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 22:02:24 +00:00
Juergen Ributzka
ceaf829339 Add two new calling conventions for runtime calls
This patch adds two new target-independent calling conventions for runtime
calls - PreserveMost and PreserveAll.
The target-specific implementation for X86-64 is defined as following:
  - Arguments are passed as for the default C calling convention
  - The same applies for the return value(s)
  - PreserveMost preserves all GPRs - except R11
  - PreserveAll preserves all GPRs and all XMMs/YMMs - except R11

Reviewed by Lang and Philip

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199508 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 19:47:03 +00:00
Daniel Sanders
41e1c04201 [mips][msa] Correct pattern for LSA
Summary:
$rs and $rt were the wrong way round in the .td and the testcase wasn't
strict enough to detect the mistake.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2554

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199498 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 15:40:05 +00:00
Renato Golin
3e2346341c Add MLA alias for ARMv4 support.
Fix MLA defs to use register class GPRnopc.
Add encoding tests for multiply instructions.
(Alias for MUL/SMLAL/UMLAL added by r199026.)

Patch by Zhaoshi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199491 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 13:53:08 +00:00
Kostya Serebryany
bd2c711cdd [asan] extend asan-coverage (still experimental).
- add a mode for collecting per-block coverage (-asan-coverage=2).
   So far the implementation is naive (all blocks are instrumented),
   the performance overhead on top of asan could be as high as 30%.
 - Make sure the one-time calls to __sanitizer_cov are moved to function buttom,
   which in turn required to copy the original debug info into the call insn.

Here is the performance data on SPEC 2006
(train data, comparing asan with asan-coverage={0,1,2}):

                             asan+cov0     asan+cov1      diff 0-1    asan+cov2       diff 0-2      diff 1-2
       400.perlbench,        65.60,        65.80,         1.00,        76.20,         1.16,         1.16
           401.bzip2,        65.10,        65.50,         1.01,        75.90,         1.17,         1.16
             403.gcc,         1.64,         1.69,         1.03,         2.04,         1.24,         1.21
             429.mcf,        21.90,        22.60,         1.03,        23.20,         1.06,         1.03
           445.gobmk,       166.00,       169.00,         1.02,       205.00,         1.23,         1.21
           456.hmmer,        88.30,        87.90,         1.00,        91.00,         1.03,         1.04
           458.sjeng,       210.00,       222.00,         1.06,       258.00,         1.23,         1.16
      462.libquantum,         1.73,         1.75,         1.01,         2.11,         1.22,         1.21
         464.h264ref,       147.00,       152.00,         1.03,       160.00,         1.09,         1.05
         471.omnetpp,       115.00,       116.00,         1.01,       140.00,         1.22,         1.21
           473.astar,       133.00,       131.00,         0.98,       142.00,         1.07,         1.08
       483.xalancbmk,       118.00,       120.00,         1.02,       154.00,         1.31,         1.28
            433.milc,        19.80,        20.00,         1.01,        20.10,         1.02,         1.01
            444.namd,        16.20,        16.20,         1.00,        17.60,         1.09,         1.09
          447.dealII,        41.80,        42.20,         1.01,        43.50,         1.04,         1.03
          450.soplex,         7.51,         7.82,         1.04,         8.25,         1.10,         1.05
          453.povray,        14.00,        14.40,         1.03,        15.80,         1.13,         1.10
             470.lbm,        33.30,        34.10,         1.02,        34.10,         1.02,         1.00
         482.sphinx3,        12.40,        12.30,         0.99,        13.00,         1.05,         1.06


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199488 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 11:00:30 +00:00
Kevin Qin
b9536ac581 [AArch64 NEON] Expand vector for UDIV/SDIV/UREM/SREM/FREM as neon doesn't support these operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199485 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 09:54:30 +00:00
Craig Topper
50a2b1672d Teach x86 asm parser to handle 'opaque ptr' in Intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199477 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 07:44:10 +00:00
Craig Topper
9d0b786f72 Teach X86 asm parser to understand 'ZMMWORD PTR' in Intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199476 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 07:37:39 +00:00
Craig Topper
5d59bb44ee Fix intel syntax for 64-bit version of FXSAVE/FXRSTOR to use '64' suffix instead of 'q'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199474 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 07:25:39 +00:00
Hao Liu
84887ceca3 [AArch64]Fix the problem can't select f16_to_f32 and f32_to_f16.
Also add copy support for FPR16.
Also add a missing test case file belongs to commit r197361.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199463 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 06:23:30 +00:00
Kevin Qin
16511208f2 [AArch64 NEON] Custom lower conversion between vector integer and vector floating point if element bit-width doesn't match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199462 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 05:52:35 +00:00
Hao Liu
555f57f67b [AArch64]Fix the problem can't select concat_vectors of two v1i32 types.
Also fix the problem can't select scalar_to_vector from f32 to v2f32/v4f32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199461 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 05:44:46 +00:00
Reid Kleckner
ad60d3c304 Change inalloca rules to make it only apply to the last parameter
This makes things a lot easier, because we can now talk about the
"argument allocation", which allocates all the memory for the call in
one shot.

The only functional change is to the verifier for a feature that hasn't
shipped yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199434 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 22:59:24 +00:00
Owen Anderson
5ee5e0c430 Fix two cases where we could lose fast math flags when optimizing FADD expressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199427 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 21:26:02 +00:00
Owen Anderson
5d9450f92f Fix an instance where we would drop fast math flags when performing an fdiv to reciprocal multiply transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199425 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 21:07:52 +00:00
Owen Anderson
da5e148474 Fix a bug in InstCombine where we failed to preserve fast math flags when optimizing an FMUL expression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199424 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 20:59:41 +00:00
Rui Ueyama
6010e5dfee llvm-objdump/COFF: Print DLL name in the export table header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199422 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 20:50:34 +00:00
Owen Anderson
a2a8bbb30f Teach InstCombine that (fmul X, -1.0) can be simplified to (fneg X), which LLVM expresses as (fsub -0.0, X).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199420 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 20:36:42 +00:00
Ed Maste
22939fa0a4 llvm-symbolizer: make mangled name heuristic apply to all symbols
PR: http://llvm.org/pr18431
Review: http://llvm-reviews.chandlerc.com/D2552


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199404 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 17:25:12 +00:00
Amara Emerson
fc17ce612f Move the xscale build attribute test to the proper place and remove the old one.
The encoding of build attributes is already tested in CodeGen/ARM/build-attributes-encoding.s


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199393 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 15:11:54 +00:00
Jiangning Liu
43a785be50 For ARM, fix assertuib failures for some ld/st 3/4 instruction with wirteback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199369 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 09:16:13 +00:00
Elena Demikhovsky
165f7ac98f AVX-512: fixed a compare pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199366 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 08:45:54 +00:00
Craig Topper
85026d9375 Allow x86 mov instructions to/from memory with absolute address to be encoded and disassembled with a segment override prefix. Fixes PR16962.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199364 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 07:36:58 +00:00
Bill Wendling
f847b5bbad Fix typo: : not ;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199359 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 07:08:22 +00:00
Rui Ueyama
fb432acff8 llmv-objdump/COFF: Print export table contents.
This patch adds the capability to dump export table contents. An example
output is this:

  Export Table:
   Ordinal      RVA  Name
         5   0x2008  exportfn1
         6   0x2010  exportfn2

By adding this feature to llvm-objdump, we will be able to use it to check
export table contents in LLD's tests. Currently we are doing binary
comparison in the tests, which is fragile and not readable to humans.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199358 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 07:05:49 +00:00
Rafael Espindola
2cc9ba0125 Convert test to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199355 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 06:31:20 +00:00
Arnold Schwaighofer
8963071a14 BasicAA: We need to check both access sizes when comparing a gep and an
underlying object of unknown size.

Fixes PR18460.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199351 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 04:53:18 +00:00
Manman Ren
2666b15908 Report a warning when dropping outdated debug info metadata.
Use DiagnosticInfo to emit the warning.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199346 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 01:51:12 +00:00
Reed Kotler
897473a28d Adjust offsets for max load instruction offsets. This is more pessimistic
than it needs to be by 1 bit but I need to finish some other things so 
that all the boundary cases will work in that situation. constpool.c
in test-suite will fail to assemble under our new internal test-suite sync
without this change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199343 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 00:47:46 +00:00
David Peixotto
a034c96443 Fix parsing of .symver directive on ARM
ARM assembly syntax uses @ for a comment, execpt for the second
parameter of the .symver directive which requires @ as part of the
symbol name. This commit fixes the parsing of this directive by
adding a special case for ARM for this one argumnet.

To make the change we had to move the AllowAtInIdentifier variable
to the MCAsmLexer interface (from AsmLexer) and expose a setter for
the value.  The ELFAsmParser then toggles this value when parsing
the second argument to the .symver directive for a target that
uses @ as a comment symbol


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199339 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 22:40:02 +00:00
Andrea Di Biagio
36280bde58 Update test/CodeGen/X86/vbinop-simplify-bug.ll.
Redirect the output of llc to /dev/null.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199329 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 20:16:14 +00:00
Andrea Di Biagio
3cab648f22 [DAGCombiner] Fix a wrong check in method SimplifyVBinOp.
This fixes a regression intruced by r199135.

Revision 199135 tried to simplify part of the logic in method
DAGCombiner::SimplifyVBinOp introducing calls to method BuildVectorSDNode::isConstant().

However, that revision wrongly changed the check performed by method
SimplifyVBinOp to identify dag nodes that can be folded.
Before revision 199135, that method only tried to simplify vector binary operations
if both operands were build_vector of Constant/ConstantFP/Undef only.

After revision 199135, method SimplifyVBinop tried to
simplify also vector binary operations with only one constant operand.

This fixes the problem restoring the old behavior of SimplifyVBinOp.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199328 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 19:51:32 +00:00
Kevin Enderby
96f3b25e8a Update the X86 assembler for .intel_syntax to accept
the | and & bitwise operators.

rdar://15570412


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 19:05:24 +00:00
Rafael Espindola
03f1cb72a4 Make sure we create a new archive by deleting any stale ones first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199319 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 16:56:57 +00:00
Zoran Jovanovic
814c8910f2 LL and SC decoder method fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199316 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 13:17:33 +00:00
Zoran Jovanovic
f5c2d3896b Added support for LWU microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199315 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 13:01:18 +00:00
David Majnemer
f62176f047 WinCOFF: Transform IR expressions featuring __ImageBase into image relative relocations
MSVC on x64 requires that we create image relative symbol
references to refer to RTTI data. Seeing as how there is no way to
explicitly make reference to a given relocation type in LLVM IR, pattern
match expressions of the form &foo - &__ImageBase.

Differential Revision: http://llvm-reviews.chandlerc.com/D2523


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199312 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 09:16:42 +00:00
Renato Golin
f433beee88 Revert 199262 - MCJIT remote still failing on ARM
Disabling remote MCJIT tests on ARM again, as they're still failing when
self-hosting on ARM, despite all my tests. At least now we have more info
on what message it's breaking and what is going on. Investigating.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199310 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 09:09:46 +00:00
Renato Golin
fdd4da1f8b Re-disable MCJIT remote tests on ARM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199309 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 09:09:39 +00:00
Andrew Trick
d5a74a754d Fix PR18449: SCEV needs more precise max BECount for multi-exit loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199299 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 06:42:11 +00:00
Jiangning Liu
b6db372c96 For AArch64, lowering sext_inreg and generate optimized code by using SXTL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199296 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 05:08:01 +00:00
Hans Wennborg
89fa06ba0f Switch-to-lookup tables: set threshold to 3 cases
There has been an old FIXME to find the right cut-off for when it's worth
analyzing and potentially transforming a switch to a lookup table.

The switches always have two or more cases. I could not measure any speed-up
by transforming a switch with two cases. A switch with three cases gets a nice
speed-up, and I couldn't measure any compile-time regression, so I think this
is the right threshold.

In a Clang self-host, this causes 480 new switches to be transformed,
and reduces the final binary size with 8 KB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199294 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 05:00:27 +00:00
Arnold Schwaighofer
e96fec2e43 LoopVectorize: Only strip casts from integer types when replacing symbolic
strides

Fixes PR18480.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199291 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 03:35:46 +00:00
Rafael Espindola
f6cb056e41 Only mark functions as micromips.
The GNU as behavior is a bit different and very strange. It will mark any
label that contains an instruction. We can implement that, but using the
type looks more natural since gas will not mark a function if a .word is
used to output the instructions!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199287 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 03:07:12 +00:00