Commit Graph

74736 Commits

Author SHA1 Message Date
Yaron Keren
499e74c3cd Silence warning: variable 'buffer' set but not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223389 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 21:36:38 +00:00
Bruno Cardoso Lopes
9eb2a386c7 [x86] Fix isOffsetSuitableForCodeModel kernel code model offset
Offset == 0 is a valid offset for kernel code model according to the
x86_64 System V ABI. Found by inspection, no testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223383 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 20:36:06 +00:00
Weiming Zhao
1b77bb5628 [AArch64] Combining Load and IntToFp should check for neon availability
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223382 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 20:25:50 +00:00
Asiri Rathnayake
61f3193001 Fix yet another unseen regression caused by r223113
r223113 added support for ARM modified immediate assembly syntax. Which
assumes all immediate operands are prefixed with a '#'. This assumption
is wrong as per the ARMARM - which recommends that all '#' characters be
treated optional. The current patch fixes this regression and adds a test
case. A follow-up patch will expand the test coverage to other instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223381 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 19:34:59 +00:00
Jonathan Roelofs
3d47855394 Fix thumbv4t indirect calls
So there are a couple of issues with indirect calls on thumbv4t. First, the most
'obvious' instruction, 'blx' isn't available until v5t. And secondly, the
next-most-obvious sequence: 'mov lr, pc; bx rN' doesn't DTRT in thumb code
because the saved off pc has its thumb bit cleared, so when the callee returns
we end up in ARM mode.... yuck.

The solution is to 'bl' to a nearby landing pad with a 'bx rN' in it.

We could cut down on code size by sharing the landing pads between call sites
that are close enough, but for the moment let's do correctness first and look at
performance later.


Patch by: Iain Sandoe

http://reviews.llvm.org/D6519


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223380 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 19:34:50 +00:00
Hal Finkel
efbb95a1be Revert "r223364 - Revert r223347 which has caused crashes on bootstrap bots."
Reapply r223347, with a fix to not crash on uninserted instructions (or more
precisely, instructions in uninserted blocks). bugpoint was able to reduce the
test case somewhat, but it is still somewhat large (and relies on setting
things up to be simplified during inlining), so I've not included it here.
Nevertheless, it is clear what is going on and why.

Original commit message:

Restrict somewhat the memory-allocation pointer cmp opt from r223093

Based on review comments from Richard Smith, restrict this optimization from
applying to globals that might resolve lazily to other dynamically-loaded
modules, and also from dynamic allocas (which might be transformed into malloc
calls). In short, take extra care that the compared-to pointer is really
simultaneously live with the memory allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223371 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 17:45:19 +00:00
Philip Reames
ad90e3ad14 Fix a typo: use of cast where dyn_cast was intended
This bug has the effect of converting a test of isGCRelocate(InvokeInst*) from a false return to a crash.  

This may be the root cause of the crash Joerg reported against r223137, but I'm still waiting for a clean build of clang to complete to be able to confirm.  Once I've confirmed the issue, I'll submit a test case separately.  



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223370 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 17:27:58 +00:00
Rafael Espindola
3f598f77bd Remove dead code. NFC.
This interface was added 2 years ago but users never developed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223368 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 16:59:36 +00:00
Asiri Rathnayake
9571274787 Fix a minor regression introduced in r223113
r223113 added support for ARM modified immediate assembly syntax. That patch
has broken support for immediate expressions, as in:
    add r0, #(4 * 4)
It wasn't caught because we don't have any tests for this feature. This patch
fixes this regression and adds test cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223366 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 14:49:07 +00:00
Alexander Potapenko
182d9aaccb Revert r223347 which has caused crashes on bootstrap bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223364 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 14:22:27 +00:00
Rafael Espindola
7e32ae6cf7 Revert "[Thumb/Thumb2] Added restrictions on PC, LR, SP in the register list for PUSH/POP/LDM/STM. <Differential Revision: http://reviews.llvm.org/D6090>"
This reverts commit r223356.

It was failing check-all (MC/ARM/thumb.s in particular).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223363 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 14:10:20 +00:00
Michael Kuperstein
5e343e6fd0 [X86] Improve a dag-combine that handles a vector extract -> zext sequence.
The current DAG combine turns a sequence of extracts from <4 x i32> followed by zexts into a store followed by scalar loads.
According to measurements by Martin Krastev (see PR 21269) for x86-64, a sequence of an extract, movs and shifts gives better performance. However, for 32-bit x86, the previous sequence still seems better.

Differential Revision: http://reviews.llvm.org/D6501

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223360 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 13:49:51 +00:00
Jyoti Allur
996b683a9f [Thumb/Thumb2] Added restrictions on PC, LR, SP in the register list for PUSH/POP/LDM/STM. <Differential Revision: http://reviews.llvm.org/D6090>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223356 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 11:52:49 +00:00
Andrea Di Biagio
e6cb70164e [X86] Simplify code. NFC.
Replaced some logic that checked if a build_vector node is doing a splat of a
non-undef value with a call to method BuildVectorSDNode::getSplatValue().
No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223354 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 11:21:44 +00:00
Patrik Hagglund
cfb121f286 Use DomTree in MachineSink to sink over diamonds.
According to a previous FIXME comment we now not only look at MBB
successors, but also handle code sinking past them:

  x = computation
  if () {} else {}
  use x

The instruction could be sunk over the whole diamond for the
if/then/else (or loop, etc), allowing it to be sunk into other blocks
after that.

Modified test added in r204522, due to one spill less present.

Minor fixes in comments.

Patch provided by Jonas Paulsson. Reviewed by Hal Finkel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223350 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 10:36:42 +00:00
Simon Pilgrim
94590ca4cf [InstCombine] Minor optimization for bswap with binary ops
Added instcombine optimizations for BSWAP with AND/OR/XOR ops:

OP( BSWAP(x), BSWAP(y) ) -> BSWAP( OP(x, y) )
OP( BSWAP(x), CONSTANT ) -> BSWAP( OP(x, BSWAP(CONSTANT) ) )

Since its just a one liner, I've also added BSWAP to the DAGCombiner equivalent as well:

fold (OP (bswap x), (bswap y)) -> (bswap (OP x, y))

Refactored bswap-fold tests to use FileCheck instead of just checking that the bswaps had gone.

Differential Revision: http://reviews.llvm.org/D6407



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223349 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 09:44:01 +00:00
Elena Demikhovsky
73ae1df82c Masked Load / Store Intrinsics - the CodeGen part.
I'm recommiting the codegen part of the patch.
The vectorizer part will be send to review again.

Masked Vector Load and Store Intrinsics.
Introduced new target-independent intrinsics in order to support masked vector loads and stores. The loop vectorizer optimizes loops containing conditional memory accesses by generating these intrinsics for existing targets AVX2 and AVX-512. The vectorizer asks the target about availability of masked vector loads and stores.
Added SDNodes for masked operations and lowering patterns for X86 code generator.
Examples:
<16 x i32> @llvm.masked.load.v16i32(i8* %addr, <16 x i32> %passthru, i32 4 /* align */, <16 x i1> %mask)
declare void @llvm.masked.store.v8f64(i8* %addr, <8 x double> %value, i32 4, <8 x i1> %mask)

Scalarizer for other targets (not AVX2/AVX-512) will be done in a separate patch.

http://reviews.llvm.org/D6191



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223348 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 09:40:44 +00:00
Hal Finkel
d70d5148a6 Restrict somewhat the memory-allocation pointer cmp opt from r223093
Based on review comments from Richard Smith, restrict this optimization from
applying to globals that might resolve lazily to other dynamically-loaded
modules, and also from dynamic allocas (which might be transformed into malloc
calls). In short, take extra care that the compared-to pointer is really
simultaneously live with the memory allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223347 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 09:22:28 +00:00
Yaron Keren
ba8180b436 clang-formatted ranged loops and assignment, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223344 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 08:30:39 +00:00
Jean-Daniel Dupas
206b84f324 Add mach-o LC_RPATH support to llvm-objdump
Summary: Add rpath load command support in Mach-O object and update llvm-objdump to use it.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6512

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223343 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 07:37:02 +00:00
Michael Liao
d3c452a506 [X86] Clean up whitespace as well as minor coding style
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223339 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 05:20:33 +00:00
Colin LeMahieu
152ac18e80 [Hexagon] Marking some instructions as CodeGenOnly=0 and adding disassembly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223334 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 03:41:21 +00:00
Michael Liao
fd0832ea89 [X86] Restore X86 base pointer after call to llvm.eh.sjlj.setjmp
Commit on 

- This patch fixes the bug described in
  http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-May/062343.html

The fix allocates an extra slot just below the GPRs and stores the base pointer
there. This is done only for functions containing llvm.eh.sjlj.setjmp that also
need a base pointer. Because code containing llvm.eh.sjlj.setjmp saves all of
the callee-save GPRs in the prologue, the offset to the extra slot can be
computed before prologue generation runs.

Impact at run-time on affected functions is::

  - One extra store in the prologue, The store saves the base pointer.
  - One extra load after a llvm.eh.sjlj.setjmp. The load restores the base pointer.

Because the extra slot is just above a gap between frame-pointer-relative and
base-pointer-relative chunks of memory, there is no impact on other offset
calculations other than ensuring there is room for the extra slot.

http://reviews.llvm.org/D6388

Patch by Arch Robison <arch.robison@intel.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223329 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 00:56:38 +00:00
Hal Finkel
ec086bf087 [PowerPC] 'cc' should be an alias only to 'cr0'
We had mistakenly believed that GCC's 'cc' referred to the entire
condition-code register (cr0 through cr7) -- and implemented this in r205630 to
fix PR19326, but 'cc' is actually an alias only to 'cr0'. This is causing LLVM
to clobber too much with legacy code with inline asm using the 'cc' clobber.

Fixes PR21451.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223328 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 00:46:20 +00:00
NAKAMURA Takumi
f769980c77 HexagonMCInst.h: Qualify constants explicitly to appease msc17.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223325 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 00:26:39 +00:00
Matt Arsenault
459e595697 Allow target to specify prefix for labels
Use the MCAsmInfo instead of the DataLayout, and allow
specifying a custom prefix for labels specifically. HSAIL
requires that labels begin with @, but global symbols with &.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 00:06:57 +00:00
Philip Reames
5862c2af3e A few more checks for gc.statepoints in the Verifier
This is simply a grab bag of unrelated checks:
- A statepoint call can't be marked readonly or readnone
- We don't currently support inline asm or varadic target functions.  Both could be supported, but don't currently work.
- I forgot to check that the number of call arguments actually matched the wrapped callee in my previous change.  Included here.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223322 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 00:01:48 +00:00
Hal Finkel
c48b3bf318 [PowerPC] Fix inline asm memory operands not to use r0
On PowerPC, inline asm memory operands might be expanded as 0($r), where $r is
a register containing the address. As a result, this register cannot be r0, and
we need to enforce this register subclass constraint to prevent miscompiling
the code (we'd get this constraint for free with the usual instruction
definitions, but that scheme has no knowledge of how we end up printing inline
asm memory operands, and so here we need to do it 'by hand'). We can accomplish
this within the current address-mode selection framework by introducing an
explicit COPY_TO_REGCLASS node.

Fixes PR21443.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223318 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 23:40:13 +00:00
Quentin Colombet
331ec379a0 [RegAllocFast] Handle implicit definitions conservatively.
Prior to this commit, physical registers defined implicitly were considered free
right after their definition, i.e.. like dead definitions. Therefore, their uses
had to immediately follow their definitions, otherwise the related register may
be reused to allocate a virtual register.

This commit fixes this assumption by keeping implicit definitions alive until
they are actually used. The downside is that if the implicit definition was dead
(and not marked at such), we block an otherwise available register. This is
however conservatively correct and makes the fast register allocator much more
robust in particular regarding the scheduling of the instructions.

Fixes PR21700.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223317 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 23:38:08 +00:00
Kostya Serebryany
0fd28b40a4 [msan] allow -fsanitize-coverage=N together with -fsanitize=memory, llvm part
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223312 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 23:28:26 +00:00
Jacques Pienaar
a78929d201 Test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223310 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 23:21:02 +00:00
Rafael Espindola
55d5ea3be3 Split the set of identified struct types into opaque and non-opaque ones.
The non-opaque part can be structurally uniqued. To keep this to just
a hash lookup, we don't try to unique cyclic types.

Also change the type mapping algorithm to be optimistic about a type
not being recursive and only create a new type when proven to be wrong.
This is not as strong as trying to speculate that we can keep the source
type, but is simpler (no speculation to revert) and more powerfull
than what we had before (we don't copy non-recursive types at least).

I initially wrote this to try to replace the name based type merging.
It is not strong enough to replace it, but is is a useful addition.

With this patch the number of named struct types is a clang lto bootstrap goes
from 49674 to 15986.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223278 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 22:36:37 +00:00
Sanjay Patel
7e4c9bda0a fix typos, grammar, formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223276 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 22:28:05 +00:00
Philip Reames
07caf6b709 Strength Verifier checks around the types involved in a statepoint
Add checks that the types in a gc.statepoint sequence match the wrapper callee and that relocating a pointer doesn't change it's type.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223275 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 22:23:24 +00:00
Matthias Braun
704923b2ba correct spelling, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223274 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 22:10:39 +00:00
Matthias Braun
b0ec6c21b7 [SimplifyLibCalls] Improve double->float shrinking to consider constants
This allows cases like float x; fmin(1.0, x); to be optimized to fminf(1.0f, x);

rdar://19049359

Differential Revision: http://reviews.llvm.org/D6496

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223270 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 21:46:33 +00:00
Matthias Braun
9d362ec2a4 [SimplifyLibCalls] Enable double to float shrinking for copysign
rdar://19049359

Differential Revision: http://reviews.llvm.org/D6495

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223269 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 21:46:29 +00:00
Colin LeMahieu
ec42b05190 [Hexagon] Converting member InstrDesc to static variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223268 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 21:40:25 +00:00
Colin LeMahieu
ca1a325ec7 [Hexagon] Converting subclass members to an implicit operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223264 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 20:23:22 +00:00
Philip Reames
93ce526d0a Make the Verifier more strict about gc.statepoints
The recently added documentation for statepoints claimed that we checked the parameters of the various intrinsics for validity.  This patch adds the code to actually do so.  I also removed a couple of redundant checks for conditions which are checked elsewhere in the Verifier and simplified the logic using the helper functions from Statepoint.h.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223259 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 19:53:15 +00:00
Will Schmidt
ad304153f4 Add TableGen info for Power8.
This is based on the Power7 version, with units added and renamed to match P8.

Differential Revision: http://reviews.llvm.org/D6358




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223257 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 18:46:30 +00:00
Roman Divacky
788af07d5d Change the name to be in style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223255 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 18:39:44 +00:00
Tom Stellard
f41e1d1a45 R600/SI: Move SIInsertWaits into AMDGPUPassConfig::addPreSched2()
This pass needs to be run after PrologEpilogInserter, because
that pass may inserter spill code which reads or writes memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223253 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 18:27:08 +00:00
Tom Stellard
8a8dc6a29d R600/SI: Don't run SI passes on R600 subtargets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223252 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 18:27:05 +00:00
Tim Northover
34c1d6673e AArch64: fix wrong-endian parameter passing.
The blocked arguments code didn't take account of the hacks needed to support
it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223247 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 17:49:26 +00:00
Colin LeMahieu
cf17914f89 [NFC] Fixing pendantic warning extra semicolons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223246 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 17:36:39 +00:00
Colin LeMahieu
d54ac604b3 [Hexagon] [NFC] Moving function implementations out of header. Clang-formatting files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223245 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 17:35:39 +00:00
Colin LeMahieu
e6c2d47e82 [Hexagon] [NFC] Renaming *packetStart to *packetBegin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223243 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 17:31:43 +00:00
Aaron Ballman
13e20a9dac Silencing a 32-bit implicit conversion warning in MSVC; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223237 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 14:39:58 +00:00
Evgeniy Stepanov
78d5d1ea1b msan] Add compile-time checks for missing origins.
This change makes MemorySanitizer instrumentation a bit more strict
about instructions that have no origin id assigned to them.

This would have caught the bug that was fixed in r222918.

This is re-commit of r222997, reverted in r223211, with 3 more
missing origins added.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223236 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 14:15:53 +00:00