Commit Graph

74736 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
04122090c2 [SwitchLowering] Handle multiple destinations on condensed case stmts
Switch cases statements with sequential values that branch to the same
destination BB may often be handled together in a single new source BB.
In this scenario we need to remove remaining incoming values from PHI
instructions in the destination BB, as to match the number of source
branches.

Differential Revision: http://reviews.llvm.org/D6415

rdar://problem/19040894

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222926 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-28 19:47:33 +00:00
Sanjay Patel
c5992119fc Enable FeatureFastUAMem for btver2
Allow unaligned 16-byte memop codegen for btver2. No functional changes for any other subtargets.

Replace the existing supposed small memcpy test with an actual test of a small memcpy. 
The previous test wasn't using FileCheck either.

This patch should allow us to close PR21541 ( http://llvm.org/bugs/show_bug.cgi?id=21541 ).

Differential Revision: http://reviews.llvm.org/D6360



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222925 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-28 18:40:18 +00:00
Rafael Espindola
f716393db9 Add back r222727 with a fix.
The original patch would fail when:

* A dst opaque type (%A) is matched with a src type (%A).
* A src opaque (%E) type is then speculatively matched with %A and the
  speculation fails afterward.
* When rolling back the speculation we would cancel the source %A to dest
  %A mapping.

The fix is to keep an explicit list of which resolutions are speculative.

Original message:

Fix overly aggressive type merging.

If we find out that two types are *not* isomorphic, we learn nothing about
opaque sub types in both the source and destination.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222923 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-28 16:41:24 +00:00
Rafael Espindola
fdf8098678 Add an assert and use a range loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222922 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-28 16:26:14 +00:00
Charlie Turner
3a8b98c984 Fix wrong encoding of MRSBanked.
Patch by Matthew Wahab.

Change-Id: Ia2a001ca2760028ea360fe77b56f203a219eefbc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222920 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-28 15:01:06 +00:00
Evgeniy Stepanov
434d82ef66 [msan] Fix origin propagation for select of floats.
MSan does not assign origin for instrumentation temps (i.e. the ones that do
not come from the application code), but "select" instrumentation erroneously
tried to use one of those.

https://code.google.com/p/memory-sanitizer/issues/detail?id=78


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222918 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-28 11:17:58 +00:00
Ankur Garg
9e947867b4 Removed extra line from a comment to test first commit. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222916 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-28 10:38:18 +00:00
Craig Topper
4c10f1789b Add missing 'override' keyword.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222911 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-28 03:58:26 +00:00
Tim Northover
402b6fdf9d Stop using ArrayRef of a const type.
I *think* this is what the GCC bots are complaining about.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222905 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 21:29:20 +00:00
Tim Northover
d7a4f74f15 AArch64: treat [N x Ty] as a block during procedure calls.
The AAPCS treats small structs and homogeneous floating (or vector) aggregates
specially, and guarantees they either get passed as a contiguous block of
registers, or prevent any future use of those registers and get passed on the
stack.

This concept can fit quite neatly into LLVM's own type system, mapping an HFA
to [N x float] and so on, and small structs to [N x i64]. Doing so allows
front-ends to emit AAPCS compliant code without having to duplicate the
register counting logic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222903 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 21:02:42 +00:00
Zoran Jovanovic
7dc6143a82 [mips][microMIPS] Implement SWM16 and LWM16 instructions
Differential Revision: http://reviews.llvm.org/D5579


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222901 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 18:28:59 +00:00
Jozef Kolek
13fbabb7c8 [mips][microMIPS] Implement BREAK16 and SDBBP16 instructions
Patch by Radovan Obradovic.

Differential Revision: http://reviews.llvm.org/D5048


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222900 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 18:18:42 +00:00
Daniel Sanders
68de93c3b4 [mips] Add synci instruction.
Patch by Amaury Pouly

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6421


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222899 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 17:28:10 +00:00
Rafael Espindola
8f9f6a612a Commit back the correct bits of r222760 (was r222538).
I also added a test.

Original message:

Allow FDE references outside the +/-2GB range supported by PC relative
offsets for code models other than small/medium. For JIT application,
memory layout is less controlled and can result in truncations
otherwise.

Patch from Akos Kiss.

Differential Revision: http://reviews.llvm.org/D6079

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222897 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 17:13:56 +00:00
Rafael Espindola
4bbcb6a682 Revert "Reapply 222538 and update tests to explicitly request small code model and PIC:"
This reverts commit r222760.

It changed our behaviour on PIC so we don't match gas anymore. It also
included lots of unnecessary changes to tests.

If those changes are desirable, there should be an independent discussion
as they are out of scope for that patch.

I will recommit the other bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222896 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 17:13:51 +00:00
Duncan P. N. Exon Smith
eb70fd030a Revert "Fix overly aggressive type merging."
This reverts commit r222727, which causes LTO bootstrap failures.

Last passing @ r222698:
http://lab.llvm.org:8080/green/job/clang-Rlto_master_build/532/

First failing @ r222843:
http://lab.llvm.org:8080/green/job/clang-Rlto_master_build/533/

Internal bootstraps pointed at a much narrower range: r222725 is
passing, and r222731 is failing.

LTO crashes while handling libclang.dylib:
http://lab.llvm.org:8080/green/job/clang-Rlto_master_build/533/consoleFull#-158682280549ba4694-19c4-4d7e-bec5-911270d8a58c

    GEP is not of right type for indices!
      %InfoObj.i.i = getelementptr inbounds %"class.llvm::OnDiskIterableChainedHashTable"* %.lcssa, i64 0, i32 0, i32 4, !dbg !123627
     %"class.clang::serialization::reader::ASTIdentifierLookupTrait" = type { %"class.clang::ASTReader.31859"*, %"class.clang::serialization::ModuleFile.31870"*, %"class.clang::IdentifierInfo"* }LLVM ERROR: Broken function found, compilation aborted!
    clang: error: linker command failed with exit code 1 (use -v to see invocation)

Looks like the new algorithm doesn't merge types aggressively enough.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222895 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 17:01:10 +00:00
Erik Eckstein
6cfbf12d77 reinstate r222872: Peephole optimization in switch table lookup: reuse the guarding table comparison if possible.
Fixed missing dominance check.
Original commit message:

This optimization tries to reuse the generated compare instruction, if there is a comparison against the default value after the switch.
Example:
   if (idx < tablesize)
      r = table[idx]; // table does not contain default_value
   else
      r = default_value;
   if (r != default_value)
      ...
Is optimized to:
   cond = idx < tablesize;
   if (cond)
      r = table[idx];
   else
      r = default_value;
   if (cond)
      ...
Jump threading will then eliminate the second if(cond).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222891 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 15:13:14 +00:00
Evgeniy Stepanov
c0b24f7949 [msan] Remove indirect call wrapping code.
This functionality was only used in MSanDR, which is deprecated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 14:54:02 +00:00
Jozef Kolek
2b8e58cc82 [mips][microMIPS] Implement disassembler support for 16-bit instructions LI16, ADDIUR1SP, ADDIUR2 and ADDIUS5
Differential Revision: http://reviews.llvm.org/D6419


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222887 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 14:41:44 +00:00
Charlie Turner
72ba1af89c Stop uppercasing build attribute data.
The string data for string-valued build attributes were being unconditionally
uppercased. There is no mention in the ARM ABI addenda about case conventions,
so it's technically implementation defined as to whether the data are
capitialised in some way or not. However, there are good reasons not to
captialise the data.

  * It's less work.
  * Some vendors may legitimately have case-sensitive checks for these
    attributes which would fail on LLVM generated object files.
  * There could be locale issues with uppercasing.

The original reasons for uppercasing appear to have stemmed from an
old codesourcery toolchain behaviour, see

http://comments.gmane.org/gmane.comp.compilers.llvm.cvs/87133

This patch makes the object file emitted no longer captialise string
data, it encodes as seen in the assembly source.

Change-Id: Ibe20dd6e60d2773d57ff72a78470839033aa5538

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222882 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 12:13:56 +00:00
Erik Eckstein
4646580bc8 Revert "Peephole optimization in switch table lookup: reuse the guarding table comparison if possible."
It is breaking the clang bootstrag.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222877 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 10:59:08 +00:00
Erik Eckstein
c394c42d6d Peephole optimization in switch table lookup: reuse the guarding table comparison if possible.
This optimization tries to reuse the generated compare instruction, if there is a comparison against the default value after the switch.
Example:
    if (idx < tablesize)
       r = table[idx]; // table does not contain default_value
    else
       r = default_value;
    if (r != default_value)
       ...
Is optimized to:
    cond = idx < tablesize;
    if (cond)
       r = table[idx];
    else
       r = default_value;
    if (cond)
       ...
\endcode
Jump threading will then eliminate the second if(cond).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222872 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 08:33:51 +00:00
David Majnemer
dcf39d2586 InstCombine: Restore optimizations lost in r210006
This restores our ability to optimize:
(X & C) == 0 ? X ^ C : X  into  X | C
(X & C) != 0 ? X ^ C : X  into  X & ~C

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222871 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 07:25:21 +00:00
NAKAMURA Takumi
f4860612a4 Add LLVMObject to LLVMExecutionEngine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222869 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 06:36:22 +00:00
David Majnemer
f45536e75e InstSimplify: Restore optimizations lost in r210006
This restores our ability to optimize:
(X & C) ? X & ~C : X  into  X & ~C
(X & C) ? X : X & ~C  into  X
(X & C) ? X | C : X  into  X
(X & C) ? X : X | C  into  X | C

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222868 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 06:32:46 +00:00
Lang Hames
973e54ac96 [MCJIT] Remove the local symbol table from RuntimeDlyd - it's not needed.
All symbols have to be stored in the global symbol to enable
cross-rtdyld-instance linking, so the local symbol table content is
redundant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222867 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 05:40:13 +00:00
Lang Hames
7032f3cbe4 [MCJIT] Replace JITEventListener::anchor (temporarily removed in r222861), and
move GDBRegistrationListener into ExecutionEngine to avoid layering violation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222864 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 01:41:16 +00:00
Lang Hames
daed11e664 [MCJIT] Remove JITEventListener's anchor until I can determine the right place
to put it. This should unbreak the Mips bots.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222861 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 00:15:28 +00:00
Lang Hames
51bd393f52 [MCJIT] Move get-any-symbol-load-address logic out of RuntimeDyld and into
RuntimeDyldChecker.

RuntimeDyld instances should only provide lookup for locally defined
symbols.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222859 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 00:12:28 +00:00
David Majnemer
9e6a1814c9 Revert "Added inst combine transforms for single bit tests from Chris's note"
This reverts commit r210006, it miscompiled libapr which is used in who
knows how many projects.

A test has been added to ensure that we don't regress again.

I'll work on a rewrite of what the optimization was trying to do later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222856 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 23:00:38 +00:00
Rui Ueyama
d2077b0631 Object/COFF: Fix off-by-one error for object having lots of relocations
llvm-objdump printed out an error message for this off-by-one error,
but because it always exits with 0 whether or not it found an error,
the test (llvm-objdump/coff-many-relocs.test) succeeded.
I made llvm-objdump exit with EXIT_FAILURE when an error is found.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222852 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 22:17:25 +00:00
Matt Arsenault
b69378a26d R600/SI: Use ZeroOrNegativeOneBooleanContent
This sort of doesn't matter since the setcc type is i1, but
this previously was using the default UndefinedBooleanContent. This
makes it more consistent with R600. This enables more optimizations
which typically give up on UndefinedBooleanContent. For example,
there is already a special case target DAG combine for
setcc + sext which can be eliminated in favor of what the generic
DAG combiner can do if it assumes boolean values are sign extended.
Since -1 is an inline immediate, using it is basically free and the
backend already uses it when a boolean value is needed in a wider type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222850 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 21:23:15 +00:00
Colin LeMahieu
74eb264493 [Hexagon] Adding cmp* immediate form instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222849 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 19:43:12 +00:00
Jozef Kolek
832e2301cd [mips][microMIPS] Implement disassembler support for 16-bit instructions LBU16, LHU16, LW16, SB16, SH16 and SW16
Differential Revision: http://reviews.llvm.org/D6405


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222847 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 18:56:38 +00:00
Colin LeMahieu
1df05cd7b6 [Hexagon] Adding and64, or64, and xor64 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222846 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 18:55:59 +00:00
Matt Arsenault
f87cce1540 R600/SI: Create e64 versions of and/or/xor in SILowerI1Copies
This fixes moving boolean constants into registers before operating
on them. They get permuted and shrunk down to e32 anyway later. This
is a temporary fix until the patch that removes these pseudos is
committed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222844 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 18:18:28 +00:00
Lang Hames
47539e066c [MCJIT] Fix missing return statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222841 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 17:21:41 +00:00
Lang Hames
216e532dc1 [MCJIT] Reapply r222828 and r222810-r222812 with fix for MSVC move-op issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222840 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 16:54:40 +00:00
Aaron Ballman
19afe67157 Reverting r222828 and r222810-r222812 as they broke the build on Windows.
http://bb.pgr.jp/builders/ninja-clang-i686-msc17-R/builds/11753

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222833 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 15:27:39 +00:00
Aaron Ballman
83fca23528 Removing a spurious semicolon; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222830 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 13:55:55 +00:00
Evgeniy Stepanov
a5a7331e71 Add missing "override".
Fixes compilation failure in r222810.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222828 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 12:26:03 +00:00
Will Newton
87a2f3751c Update AArch64 ELF relocations to ABI 1.0
This mostly entails adding relocations, however there are a couple of
changes to existing relocations:

1. R_AARCH64_NONE is defined to be zero rather than 256

R_AARCH64_NONE has been defined to be zero for a long time elsewhere
e.g. binutils and glibc since the submission of the AArch64 port in
2012 so this is required for compatibility.

2. R_AARCH64_TLSDESC_ADR_PAGE renamed to R_AARCH64_TLSDESC_ADR_PAGE21

I don't think there is any way for relocation names to leak out of LLVM
so this should not break anything.

Tested with check-all with no regressions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222821 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 10:49:18 +00:00
Elena Demikhovsky
10c8f38047 AVX-512: Scalar ERI intrinsics
including SAE mode and memory operand.
Added AVX512_maskable_scalar template, that should cover all scalar instructions in the future.

The main difference between AVX512_maskable_scalar<> and AVX512_maskable<> is using X86select instead of vselect.
I need it, because I can't create vselect node for MVT::i1 mask for scalar instruction.

http://reviews.llvm.org/D6378



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222820 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 10:46:49 +00:00
Lang Hames
31862ae541 [MCJIT] Re-enable GDB registration (temporarily disabled in r222811), but check
that we actually have an object to register first.

For MachO objects, RuntimeDyld::LoadedObjectInfo::getObjectForDebug returns an
empty OwningBinary<ObjectFile> which was causing crashes in the GDB registration
code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222812 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 07:39:03 +00:00
Lang Hames
11f81ba6a6 [MCJIT] Temporarily disable automatic JIT debugger registration.
The RuntimeDyld cleanup patch r222810 turned on GDB registration for MachO
objects. I expected this to be harmless, but it seems to have broken on
MacsOS. Temporarily disabling debugger registration while I dig in to what's
gone wrong.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222811 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 07:25:26 +00:00
Lang Hames
7acaefabf6 [MCJIT] Clean up RuntimeDyld's quirky object-ownership/modification scheme.
Previously, when loading an object file, RuntimeDyld (1) took ownership of the
ObjectFile instance (and associated MemoryBuffer), (2) potentially modified the
object in-place, and (3) returned an ObjectImage that managed ownership of the
now-modified object and provided some convenience methods. This scheme accreted
over several years as features were tacked on to RuntimeDyld, and was both
unintuitive and unsafe (See e.g. http://llvm.org/PR20722).

This patch fixes the issue by removing all ownership and in-place modification
of object files from RuntimeDyld. Existing behavior, including debugger
registration, is preserved.

Noteworthy changes include:

(1) ObjectFile instances are now passed to RuntimeDyld by const-ref.
(2) The ObjectImage and ObjectBuffer classes have been removed entirely, they
    existed to model ownership within RuntimeDyld, and so are no longer needed.
(3) RuntimeDyld::loadObject now returns an instance of a new class,
    RuntimeDyld::LoadedObjectInfo, which can be used to construct a modified
    object suitable for registration with the debugger, following the existing
    debugger registration scheme.
(4) The JITRegistrar class has been removed, and the GDBRegistrar class has been
    re-written as a JITEventListener.

This should fix http://llvm.org/PR20722 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222810 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 06:53:26 +00:00
Craig Topper
c0dae440e6 Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222801 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-26 00:46:26 +00:00
Simon Pilgrim
7f6cee9626 [X86][SSE] Improvements to byte shift shuffle matching
Since (v)pslldq / (v)psrldq instructions resolve to a single input argument it is useful to match it much earlier than we currently do - this prevents more complicated shuffles (notably insertion into a zero vector) matching before it.

Differential Revision: http://reviews.llvm.org/D6409



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222796 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 22:34:59 +00:00
Colin LeMahieu
5bf7bcf6b3 [Hexagon] Adding add64 and sub64 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222795 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 22:15:44 +00:00
Colin LeMahieu
7c45f13db6 Reverting 222792
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222793 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 21:39:57 +00:00
Colin LeMahieu
9980f8c78d [Hexagon] Adding compare with immediate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222792 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 21:30:28 +00:00
Colin LeMahieu
c688fdbeea [Hexagon] Adding NOP encoding bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222791 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 21:23:07 +00:00
Matt Arsenault
c9d99b504d R600/SI: Only use one DEBUG()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222789 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 21:03:22 +00:00
Cameron McInally
9f4bb0420d [AVX512] Add 512b integer shift by variable intrinsics and patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222786 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 20:41:51 +00:00
Colin LeMahieu
609c7fa14e [Hexagon] Adding C2_mux instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222784 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 20:20:09 +00:00
Craig Topper
690b96281f Remove space before tab in all AVX512 mnemonic strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222778 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 20:11:23 +00:00
Colin LeMahieu
a95af5c17d [Hexagon] Replacing cmp* instructions with ones that contain encoding bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222771 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 18:20:52 +00:00
Hans Wennborg
4d48c3f1aa LazyValueInfo: Actually re-visit partially solved block-values in solveBlockValue()
If solveBlockValue() needs results from predecessors that are not already
computed, it returns false with the intention of resuming when the dependencies
have been resolved. However, the computation would never be resumed since an
'overdefined' result had been placed in the cache, preventing any further
computation.

The point of placing the 'overdefined' result in the cache seems to have been
to break cycles, but we can check for that when inserting work items in the
BlockValue stack instead. This makes the "stop and resume" mechanism of
solveBlockValue() work as intended, unlocking more analysis.

Using this patch shaves 120 KB off a 64-bit Chromium build on Linux.

I benchmarked compiling bzip2.c at -O2 but couldn't measure any difference in
compile time.

Tests by Jiangning Liu from r215343 / PR21238, Pete Cooper, and me.

Differential Revision: http://reviews.llvm.org/D6397

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222768 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 17:23:05 +00:00
Rafael Espindola
b4e2bdb21b Set the body of a new struct as soon as it is created.
This changes the order in which different types are passed to get, but
one order is not inherently better than the other.

The main motivation is that this simplifies linkDefinedTypeBodies now that
it is only linking "real" opaque types. It is also means that we only have to
call it once and that we don't need getImpl.

A small change in behavior is that we don't copy type names when resolving
opaque types. This is an improvement IMHO, but it can be added back if
desired. A test is included with the new behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222764 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 15:33:40 +00:00
Evgeniy Stepanov
ccac3a0229 [msan] Annotate zlib functions for MemorySanitizer.
Mark destination buffer in zlib::compress and zlib::decompress as fully
initialized.

When building LLVM with system zlib and MemorySanitizer instrumentation,
MSan does not observe memory writes in zlib code and erroneously considers
zlib output buffers as uninitialized, resulting in false use-of-uninitialized
memory reports. This change helps MSan understand the state of that memory
and prevents such reports.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222763 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 15:24:07 +00:00
Rafael Espindola
b3d06a043a Misc style fixes. NFC.
This just reduces the noise in the next patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222761 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 14:35:53 +00:00
Joerg Sonnenberger
21bcdeb1d6 Reapply 222538 and update tests to explicitly request small code model
and PIC:

Allow FDE references outside the +/-2GB range supported by PC relative
offsets for code models other than small/medium. For JIT application,
memory layout is less controlled and can result in truncations
otherwise.

Patch from Akos Kiss.

Differential Revision: http://reviews.llvm.org/D6079


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222760 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 13:37:55 +00:00
Rafael Espindola
b959a30a14 Remove a bit of duplicated code.
Exactly the same checks are present in areTypesIsomorphic.

This might have been a premature performance optimization. I cannot reproduce
any slowdown with this patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222758 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 13:19:46 +00:00
Chandler Carruth
d8022cd7d4 Revert r222746: That commit did not update any tests and caused two R600
tests to start failing.

Original commit log: R600/SI: Disable commutativity for MIN/MAX_LEGACY

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222753 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 10:50:41 +00:00
Zoran Jovanovic
137c475805 [mips][micromips] Use call instructions with short delay slots
Differential Revision: http://reviews.llvm.org/D6338


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222752 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 10:50:00 +00:00
Chandler Carruth
333d5c9f51 [InstCombine] Change LLVM To canonicalize toward the value type being
stored rather than the pointer type.

This change is analogous to r220138 which changed the canonicalization
for loads. The rationale is the same: memory does not have a type,
operations (and thus the values they produce) have a type. We should
match that type as closely as possible rather than reading some form of
semantics into the pointer type.

With this change, loads and stores should no longer be made with
nonsensical types for the values that tehy load and store. This is
particularly important when trying to match specific loaded and stored
types in the process of doing other instcombines, which is what led me
down this twisty maze of miscanonicalization.

I've put quite some effort into looking through IR to find places where
LLVM's optimizer was being unreasonably conservative in the face of
mismatched load and store types, however it is possible (let's say,
likely!) I have missed some. If you see regressions here, or from
r220138, the likely cause is some part of LLVM failing to cope with load
and store types differing. Test cases appreciated, it is important that
we root all of these out of LLVM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222748 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 10:09:51 +00:00
Marek Olsak
0ab565a275 R600/SI: Disable commutativity for MIN/MAX_LEGACY
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222746 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 09:49:23 +00:00
Chandler Carruth
a87c35420b Revert r220349 to re-instate r220277 with a fix for PR21330 -- quite
clearly only exactly equal width ptrtoint and inttoptr casts are no-op
casts, it says so right there in the langref. Make the code agree.

Original log from r220277:
Teach the load analysis to allow finding available values which require
inttoptr or ptrtoint cast provided there is datalayout available.
Eventually, the datalayout can just be required but in practice it will
always be there today.

To go with the ability to expose available values requiring a ptrtoint
or inttoptr cast, helpers are added to perform one of these three casts.

These smarts are necessary to finish canonicalizing loads and stores to
the operational type requirements without regressing fundamental
combines.

I've added some test cases. These should actually improve as the load
combining and store combining improves, but they may fundamentally be
highlighting some missing combines for select in addition to exercising
the specific added logic to load analysis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222739 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 08:20:27 +00:00
Matt Arsenault
87926dfe7e R600/SI: Fix allocating flat_scr_lo / flat_scr_hi
Only the super register flat_scr was marked as reserved,
so in some cases with high register usage it would still
try to allocate the subregisters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222737 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 07:53:06 +00:00
David Majnemer
c891fc3ee8 COFF: Add back an assertion that is superseded by r222124
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222735 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 07:43:14 +00:00
Rafael Espindola
95f8931c55 Use a range loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222730 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 06:16:27 +00:00
Rafael Espindola
8665715bdd Style fix: don't indent inside a namemespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222729 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 06:11:24 +00:00
Rafael Espindola
fbc90b1bb1 Remove a nested anonymous namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222728 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 06:07:51 +00:00
Rafael Espindola
842d2b62ed Fix overly aggressive type merging.
If we find out that two types are *not* isomorphic, we learn nothing about
opaque sub types in both the source and destination.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222727 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 05:59:24 +00:00
Rafael Espindola
453ce91dbc Link the type of aliases.
They are not more or less "well typed" than GlobalVariables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222725 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 04:43:59 +00:00
Rafael Espindola
5c51153edc Don't repeat name in comment or duplicate comment. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222724 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 04:28:31 +00:00
Rafael Espindola
2db795c160 Use range loops. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222723 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 04:26:19 +00:00
Juergen Ributzka
a4ebd338c4 [FastISel][AArch64] Fix and extend the tbz/tbnz pattern matching.
The pattern matching failed to recognize all instances of "-1", because when
comparing against "-1" we didn't use an APInt of the same bitwidth.

This commit fixes this and also adds inverse versions of the conditon to catch
more cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222722 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 04:16:15 +00:00
David Majnemer
044b644f54 InstSimplify: Handle some simple tautological comparisons
This handles cases where we are comparing a masked value against itself.
The analysis could be further improved by making it recursive but such
expense is not currently justified.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222716 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 02:55:48 +00:00
David Blaikie
25efc8dbce Revert "unique_ptrify LLVMContextImpl::CAZConstants"
Missed the complexities of how these elements are destroyed.

This reverts commit r222714.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222715 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 02:26:22 +00:00
David Blaikie
bf3afab75a unique_ptrify LLVMContextImpl::CAZConstants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222714 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 02:13:54 +00:00
Hal Finkel
b932ed3c3d [PowerPC] Add the 'attn' instruction
The attn instruction is not part of the Power ISA, but is documented in the A2
user manual, and is accepted by the GNU assembler for the A2 and the POWER4+.
Reported as part of PR21650.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222712 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-25 00:30:11 +00:00
Hal Finkel
5d6f185653 [PowerPC] Implement combineRepeatedFPDivisors
This does not matter on newer cores (where we can use reciprocal estimates in
fast-math mode anyway), but for older cores this allows us to generate better
fast-math code where we have multiple FDIVs with a common divisor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222710 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 23:45:21 +00:00
Philip Reames
521c9dc7d8 Factor check for the assume intrinsic out of checks in computeKnownBitsFromAssume
We were matching against the assume intrinsic in every check.  Since we know that it must be an assume, this is just wasted work.  Somewhat surprisingly, matching an intrinsic id is actually relatively expensive.  It devolves to a string construction and comparison in Function::isIntrinsic.

I originally spotted this because it showed up in a performance profile of my compiler.  I've since discovered a separate issue which seems to be the actual root cause, but this is minor perf goodness regardless.  

I'm likely to follow up with another change to factor out the comparison matching.  There's no need to match the compare instruction in every single one of the tests.

Differential Revision: http://reviews.llvm.org/D6312



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222709 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 23:44:28 +00:00
Philip Reames
4e89fd0f4b Incorporate review comments from r221742
This change implements the comment and style changes Sean requested during post commit review with r221742.  Sorry for the delay.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222707 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 23:24:24 +00:00
Matt Arsenault
2543acd169 Bug 21610: Canonicalize min/max fcmp selects to use ordered comparisons
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222705 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 23:15:18 +00:00
Rafael Espindola
7fe9d46f39 Remove the unused FindUsedTypes pass.
It was dead since r134829.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222684 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 20:53:26 +00:00
Rafael Espindola
468d2fc5ca Add and use Type::subtypes. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222682 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 20:44:36 +00:00
Chad Rosier
6b3c567613 [AArch64] Fix clobber computation in A57LoadBalancing pass.
Extremely difficult to reproduce, so no test case included.
PR21637

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222677 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 18:57:58 +00:00
Colin LeMahieu
5a6b6744c0 Removing unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222676 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 18:55:32 +00:00
Kostya Serebryany
678af17920 [asan/coverage] change the way asan coverage instrumentation is done: instead of setting the guard to 1 in the generated code, pass the pointer to guard to __sanitizer_cov and set it there. No user-visible functionality change expected
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222675 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 18:49:53 +00:00
Ulrich Weigand
edc6a13992 [PowerPC] Fix PR 21652 - copy st_other bits on symbol assignment
When processing an assignment in the integrated assembler that sets
a symbol to the value of another symbol, we need to copy the st_other
bits that encode the local entry point offset.

Modeled after MipsTargetELFStreamer::emitAssignment handling of the
ELF::STO_MIPS_MICROMIPS flag.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222672 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 18:09:47 +00:00
Paul Robinson
2dc4746332 More long path name support on Windows, this time in program execution.
Allows long paths for the executable and redirected stdin/stdout/stderr.
Addresses PR21563.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222671 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 18:05:29 +00:00
Colin LeMahieu
5de3458c18 [Hexagon] Adding asrh instruction, removing unused multiclasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222670 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 18:04:42 +00:00
Colin LeMahieu
c1c7be0928 [Hexagon] Adding aslh instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222668 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 17:44:19 +00:00
Colin LeMahieu
f309d8ee65 [Hexagon] Adding zxth instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222662 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 17:11:34 +00:00
Colin LeMahieu
a723df08bb [Hexagon] Adding zxtb instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222660 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 16:48:43 +00:00
David Majnemer
a17a9dc8df InstCombine: Don't create an unused instruction
We would create an instruction but not inserting it.
Not inserting the unused instruction would lead us to verification
failure.

This fixes PR21653.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222659 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 16:41:13 +00:00
Jozef Kolek
c19526770e [mips][microMIPS] Fix JRADDIUSP instruction
Fix JRADDIUSP instruction, remove delay slot flag because this instruction
doesn't have delay slot.

Differential Revision: http://reviews.llvm.org/D6365


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222658 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 16:14:10 +00:00
Jozef Kolek
b955bed064 [mips][microMIPS] Implement LBU16, LHU16, LW16, SB16, SH16 and SW16 instructions
Differential Revision: http://reviews.llvm.org/D5122


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222653 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 14:39:13 +00:00
Jozef Kolek
d49e74eaa5 [mips][microMIPS] Implement 16-bit instructions registers including ZERO instead of S0
Implement microMIPS 16-bit instructions register set: $0, $2-$7 and $17.

Differential Revision: http://reviews.llvm.org/D5780


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222652 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 14:25:53 +00:00
Aaron Ballman
8d6f6a27c7 Removing a variable that is initialized but never read. The original author has been alerted to the warning, in case this variable is meant to be used. Fixes -Werror builds in the meantime.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222649 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 14:03:16 +00:00
Jozef Kolek
18700de8fc [mips][microMIPS] Implement disassembler support for 16-bit instructions
With the help of new method readInstruction16() two bytes are read and
decodeInstruction() is called with DecoderTableMicroMips16, if this fails
four bytes are read and decodeInstruction() is called with
DecoderTableMicroMips32.

Differential Revision: http://reviews.llvm.org/D6149


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222648 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 13:29:59 +00:00
Andrea Di Biagio
a1e1f01699 [X86] Improved target specific combine on VSELECT dag nodes.
This patch teaches function 'transformVSELECTtoBlendVECTOR_SHUFFLE' how to
convert VSELECT dag nodes to shuffles on targets that do not have SSE4.1.
On pre-SSE4.1 targets, we can still perform blend operations using movss/movsd.

Also, removed a target specific combine that performed a premature lowering of
VSELECT nodes to target specific MOVSS/MOVSD nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222647 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 12:23:15 +00:00
David Majnemer
4a9d304d9d InstCombine: Don't assume DataLayout is always available
We tried to get the result of DataLayout::getLargestLegalIntTypeSize but
we didn't have a DataLayout.  This resulted in opt crashing.

This fixes PR21651.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222645 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 07:26:20 +00:00
Elena Demikhovsky
30f747478a Converted back to Unix format (after my last commit 222632)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222636 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-23 15:21:53 +00:00
Michael Kuperstein
d539147834 [X86] Fixes bug in build_vector v4x32 lowering
r222375 made some improvements to build_vector lowering of v4x32 and v4xf32 into an insertps, but it missed a case where:

1. A single extracted element is used twice.
2. The lower of the two non-zero indexes should be preserved, and the higher should be used for the dest mask.

This caused a crash, since the source value for the insertps ends-up uninitialized.

Differential Revision: http://reviews.llvm.org/D6377

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222635 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-23 13:09:06 +00:00
Craig Topper
71777d18ad Add missing override keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222634 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-23 09:40:13 +00:00
Elena Demikhovsky
ae1ae2c3a1 Masked Vector Load and Store Intrinsics.
Introduced new target-independent intrinsics in order to support masked vector loads and stores. The loop vectorizer optimizes loops containing conditional memory accesses by generating these intrinsics for existing targets AVX2 and AVX-512. The vectorizer asks the target about availability of masked vector loads and stores.
Added SDNodes for masked operations and lowering patterns for X86 code generator.
Examples:
<16 x i32> @llvm.masked.load.v16i32(i8* %addr, <16 x i32> %passthru, i32 4 /* align */, <16 x i1> %mask)
declare void @llvm.masked.store.v8f64(i8* %addr, <8 x double> %value, i32 4, <8 x i1> %mask)

Scalarizer for other targets (not AVX2/AVX-512) will be done in a separate patch.

http://reviews.llvm.org/D6191



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222632 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-23 08:07:43 +00:00
Matt Arsenault
4f5aa5994e R600: Fix extloads of i1 on R600/Evergreen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222631 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-23 02:57:54 +00:00
Matt Arsenault
716ce08250 R600: Fix assert on copy of an i1 on pre-SI
i1 is not a legal type on Evergreen, so this combine proceeded
and tried to produce a bitcast between i1 and i8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222630 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-23 02:57:52 +00:00
David Majnemer
369d8fa34f InstCombine: Propagate exact for (sdiv X, Pow2) -> (udiv X, Pow2)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222625 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 20:00:41 +00:00
David Majnemer
89bcfdb956 InstCombine: Propagate exact for (sdiv X, Y) -> (udiv X, Y)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222624 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 20:00:38 +00:00
David Majnemer
91349eecb0 InstCombine: Propagate exact for (sdiv -X, C) -> (sdiv X, -C)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222623 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 20:00:34 +00:00
Simon Pilgrim
53a43d38df Tidied up target triple OS detection. NFC
Use Triple::isOS*() helper functions where possible.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222622 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 19:12:10 +00:00
David Majnemer
218fe23f41 InstCombine: Propagate exact in (udiv (lshr X,C1),C2) -> (udiv x,C1<<C2)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222620 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 18:16:54 +00:00
Chandler Carruth
e915b4b7c8 [x86] Teach the vector shuffle yet another step of canonicalization.
No functionality changed yet, but this will prevent subsequent patches
from having to handle permutations of various interleaved shuffle
patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222614 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 09:18:53 +00:00
David Majnemer
8ff39c5c44 InstCombine: Propagate NSW/NUW for X*(1<<Y) -> X<<Y
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222613 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 08:57:02 +00:00
David Majnemer
082eff658e InstCombine: Propagate NSW for -X * -Y -> X * Y
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222612 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 07:25:19 +00:00
David Majnemer
7eca618dfc InstSimplify: Simplify (sub 0, X) -> X if it's NUW
This is a generalization of the X - (0 - Y) -> X transform.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222611 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 07:15:16 +00:00
David Majnemer
1c4abdb6ab InstCombine: Silence a parenthesis warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222609 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 06:09:28 +00:00
David Majnemer
fc1c5babaf InstCombine: Preserve nsw when folding X*(2^C) -> X << C
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222606 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 04:52:55 +00:00
David Majnemer
156d6ec86b InstCombine: Preserve nsw/nuw for ((X << C2)*C1) -> (X * (C1 << C2))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222605 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 04:52:52 +00:00
David Majnemer
0f8991742c InstCombine: Preserve nsw for (mul %V, -1) -> (sub 0, %V)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222604 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-22 04:52:38 +00:00
Gerolf Hoflehner
5182ad54b2 [InstCombine] Re-commit of r218721 (Optimize icmp-select-icmp sequence)
Fixes the self-host fail. Note that this commit activates dominator
analysis in the combiner by default (like the original commit did).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222590 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 23:36:44 +00:00
Joerg Sonnenberger
0b1407b5cf Fix transformation of add with pc argument to adr for non-immediate
arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222587 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 22:39:34 +00:00
Kostya Serebryany
57cd7cd77a [asan] remove old experimental code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222586 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 22:34:29 +00:00
Tom Stellard
bad4e7b748 R600/SI: Add an s_mov_b32 to patterns which use the M0RegClass
We need to use a s_mov_b32 rather than a copy, so that CSE will
eliminate redundant moves to the m0 register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222584 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 22:31:46 +00:00
Tom Stellard
573630a020 R600/SI: Emit s_mov_b32 m0, -1 before every DS instruction
This s_mov_b32 will write to a virtual register from the M0Reg
class and all the ds instructions now take an extra M0Reg explicit
argument.

This change is necessary to prevent issues with the scheduler
mixing together instructions that expect different values in the m0
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222583 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 22:31:44 +00:00
Tom Stellard
edcd88ce1a R600/SI: Add SIFoldOperands pass
This pass attempts to fold the source operands of mov and copy
instructions into their uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222581 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 22:06:37 +00:00
Jozef Kolek
d9accc1e5f [mips][microMIPS] This patch implements functionality in MIPS delay slot
filler such as if delay slot filler have to put NOP instruction into the
delay slot of microMIPS BEQ or BNE instruction which uses the register $0,
then instead of emitting NOP this instruction is replaced by the corresponding
microMIPS compact branch instruction, i.e. BEQZC or BNEZC.

Differential Revision: http://reviews.llvm.org/D3566


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222580 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 22:04:35 +00:00
Tom Stellard
e83cdb9792 R600/SI: Mark s_mov_b32 and s_mov_b64 as rematerializable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222579 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 22:00:16 +00:00
Colin LeMahieu
88109da602 [Hexagon] Adding sxth instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222577 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 21:54:59 +00:00
Colin LeMahieu
326816c88f [Hexagon] Adding sxtb instruction. Renaming some identically named classes that will be removed after converting referencing defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222575 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 21:35:52 +00:00
Kostya Serebryany
598c08cf1c [asan] add statistic counter to dynamic alloca instrumentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222573 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 21:25:18 +00:00
Colin LeMahieu
a3b0670792 [Hexagon] Removing SUB_rr and replacing with A2_sub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222571 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 21:19:18 +00:00
Tim Northover
7a3eed6d22 Remove duplication of relocation names in lib/Object/ELFYAML.cpp
We can now use the ELF relocation .def files to create the mapping
of relocation numbers to names and avoid having to duplicate the
list of relocations.

Patch by Will Newton.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222567 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 20:16:09 +00:00
Tim Northover
0ce0e2c149 Remove duplication of relocation names in lib/Object/ELF.cpp
We can now use the ELF relocation .def files to create the mapping
of relocation numbers to names and avoid having to duplicate the
list of relocations.

Patch by Will Newton.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222566 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 20:16:07 +00:00
Manman Ren
b179c6a5e5 Debug Info: revert r222195, r222210 and r222239.
This is no longer needed after David's fix at r222377 + r222485.
rdar://18958417


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222563 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 19:55:23 +00:00
Roman Divacky
9bd372345c Disable header duplication at -Oz in loop-rotate pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222562 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 19:53:24 +00:00
Manman Ren
ea692ff712 Debug Info: add an assertion that the context field of a global variable can not
be a DIType with identifier.

This makes sure that there is no need to use DIScopeRef for global variable's
context.

rdar://18958417


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222561 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 19:47:48 +00:00
Manman Ren
7e19efdbb3 [Objective-C] Support a new special module flag that will be put into the
objc_imageinfo struct.

rdar://17954668


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222558 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 19:24:55 +00:00
Hans Wennborg
b4401e33d5 LazyValueInfo: range'ify some for-loops. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222557 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 19:07:46 +00:00
Rafael Espindola
0b835fc95f Add params() to FunctionType. NFC.
While at it, also use makeArrayRef in elements().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222556 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 19:03:35 +00:00
Sanjay Patel
e8f6119214 Don't repeat class/function/variable names in comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222555 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 18:58:38 +00:00
Hans Wennborg
36c3fc5ddc LazyValueInfo: fix some typos and indentation, etc. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222554 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 18:58:23 +00:00
Rafael Espindola
633e9689bf Add and use a helper elements() to StructType. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222553 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 18:53:05 +00:00
Matthias Braun
1f69d31727 Allow multiple -debug-only args
Debug output is shown if any of the -debug-only arguments match.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222547 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 18:06:09 +00:00
Sanjay Patel
d1510d968c Less space; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222546 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 18:05:59 +00:00
Sanjay Patel
28660d4b2f Add a feature flag for slow 32-byte unaligned memory accesses [x86].
This patch adds a feature flag to avoid unaligned 32-byte load/store AVX codegen
for Sandy Bridge and Ivy Bridge. There is no functionality change intended for 
those chips. Previously, the absence of AVX2 was being used as a proxy to detect
this feature. But that hindered codegen for AVX-enabled AMD chips such as btver2
that do not have the 32-byte unaligned access slowdown.

Performance measurements are included in PR21541 ( http://llvm.org/bugs/show_bug.cgi?id=21541 ).

Differential Revision: http://reviews.llvm.org/D6355



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222544 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 17:40:04 +00:00
Duncan P. N. Exon Smith
95bafa2a1f Revert "Allow FDE references outside the +/-2GB range supported by PC relative offsets for code models other than small/medium. For JIT application, memory layout is less controlled and can result in truncations otherwise."
This reverts commit r222538.

It's causing test failures for CFI, at least on Darwin:

http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental/1189/
http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_check/1391/

Note that the previous incremental build was on r222537, and the CFI
tests weren't failing:
http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental/1188/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222542 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 17:21:18 +00:00
Chandler Carruth
46c5a97adc [x86] Restructure the checking patterns for v16 and v32 avx2 vector
shuffle lowering to allow much better blend matching.

Specifically, with the new structure the code seems clearer to me and we
correctly can hit the cases where merging two 128-bit lanes is a clear
win and can be shuffled cheaply afterward.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222539 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 14:53:03 +00:00
Joerg Sonnenberger
28a626319e Allow FDE references outside the +/-2GB range supported by PC relative
offsets for code models other than small/medium. For JIT application,
memory layout is less controlled and can result in truncations
otherwise. 

Patch from Akos Kiss.

Differential Revision: http://reviews.llvm.org/D6079


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222538 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 14:42:43 +00:00
Chandler Carruth
0889d65fd5 [x86] Make the previous logic significantly less conservative and get
a bunch more improvements.

Non-lane-crossing is fine, the key is that lane merging only makes sense
for single-input shuffles. Not sure why I got so turned around here. The
code all works, I was just using the wrong model for it.

This only updates v4 and v8 lowering. The v16 and v32 lowering requires
restructuring the entire check sequence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222537 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 14:33:24 +00:00
Andrea Di Biagio
607099b697 [DAG] Teach how to turn a build_vector into a shuffle if some of the operands are zero.
Before this patch, the DAGCombiner only tried to convert build_vector dag nodes
into shuffles if all operands were either extract_vector_elt or undef.

This patch improves that logic and teaches the DAGCombiner how to deal with
build_vector dag nodes where one or more operands are zero. A build_vector
dag node with some zero operands is turned into a shuffle only if the resulting
shuffle mask is legal for the target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222536 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 14:32:06 +00:00
Chandler Carruth
bd357588a1 [x86] Teach the x86 vector shuffle lowering to detect mergable 128-bit
lanes.

By special casing these we can often either reduce the total number of
shuffles significantly or reduce the number of (high latency on Haswell)
AVX2 shuffles that potentially cross 128-bit lanes. Even when these
don't actually cross lanes, they have much higher latency to support
that. Doing two of them and a blend is worse than doing a single insert
across the 128-bit lanes to blend and then doing a single interleaved
shuffle.

While this seems like a narrow case, it kept cropping up on me and the
difference is *huge* as you can see in many of the test cases. I first
hit this trying to perfectly fix the interleaving shuffle patterns used
by Halide for AVX2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222533 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 13:56:05 +00:00
Andrea Di Biagio
04fab61b35 [DAG] Refactor the shuffle combining logic in DAGCombiner. NFC.
This patch simplifies the logic that combines a pair of shuffle nodes into
a single shuffle if there is a legal mask. Also added comments to better
describe the algorithm. No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222522 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 11:33:07 +00:00
Alexey Volkov
d0d0424368 [X86] For Silvermont CPU use 16-bit division instead of 64-bit for small positive numbers
Differential Revision: http://reviews.llvm.org/D5938



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222521 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 11:19:34 +00:00
Yury Gribov
432ade7da6 [asan] Add new hidden compile-time flag asan-instrument-allocas to sanitize variable-sized dynamic allocas. Patch by Max Ostapenko.
Reviewed at http://reviews.llvm.org/D6055


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222519 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 10:29:50 +00:00
NAKAMURA Takumi
3bc8b4b38b Add LLVMScalarOpts to LLVMPowerPCCodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222516 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 09:14:45 +00:00
Hao Liu
09ad94decb DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same divisor info FMULs by the reciprocal.
E.g., ( a / D; b / D ) -> ( recip = 1.0 / D; a * recip; b * recip)

A hook is added to allow the target to control whether it needs to do such combine.

Reviewed in http://reviews.llvm.org/D6334


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222510 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 06:39:58 +00:00
Craig Topper
e0ed7df6b0 Remove a bunch of unnecessary typecasts to 'const TargetRegisterClass *'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222509 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 05:58:21 +00:00
Hal Finkel
361eafaffa [PPC] Use SeparateConstOffsetFromGEP
This mirrors r222331, which enabled SeparateConstOffsetFromGEP on AArch64, in
the PowerPC backend. Yields, on a POWER7 machine, a 30% speedup on
SingleSource/Benchmarks/Shootout/nestedloop (this might just be from LICM,
there is a store moved out of the inner loop) and a potential speedup on
MultiSource/Benchmarks/mediabench/mpeg2/mpeg2dec/mpeg2decode. Regardless, it
makes some code look cleaner, and synchronizing the backends in this regard
seems like a generally good thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222504 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 04:35:51 +00:00
Richard Trieu
c670d3bfc3 Add accessor marcos to ConstantPlaceHolder, similar to those in the base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222502 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 02:42:08 +00:00
David Majnemer
dac753cb73 This Reassociate change unintentionally slipped in r222499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222500 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 02:37:38 +00:00
David Majnemer
9970214474 SROA: The alloca type isn't a candidate promotion type for vectors
The alloca's type is irrelevant, only those types which are used in a
load or store of the exact size of the slice should be considered.

This manifested as an assertion failure when we compared the various
types: we had a size mismatch.

This fixes PR21480.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222499 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 02:34:55 +00:00
Lang Hames
d90eb5527c [MCJIT] Remove JITEventListener::NotifyFreeingMachineCode. This method is dead
now that the old JIT has been removed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222494 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 01:57:09 +00:00
Zachary Turner
0c0661c7dd Add curly braces to workaround an MSVC bug.
MSVC can't parse this pattern for range-based for loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222491 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 01:19:09 +00:00
Quentin Colombet
c91f34ae54 [X86] Do not custom lower UINT_TO_FP when the target type does not
match the custom lowering.

<rdar://problem/19026326>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222489 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 00:47:19 +00:00
Adrian Prantl
c8ef21f1b1 Verifier: Check that all instructions have their parent pointers set up
correctly. This helps with catching problems caused by IRBuilder abuse
such as the one fixed in CFE r222487.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222488 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 00:39:43 +00:00
Reid Kleckner
9c390888f7 Fix more instances of -Wsentinel on Windows with s/NULL/nullptr/
Follow up to r221940, where I must not have caught em all. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222481 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 23:51:47 +00:00
Reid Kleckner
d12434058d Add out of line virtual destructors to all LLVMTargetMachine subclasses
These recently all grew a unique_ptr<TargetLoweringObjectFile> member in
r221878.  When anyone calls a virtual method of a class, clang-cl
requires all virtual methods to be semantically valid. This includes the
implicit virtual destructor, which triggers instantiation of the
unique_ptr destructor, which fails because the type being deleted is
incomplete.

This is just part of the ongoing saga of PR20337, which is affecting
Blink as well. Because the MSVC ABI doesn't have key functions, we end
up referencing the vtable and implicit destructor on any virtual call
through a class. We don't actually end up emitting the dtor, so it'd be
good if we could avoid this unneeded type completion work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222480 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 23:37:18 +00:00
Mehdi Amini
10754c251b Update Makefile following directory removal in r222466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222475 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 22:48:24 +00:00
Mehdi Amini
517842e6fd SimplifyCFG: Refactor GatherConstantCompares() result in a struct
Code seems cleaner and easier to understand this way

This is basically r222416, after fixes for MSVC lack of standard 
support, and a few cleaning (got rid of a warning).
Thanks Nakamura Takumi and Nico Weber for the MSVC fixes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222472 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 22:40:25 +00:00
Colin LeMahieu
a3712a1fb9 [Hexagon] [NFC] Merging InstPrinter directory in to MCTargetDesc since they have a circular dependency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222458 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 21:56:35 +00:00
Lang Hames
604171664c [MCJIT] Remove JITEventListener::NotifyFunctionEmitted - this method is dead
now that the legacy JIT has been removed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222453 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 21:16:16 +00:00
Michael Zolotukhin
4e7b10b07f Fix a trip-count overflow issue in LoopUnroll.
Currently LoopUnroll generates a prologue loop before the main loop
body to execute first N%UnrollFactor iterations. Also, this loop is
used if trip-count can overflow - it's determined by a runtime check.

However, we've been mistakenly optimizing this loop to a linear code for
UnrollFactor = 2, not taking into account that it also serves as a safe
version of the loop if its trip-count overflows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222451 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 20:19:55 +00:00
Saleem Abdulrasool
e6c1fc9a44 X86: use the correct alloca symbol for Windows Itanium
Windows itanium targets the MSVCRT, and the stack probe symbol is provided by
MSVCRT.  This corrects the emission of stack probes on i686-windows-itanium.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222439 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 18:01:26 +00:00
Frederic Riss
12385e603f Make DWARFAcceleratorTable::dump() const.
As dump() methods  should be. To allow that, do not store the DWARFFormValue
objects used for the dump in the header data.

Per Alexey's suggestion!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222436 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 16:21:11 +00:00
Frederic Riss
d239f8c198 Add missing copyright headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222435 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 16:21:06 +00:00
Frederic Riss
594bf484e4 Do not create a replaceable Variables MDNode for function forward decls.
These fields would need to be explicitly deleted before we RAUW the temporary
node anyway (this was done in cfe commit r222373). Instead, do not create
these useless nodes in the first place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222434 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 15:52:34 +00:00
Timur Iskhodzhanov
4b8337efd9 Revert r222416, r222422, r222426: the former revision had problems and fixing them introduced bugs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222428 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 12:36:43 +00:00
Timur Iskhodzhanov
6a490ac188 Fix a typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222426 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 11:48:58 +00:00
NAKAMURA Takumi
f9f464d44b SimplifyCFG.cpp: Tweak to let msc17 compliant.
- Use LLVM_DELETED_FUNCTION.
  - Don't use member initializers.
  - Don't use initializer list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222422 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 08:59:02 +00:00
Mehdi Amini
b3e705ed1d SimplifyCFG: Refactor GatherConstantCompares() result in a struct
Code seems cleaner and easier to understand this way




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222416 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 06:51:02 +00:00
Jyoti Allur
dc0b300304 [ELF] Prevent ARM ELF object writer from generating deprecated relocation code R_ARM_PLT32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222414 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 05:58:11 +00:00
Craig Topper
136d5aeba4 Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222412 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 05:22:37 +00:00
Alexey Samsonov
88dc43f69e Remove support for undocumented SpecialCaseList entries.
"global-init", "global-init-src" and "global-init-type" were originally
used to blacklist entities in ASan init-order checker. However, they
were never documented, and later were replaced by "=init" category.

Old blacklist entries should be converted as follows:
  * global-init:foo -> global:foo=init
  * global-init-src:bar -> src:bar=init
  * global-init-type:baz -> type:baz=init



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222401 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 01:27:19 +00:00
Colin LeMahieu
e8cdd171f9 [Hexagon] Adding A2_xor instruction with IR selection pattern and test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222399 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 23:22:23 +00:00
Chad Rosier
503ec9826c Revert "[Reassociate] As the expression tree is rewritten make sure the operands are"
This reverts commit r222142.  This is causing/exposing an execution-time regression
in spec2006/gcc and coremark on AArch64/A57/Ofast.

Conflicts:

	test/Transforms/Reassociate/optional-flags.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222398 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 23:21:20 +00:00
Colin LeMahieu
fb1c650fd0 [Hexagon] Adding A2_or instruction with IR selection pattern and test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222396 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 22:58:04 +00:00
Nico Weber
660bac6a57 Try to fix MSVS build after r222384. No intended behavior change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222386 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 21:16:11 +00:00
Mehdi Amini
30bd0c753e SimplifyCFG: turn recursive GatherConstantCompares into iterative
A long sequence of || or && could lead to a stack explosion.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222384 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 20:09:11 +00:00
Matthias Braun
6e0f244d1f RegisterCoalescer: Improve debug messages
- Show "Considering..." message after flipping so you actually see the final
  destination vreg as destination.
- Add a message on final join, so you can grep for "Success" messages to obtain
  a list of which register got merged with which.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222382 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:46:17 +00:00
Matthias Braun
f5522a6b68 Add a print and verify pass after the RegisterCoalescer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222381 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:46:15 +00:00
Matthias Braun
4a7e0736d3 MachineVerifier: Report register for bad liveranges
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222380 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:46:13 +00:00
Matthias Braun
c754d5815d Introduce register dump helper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222379 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:46:11 +00:00
David Majnemer
a44c501561 AliasSet: Simplify mergeSetIn
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222376 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:36:18 +00:00
Andrea Di Biagio
53daaff125 [X86] Improved lowering of v4x32 build_vector dag nodes.
This patch improves the lowering of v4f32 and v4i32 build_vector dag nodes
that are known to have at least two non-zero elements.

With this patch, a build_vector that performs a blend with zero is 
converted into a shuffle. This is done to let the shuffle legalizer expand
the dag node in a optimal way. For example, if we know that a build_vector
performs a blend with zero, we can try to lower it as a movq/blend instead of
always selecting an insertps.

This patch also improves the logic that lowers a build_vector into a insertps
with zero masking. See for example the extra test cases added to test sse41.ll.

Differential Revision: http://reviews.llvm.org/D6311


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222375 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:34:29 +00:00
Lang Hames
58c62e1dba [ADT] Fix PR20728 - Incorrect APFloat::fusedMultiplyAdd results for x86_fp80.
As detailed at http://llvm.org/PR20728, due to an internal overflow in
APFloat::multiplySignificand the APFloat::fusedMultiplyAdd method can return
incorrect results for x87DoubleExtended (x86_fp80) values. This commonly
manifests as incorrect constant folding of libm fmal calls on x86. E.g.

fmal(1.0L, 1.0L, 3.0L) == 0.0L      (should be 4.0L)

This patch fixes PR20728 by adding an extra bit to the significand for
intermediate results of APFloat::multiplySignificand, avoiding the overflow.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222374 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:15:41 +00:00