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6430 Commits

Author SHA1 Message Date
Chris Lattner
f73fb88688 add a note. Our 64-bit shifts are ~30% slower than gcc's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30457 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-18 05:36:54 +00:00
Chris Lattner
b33a42a21f This is closer to what we really want. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30451 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-18 04:54:35 +00:00
Anton Korobeynikov
bcb9770efe Added some eye-candy for Subtarget type checking 
Added X86 StdCall & FastCall calling conventions. Codegen will follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30446 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-17 20:25:45 +00:00
Anton Korobeynikov
93c2b37340 Small fixes for supporting dll* linkage types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30441 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-17 13:06:18 +00:00
Chris Lattner
7ed96abc09 add a note noticed through source inspection 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30418 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-16 23:57:51 +00:00
Chris Lattner
88640b5ecd add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30406 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-16 03:30:19 +00:00
Chris Lattner
cbce2f6c1b add a nate note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30399 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-15 20:31:36 +00:00
Evan Cheng
c45a2c72cc Remove a unnecessary check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30382 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 23:55:02 +00:00
Chris Lattner
f0613e1e7c add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30377 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 20:56:30 +00:00
Anton Korobeynikov
b74ed07bfd Adding dllimport, dllexport and external weak linkage types. 
DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30374 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 18:23:27 +00:00
Chris Lattner
08c33011d1 add note about switch lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30308 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 23:37:16 +00:00
Evan Cheng
80543c8305 Skip over first operand when determining REX prefix for two-address code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30300 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 19:07:28 +00:00
Chris Lattner
bfd68a7858 Turn X < 0 -> TEST X,X js 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30294 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 17:04:54 +00:00
Chris Lattner
7a6366de86 The sense of this branch was inverted :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30293 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 16:56:12 +00:00
Rafael Espindola
3ad5e5cf99 add shifts to addressing mode 1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30291 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 12:09:43 +00:00
Chris Lattner
0f27fc34f7 Fix a regression in the 32-bit port from the 64-bit port landing. 
We now compile CodeGen/X86/lea-2.ll into:

_test:
        movl 4(%esp), %eax
        movl 8(%esp), %ecx
        leal -5(%ecx,%eax,4), %eax
        ret

instead of:

_test:
        movl 4(%esp), %eax
        leal (,%eax,4), %eax
        addl 8(%esp), %eax
        addl $4294967291, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30288 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 04:45:25 +00:00
Chris Lattner
d1468d3332 new note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30286 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 04:19:50 +00:00
Chris Lattner
95af34e33f new note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30285 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 03:54:54 +00:00
Chris Lattner
f95705163f Compile X > -1 -> text X,X; js dest 
This implements CodeGen/X86/jump_sign.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30283 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 03:22:10 +00:00
Evan Cheng
c356a572e3 Reflects MachineConstantPoolEntry changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 21:04:05 +00:00
Chris Lattner
adaa38f13d add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30271 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 06:36:01 +00:00
Chris Lattner
0bfd7fde43 Testcase noticed from PR906 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30269 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 23:00:56 +00:00
Chris Lattner
2a33a3f08d add compilable testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30268 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 22:57:51 +00:00
Rafael Espindola
817e7fdb8b implement SRL and MUL 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30262 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 19:24:19 +00:00
Rafael Espindola
1b3956b516 add the correct fallback for ARMDAGToDAGISel::SelectAddrMode1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30261 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 19:23:32 +00:00
Rafael Espindola
7cca7c5317 partial implementation of the ARM Addressing Mode 1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30252 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 17:25:40 +00:00
Rafael Espindola
ff59d22232 call AsmPrinter::doInitialization in ARMAsmPrinter::doInitialization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30246 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 12:49:38 +00:00
Evan Cheng
f47d167c3b Updates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30245 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 05:35:17 +00:00
Evan Cheng
0f4aa6ee20 Update README file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30244 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 05:25:15 +00:00
Evan Cheng
734503be59 X86ISD::CMP now produces a chain as well as a flag. Make that the chain 
operand of a conditional branch to allow load folding into CMP / TEST
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30241 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 02:19:56 +00:00
Nate Begeman
019f851ab2 Behold, more work on relocations. Things are looking pretty good now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30240 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 23:03:44 +00:00
Anton Korobeynikov
f369dd26fb Removed unnecessary Mangler creation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30239 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 21:17:03 +00:00
Chris Lattner
1e14289ef9 Add cbe support for powi 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30226 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 06:17:12 +00:00
Nate Begeman
94be248dbb First pass at supporting relocations. Relocations are written correctly to 
the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30207 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 22:42:09 +00:00
Evan Cheng
6f34b43292 Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex 
in addition to immediate operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30205 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 21:08:13 +00:00
Rafael Espindola
0a200600e7 implement shl and sra 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30191 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 17:36:23 +00:00
Chris Lattner
40f4ba5e71 Use __USER_LABEL_PREFIX__ to get the prefix added by the current host. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30190 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 17:03:56 +00:00
Rafael Espindola
4e30764d55 add the eor (xor) instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30189 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 16:59:47 +00:00
Jim Laskey
f45c25f720 Missing tab 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30188 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 13:06:56 +00:00
Rafael Espindola
5c2aa0a4d8 implement unconditional branches 
fix select.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30186 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 12:47:03 +00:00
Evan Cheng
36978b9c61 Remove TEST64mr. It's same as TEST64rm since and is commutative. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30178 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 06:56:55 +00:00
Evan Cheng
25ab690a43 Committing X86-64 support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 06:48:29 +00:00
Nate Begeman
6fe6084ebf We actually do support object file writing, so don't return true (error) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30173 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 03:42:15 +00:00
Evan Cheng
8cf723d8eb - Identify a vector_shuffle that can be turned into an undef, e.g. 
shuffle V1, <undef>, <undef, undef, 4, 5>
- Fix some suspicious logic into LowerVectorShuffle that cause less than
  optimal code by failing to identify MOVL (move to lowest element of a
  vector).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30171 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 01:50:06 +00:00
Jim Laskey
fde1b3bb2f 1. Remove condition on delete. 
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30169 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 23:39:26 +00:00
Chris Lattner
2dd538c2d2 add a new value for the command line optn 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30165 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:32:28 +00:00
Chris Lattner
cdb341dcfa Fix a cross-build issue. The asmsyntax shouldn't be affected by the build 
host, it should be affected by the target.  Allow the command line option to
override in either case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30164 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:29:41 +00:00
Jim Laskey
a0f3d17daa Make target asm info a property of the target machine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30162 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:06:40 +00:00
Jim Laskey
8e8de8f776 Break out target asm info into separate files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30161 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:05:02 +00:00
Chris Lattner
ffc0b2663e Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patterns 
using test, which provides nice simplifications like:

-       movl %edi, %ecx
-       andl $2, %ecx
-       cmpl $0, %ecx
+       testl $2, %edi
        je LBB1_11      #cond_next90

There are a couple of dagiselemitter deficiencies that this exposes, they will
be handled later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30156 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 20:33:45 +00:00