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4b10591265
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3144 Commits

Author SHA1 Message Date
Chris Lattner
4b10591265 Don't transform in another bad case: if the block is empty, it should be 
simplified before we do this xform so that our cost model is accurate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31864 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-18 22:25:39 +00:00
Chris Lattner
f10a56a86f Fix another case we *don't* want to do this xform. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31861 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-18 21:56:39 +00:00
Chris Lattner
1ccc4684f3 Implement operator<< for machine basic blocks to make it easier to dump them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31857 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-18 21:47:36 +00:00
Chris Lattner
154e104718 make the previous change more aggressive, moving any block with no fallthrough. 
This speeds up yacr2 by 7% on a core2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31856 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-18 21:30:35 +00:00
Chris Lattner
a7bef4a4e4 Minor code layout tweak: if we have something like this: 
if (cond) goto BB2
BB1:
    ...
    return;
BB2:
   ...

Move BB1 to the end of the function so that the code falls through in the
non-return case.  This has the effect of moving assert (and other no-return
call) bodies and return blocks out of loops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31855 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-18 20:47:54 +00:00
Jim Laskey
5f64a16869 Fixing the ENABLE_OPTIMIZED=1 DISABLE_ASSERTIONS=1 build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31822 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 13:07:55 +00:00
Bill Wendling
b2b9c20b61 More removal of std::cerr and DEBUG, replacing with DOUT instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31806 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 02:09:07 +00:00
Bill Wendling
54fcc7f704 Replace std::cerr uses of the "DEBUG" macro with "DOUT" instead. Removes 
a #include of iostream.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31800 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 00:50:36 +00:00
Bill Wendling
00e533043d *** empty log message *** 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31789 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 20:11:33 +00:00
Evan Cheng
ce9a576f29 Match MachineCodeEmitter changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31787 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 20:04:04 +00:00
Bill Wendling
beeb77f3ae Don't recompute getNumOperands for each iteration. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31783 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 07:35:18 +00:00
Bill Wendling
01352aa187 Added a new method "CreateNewLiveInterval" which, given a list of 
LiveRanges, creates a new LiveInterval from them. The LiveRanges should
have existed already in another LiveInterval, but removed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31780 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 02:41:50 +00:00
Chris Lattner
e01eaa09c6 enable the branch folding pass for the JIT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31777 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 01:00:07 +00:00
Evan Cheng
cc47021f49 Fix an incorrectly inverted condition. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31773 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 00:08:20 +00:00
Evan Cheng
ddee842062 Match live variable changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31762 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 20:55:15 +00:00
Evan Cheng
6b2c05f3d3 Minor updates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31761 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 20:54:29 +00:00
Evan Cheng
9a1956ae6a A register def can be partially dead when the whole register has use(s) but a subreg does not. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31760 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 20:54:11 +00:00
Evan Cheng
a6c4c1eb90 Do away with kill / dead maps. Move kill / dead info onto MI's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31759 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 20:51:59 +00:00
Chris Lattner
b71fd7897f Simplify IntrinsicLowering and clarify that it is only for use by the 
CBE and interpreter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31755 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 18:00:10 +00:00
Chris Lattner
43193d60e9 remove dead #include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31753 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 17:51:15 +00:00
Evan Cheng
7ce4578353 Matches MachineInstr changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-13 23:36:35 +00:00
Evan Cheng
d7de496b23 - Let MachineInstr ctors add implicit def and use operands. Other operands 
will be inserted before these operands. If the opcode changes (by
  setOpcode), the implicit operands are updated as well.
- Added IsKill, IsDead fields to MachineOperand in preparation for changes
  that move kill / dead info to MachineInstr's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31711 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-13 23:34:06 +00:00
Reid Spencer
a07d5b9164 Make an assert comment match the tested assertion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31686 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 20:07:59 +00:00
Evan Cheng
3ba433a7e8 Add methods to add implicit def use operands to a MI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31675 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 10:20:02 +00:00
Chris Lattner
41e53fd39b disallow preinc of a frameindex. This is not profitable and causes 2-addr 
pass to explode.  This fixes a bunch of llc-beta failures on ppc last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31661 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 01:00:15 +00:00
Chris Lattner
9f1794ea58 reduce indentation by using early exits. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31660 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 00:56:29 +00:00
Chris Lattner
448f219fed move big chunks of code out-of-line, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31658 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 00:39:41 +00:00
Chris Lattner
734c91d250 Fix a dag combiner bug exposed by my recent instcombine patch. This fixes 
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31644 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 21:37:15 +00:00
Evan Cheng
438f7bc67c Add implicit def / use operands to MachineInstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31633 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 08:43:01 +00:00
Evan Cheng
a7ff64d608 When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31631 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 08:28:11 +00:00
Chris Lattner
1e7aa5c209 commentate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31627 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 04:41:34 +00:00
Evan Cheng
8dc5cad8a2 Don't attempt expensive pre-/post- indexed dag combine if target does not support them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31598 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 19:10:46 +00:00
Evan Cheng
5ff839fbab Add a mechanism to specify whether a target supports a particular indexed load / store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31597 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 18:56:43 +00:00
Evan Cheng
0030582239 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31596 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 18:44:21 +00:00
Evan Cheng
144d8f09e1 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 17:55:04 +00:00
Jim Laskey
85f419b36c Allows debugging llc self hosted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31594 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 16:32:26 +00:00
Jim Laskey
5496f01465 Merging dwarf info to a single compile unit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31593 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 14:52:14 +00:00
Evan Cheng
d258efaf6e getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31584 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 04:29:46 +00:00
Evan Cheng
a1fd6504aa Remove M_2_ADDR_FLAG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31583 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 02:22:54 +00:00
Evan Cheng
b00dddd164 Match more post-indexed ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31569 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 20:27:27 +00:00
Jim Laskey
d6c3422e31 Remove redundant <cmath>. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31561 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 19:16:44 +00:00
Jim Laskey
6ea0f6bce8 Now can re-enable debug label folding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31549 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 14:17:45 +00:00
Evan Cheng
03fa6ea402 - When performing pre-/post- indexed load/store transformation, do not worry 
about whether the new base ptr would be live below the load/store. Let two
  address pass split it back to non-indexed ops.
- Minor tweaks / fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31544 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 08:30:28 +00:00
Evan Cheng
a4f53ef527 Fixed a minor bug preventing some pre-indexed load / store transformation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31543 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 06:56:05 +00:00
Reid Spencer
3822ff5c71 For PR950: 
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31542 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 06:47:33 +00:00
Evan Cheng
6c1491dd06 Fix a obscure post-indexed load / store dag combine bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31537 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 02:38:55 +00:00
Chris Lattner
5d056952ba optimize single MBB loops better. In particular, produce: 
LBB1_57:        #bb207.i
        movl 72(%esp), %ecx
        movb (%ecx,%eax), %cl
        movl 80(%esp), %edx
        movb %cl, 1(%edx,%eax)
        incl %eax
        cmpl $143, %eax
        jne LBB1_57     #bb207.i
        jmp LBB1_64     #cond_next255.i

intead of:

LBB1_57:        #bb207.i
        movl 72(%esp), %ecx
        movb (%ecx,%eax), %cl
        movl 80(%esp), %edx
        movb %cl, 1(%edx,%eax)
        incl %eax
        cmpl $143, %eax
        je LBB1_64      #cond_next255.i
        jmp LBB1_57     #bb207.i

This eliminates a branch per iteration of the loop.  This hurted PPC
particularly, because the extra branch meant another dispatch group for each
iteration of the loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31530 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 01:03:21 +00:00
Jim Laskey
4d0c1a04bc Accidently reran commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31516 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-07 21:58:55 +00:00
Jim Laskey
5e213ea697 Missed a label map, reverting till covered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31514 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-07 21:37:31 +00:00
Jim Laskey
fffcd69709 Missed a label map, reverting till covered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31512 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-07 20:53:05 +00:00