Owen Anderson
4ceccc4e57
Add tests for NEON encoding of vmull.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117077 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:19:53 +00:00
Jim Grosbach
3686046a2c
ARM binary encodings for MVN variants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:19:32 +00:00
Owen Anderson
de5370fcbb
Add tests for NEON encoding of vqdmulh and vqrdmulh.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117074 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:05:33 +00:00
Jim Grosbach
3fea19105d
ARM Binary encoding information for BFC/BFI instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:03:21 +00:00
Owen Anderson
636ad14c8a
Add tests for NEON vmul encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117069 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 21:51:58 +00:00
Owen Anderson
7eca0e17ba
Rename this test to better reflect its contents.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117067 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 21:40:15 +00:00
Owen Anderson
35ea7a4022
Add tests for NEON encodings of vaddhn and vraddhn.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:56:57 +00:00
Owen Anderson
4bcb949e18
Add tests for NEON encodings of vqadd, which was already correctly encoded.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:42:04 +00:00
Owen Anderson
1e93466c3a
Add correct NEON encodings for vhadd and vrhadd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:55:04 +00:00
Owen Anderson
9d50559bae
Add correct encodings for NEON vaddw.s* and vaddw.u*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:20:25 +00:00
Owen Anderson
e0e6dc3f4e
Provide correct NEON encodings for vaddl.u* and vaddl.s*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:09:17 +00:00
Rafael Espindola
8c8bc05a38
Do not recurse into symbol refs that have a variant kind. This prevents us
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from losing the variant when producing a relocation on an alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117037 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:00:20 +00:00
Kevin Enderby
0b9325c97d
More tweaks to X86 instructions to allow the 'w' suffix in places it makes
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sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler allows
for these instructions. Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 17:16:46 +00:00
Bill Wendling
ba3f881007
Fix whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117002 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 06:25:08 +00:00
Andrew Trick
5b7a825ec5
putback r116983 and fix simple-fp-encoding.ll tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116992 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:40:16 +00:00
Owen Anderson
d7795540d0
Implement correct encodings for NEON vadd, both integer and floating point.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 00:48:00 +00:00
Bill Wendling
01aabdac44
Add encoding for moving a value between two ARM core registers and a doublework
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extension register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116970 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 23:37:40 +00:00
Bill Wendling
7d31a169af
Add encodings for movement between ARM core registers and single-precision
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registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116961 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:44:54 +00:00
Rafael Espindola
64e6719ee8
Handle _GLOBAL_OFFSET_TABLE_ correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116932 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 16:46:08 +00:00
Jason W Kim
f7d5278fb3
Fixing r116753 r116756 r116777
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The failures in r116753 r116756 were caused by a python issue -
Python likes to append 'L' suffix to stringified numbers if the number
is larger than a machine int. Unfortunately, this causes a divergence of
behavior between 32 and 64 bit python versions.
I re-crafted elf-dump/common_dump to take care of these issues by:
1. always printing 0x (makes for easy sed/regex)
2. always print fixed length (exactly 2 + numBits/4 digits long)
by mod ((2^numBits) - 1)
3. left-padded with '0'
There is a residual common routine that is also used by
macho-dump (dataToHex) , so I left the 'section_data' test values alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116823 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 17:39:10 +00:00
Eric Christopher
1dcb1eafbc
Speculatively revert 116753 and 116756 to attempt to fix the bots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116777 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 00:19:49 +00:00
Kevin Enderby
87f4a1a433
Added a few tweaks to the Intel Descriptor-table support instructions to allow
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word forms and suffixed versions to match the darwin assembler in 32-bit and
64-bit modes. This is again for use just with assembly source for llvm-mc .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116773 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 00:01:44 +00:00
Jason W Kim
e7d4a4c6c8
Changed elf-dump to output hex format by default.
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Also updated tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 21:32:41 +00:00
Rafael Espindola
eada304793
Implement R_386_GOT32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116744 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 20:47:21 +00:00
Rafael Espindola
ce2d3c5775
Relocate with .bss instead of using the symbol. Matches gas behavior.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116741 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 20:25:33 +00:00
Rafael Espindola
aa85c21633
Produce ELF::R_386_GOTPC relocations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116728 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 18:36:12 +00:00
Kevin Enderby
7aef62ff8c
Added a handful of x86-32 instructions that were missing so that llvm-mc would
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be more complete. These are only expected to be used by llvm-mc with assembly
source so there is no pattern, [], in the .td files. Most are being added to
X86InstrInfo.td as Chris suggested and only comments about register uses are
added. Suggestions welcome on the .td changes as I'm not sure on every detail
of the x86 records. More missing instructions will be coming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 17:04:36 +00:00
Rafael Espindola
9edab3a9e1
Produce a R_386_PLT32 when needed. Moved the default cases of switches to the
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start for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116715 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 16:58:03 +00:00
Rafael Espindola
c97f80efc8
Handle GOTOFF correctly on i386.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116711 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 16:38:04 +00:00
Rafael Espindola
f230df9af4
Add a MCObjectFormat class so that code common to all targets that use a
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single object format can be shared.
This also adds support for
mov zed+(bar-foo), %eax
on ELF and COFF targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116675 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 18:23:53 +00:00
Benjamin Kramer
d30dcfe331
Unbreak test on non-COFF targets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116669 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 11:27:13 +00:00
Michael J. Spencer
4cee2890a6
MC-COFF: Add support for default-null weak externals.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116666 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 08:25:57 +00:00
Jim Grosbach
8abe32af38
ARM mode encoding information for UBFX and SBFX instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-15 17:15:16 +00:00
Rafael Espindola
5df0b65e8f
Refactor code a bit and avoid creating unnecessary entries in the string
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map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116579 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-15 15:39:06 +00:00
Bob Wilson
cfbece50f6
ARM instructions that are both predicated and set the condition codes
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have been printed with the "S" modifier after the predicate. With ARM's
unified syntax, they are supposed to go in the other order. We fixed this
for Thumb when we switched to unified syntax but missed changing it for
ARM. Apparently we don't generate these instructions often because no one
noticed until now. Thanks to Bill Wendling for the testcase!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-15 03:23:44 +00:00
Jim Grosbach
53e7dcbd47
Simplify test file a bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116540 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 23:32:44 +00:00
Jim Grosbach
8faff9c759
Add testcase for RRX and ASRS (which effectively tests MOVs, since those
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are just forms of that instruction).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116538 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 23:29:18 +00:00
Jim Grosbach
1de588df69
MOVi16 and MOVT ARM mode encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116498 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 18:54:27 +00:00
Rafael Espindola
a0949b50dc
Remove some code duplication.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116484 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 16:34:44 +00:00
Bill Wendling
bbbdcd453d
Add support for vmov.f64/.f32 encoding. There's a bit of a hack going on
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here. The f32 in FCONSTS is handled as a double instead of a float in the
code. So the encoding of the immediate into the instruction isn't exactly in
line with the documentation in that regard. But given that we know it's handled
as a double, it doesn't cause any harm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116471 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 02:33:26 +00:00
Bill Wendling
946a2740a5
Add encoding for 'fmstat'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 01:19:34 +00:00
Bill Wendling
88cf038436
- Add encodings for multiply add/subtract instructions in all their glory.
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- Add missing patterns for some multiply add/subtract instructions.
- Add encodings for VMRS and VMSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116464 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 01:02:08 +00:00
Jim Grosbach
b3af5de2d9
Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern
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and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116432 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 21:00:04 +00:00
Bill Wendling
67a704de03
Add MC encodings for VCVT* instrunctions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116431 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 20:58:46 +00:00
Jim Grosbach
b35ad41fef
Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 19:56:10 +00:00
Jim Grosbach
24989ecc70
Add ARM mode operand encoding information for ADDE/SUBE instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116412 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 18:00:52 +00:00
Bill Wendling
6932643a37
Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a test
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just yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116386 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 01:17:33 +00:00
Bill Wendling
54908dd72b
Add encodings for VCVT instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116385 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 00:56:35 +00:00
Jim Grosbach
89c898f8af
Add ARM encoding information for comparisons, forced-cc-out arithmetics, and
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arithmetic-with-carry-in instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 00:50:27 +00:00
Bill Wendling
1fc6d8837f
Add VCMPZ and VABS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116383 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 00:38:07 +00:00