Commit Graph

54169 Commits

Author SHA1 Message Date
Evan Cheng
aff59685a9 Add a missing cpu subtype.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155402 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 22:41:39 +00:00
Jim Grosbach
c92ba4e905 Tidy up. 80 columns, whitespace, et. al.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155399 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 22:04:10 +00:00
Nadav Rotem
a35407705d Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where the integer type is i8 (commonly used in graphics).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155397 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 21:53:37 +00:00
Preston Gurd
6a8c7bf8e7 This patch fixes a problem which arose when using the Post-RA scheduler
on X86 Atom. Some of our tests failed because the tail merging part of
the BranchFolding pass was creating new basic blocks which did not
contain live-in information. When the anti-dependency code in the Post-RA
scheduler ran, it would sometimes rename the register containing
the function return value because the fact that the return value was
live-in to the subsequent block had been lost. To fix this, it is necessary
to run the RegisterScavenging code in the BranchFolding pass.

This patch makes sure that the register scavenging code is invoked
in the X86 subtarget only when post-RA scheduling is being done.
Post RA scheduling in the X86 subtarget is only done for Atom.

This patch adds a new function to the TargetRegisterClass to control
whether or not live-ins should be preserved during branch folding.
This is necessary in order for the anti-dependency optimizations done
during the PostRASchedulerList pass to work properly when doing
Post-RA scheduling for the X86 in general and for the Intel Atom in particular.

The patch adds and invokes the new function trackLivenessAfterRegAlloc()
instead of using the existing requiresRegisterScavenging().
It changes BranchFolding.cpp to call trackLivenessAfterRegAlloc() instead of
requiresRegisterScavenging(). It changes the all the targets that
implemented requiresRegisterScavenging() to also implement
trackLivenessAfterRegAlloc().  

It adds an assertion in the Post RA scheduler to make sure that post RA
liveness information is available when it is needed.

It changes the X86 break-anti-dependencies test to use –mcpu=atom, in order
to avoid running into the added assertion.

Finally, this patch restores the use of anti-dependency checking
(which was turned off temporarily for the 3.1 release) for
Intel Atom in the Post RA scheduler.

Patch by Andy Zhang!

Thanks to Jakob and Anton for their reviews.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155395 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 21:39:35 +00:00
Jim Grosbach
1d52184cd1 ARM: VSLI two-operand assmebly aliases are tblgen'erated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155393 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 21:22:04 +00:00
Jim Grosbach
e1d866e3c3 ARM: tblgen'erate VSRA/VRSRA/VSRI assembly two-operand aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155392 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 21:00:49 +00:00
Jim Grosbach
13b7352fe4 ARM: vqdmulh two-operand aliases are tblgen'erated now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155387 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 20:37:20 +00:00
Michael J. Spencer
8dab504799 [Support/Unix] Unconditionally include time.h.
When building LLVM on Linux with libc++ with CMake TIME_WITH_SYS_TIME is
undefined, and HAVE_SYS_TIME_H is defined. This ends up including
sys/time.h but not time.h. Unix/TimeValue.inc requires time.h for asctime_r
and localtime. libstdc++ seems to include time.h anyway, but libc++ does
not.

Fix this by always including time.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155382 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 19:00:27 +00:00
Eric Christopher
216432df5a Allow forward declarations to take a context. This helps the debugger
find forward declarations in the context that the actual definition
will occur.

rdar://11291658

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155380 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 19:00:11 +00:00
Chandler Carruth
e3fd2a36d9 Temporarily revert r155364 until the upstream review can complete, per
the stated developer policy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155373 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 18:28:57 +00:00
Chandler Carruth
d410eaba04 Revert r155365, r155366, and r155367. All three of these have regression
test suite failures. The failures occur at each stage, and only get
worse, so I'm reverting all of them.

Please resubmit these patches, one at a time, after verifying that the
regression test suite passes. Never submit a patch without running the
regression test suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155372 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 18:25:57 +00:00
Sirish Pande
15e56ad885 Hexagon V5 (floating point) support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155367 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 17:49:40 +00:00
Sirish Pande
1bfd24851e Support for Hexagon architectural feature, new value jump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155366 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 17:49:28 +00:00
Sirish Pande
0dac3919e5 Support for Hexagon VLIW Packetizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155365 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 17:49:20 +00:00
Sirish Pande
9f6852dcc2 Hexagon Packetizer's target independent fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155364 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 17:49:09 +00:00
Jakob Stoklund Olesen
72847f3057 Reapply r155136 after fixing PR12599.
Original commit message:

Defer some shl transforms to DAGCombine.

The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.

Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.

These transformations are deferred:

  (X >>? C) << C   --> X & (-1 << C)  (When X >> C has multiple uses)
  (X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2)   (When C2 > C1)
  (X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2)  (When C1 > C2)

The corresponding exact transformations are preserved, just like
div-exact + mul:

  (X >>?,exact C) << C   --> X
  (X >>?,exact C1) << C2 --> X << (C2-C1)
  (X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)

The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155362 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 17:39:52 +00:00
Sylvestre Ledru
9dc06bd431 Conflict with st_dev/st_ino identifiers under Debian GNU/Hurd
The problem is that the struct file_status on UNIX systems has two
members called st_dev and st_ino; those are also members of the
struct stat, and they are reserved identifiers which can also be
provided as #define (and this is the case for st_dev on Hurd).
The solution (attached) is to rename them, for example adding a
"fs_" prefix (= file status) to them.

Patch by Pino Toscano




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155354 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 16:37:23 +00:00
Alexander Potapenko
55cabae685 Fix issue 67 by checking that the interface functions weren't redefined in the compiled source file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155346 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 10:47:31 +00:00
Kostya Serebryany
2d5fdf81dc [tsan] use llvm/ADT/Statistic.h for tsan stats
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155341 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 08:44:59 +00:00
Craig Topper
708e44fc96 Use MVT instead of EVT through all of LowerVECTOR_SHUFFLEtoBlend and not just the switch. Saves a little bit of binary size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155339 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 07:36:33 +00:00
Craig Topper
9d35240eee Make getZeroVector and getOnesVector more alike as far as how they detect 128-bit versus 256-bit vectors. Be explicit about both sizes and use llvm_unreachable. Similar changes to getLegalSplat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155337 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 07:24:41 +00:00
Craig Topper
69947b9cea Tidy up by removing some 'else' after 'return'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155336 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 06:57:04 +00:00
Craig Topper
1842ba0dfc Tidy up spacing in LowerVECTOR_SHUFFLEtoBlend. Remove code that checks if shuffle operand has a different type than the the shuffle result since it can never happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155333 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 06:38:28 +00:00
Craig Topper
731dfd0da9 Add a couple llvm_unreachables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155332 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 03:42:40 +00:00
Craig Topper
0fbf364fd7 Remove some tab characers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155331 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 03:28:34 +00:00
Craig Topper
e8eb116ff3 Remove some 'else' after 'return'. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155330 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 03:26:18 +00:00
Chris Lattner
a9963c648e Don't die with an assertion if the Result bitwidth is already correct. This
fixes an assert reading "1239123123123123" when the result is already 64-bit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 00:27:54 +00:00
Bill Wendling
85d043d6f6 Cleanup whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155328 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 00:23:33 +00:00
Bill Wendling
098c595dd2 Limit the number of times we recurse through this algorithm. All of the
intructions are processed. So there's no need to look at them if they're used as
operands of other instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155327 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23 00:22:55 +00:00
Craig Topper
b14940a047 Make Extract128BitVector and Insert128BitVector take an unsigned instead of an ConstantNode SDValue. getConstant was almost always called just before only to have the functions take it apart and build a new ConstantSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155325 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 20:55:18 +00:00
Craig Topper
767b4f64a0 Convert getNode(UNDEF) to getUNDEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155321 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 19:29:34 +00:00
Craig Topper
df966f6bee Make calls to getVectorShuffle more consistent. Use shuffle VT for calls to getUNDEF instead of requerying. Use &Mask[0] instead of Mask.data().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155320 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 19:17:57 +00:00
Craig Topper
d63fa657e4 Tidy up. 80 columns and argument alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155319 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 18:51:37 +00:00
Craig Topper
4c7972d638 Simplify code by converting multiple places that were manually concatenating 128-bit vectors to use either CONCAT_VECTORS or a helper function. CONCAT_VECTORS will itself be lowered to the same pattern as before. The helper function is needed for concats of BUILD_VECTORs since getNode(CONCAT_VECTORS) will just return a large BUILD_VECTOR and we may be trying to lower large BUILD_VECTORS when this occurs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155318 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 18:15:59 +00:00
Benjamin Kramer
bfae1fd1fc ARM: Initialize the HasRAS bit.
Found by valgrind.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155313 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 11:52:41 +00:00
Elena Demikhovsky
1da5867236 ZERO_EXTEND/SIGN_EXTEND/TRUNCATE optimization for AVX2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155309 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 09:39:03 +00:00
Bill Wendling
eb23f9e92e Remove some potential warnings about variables used uninitialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155307 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-22 07:23:04 +00:00
Bill Wendling
d46575f190 Add a flag to the struct type finder to collect only those types which have
names. This saves collecting types we normally don't care about.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155300 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 23:59:16 +00:00
Chris Lattner
2dbd7844e8 No need for "else if" after a return. Autosense "0o123" as octal in
StringRef::getAsInteger


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155298 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 22:03:05 +00:00
Nadav Rotem
db3461662e Teach getVectorTypeBreakdown about promotion of vectors in addition to widening of vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155296 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 20:08:32 +00:00
Craig Topper
9e401f22ec Make some fixed arrays const. Use array_lengthof in a couple places instead of a hardcoded number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155294 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 18:58:38 +00:00
Craig Topper
d0cf565e79 Tidy up. 80 columns and some other spacing issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155291 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 18:13:35 +00:00
NAKAMURA Takumi
8959393533 llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build on MSVC.
Thanks to Andy Gibbs, to report the issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155287 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 15:31:45 +00:00
NAKAMURA Takumi
d2f16a292b HexagonISelLowering.cpp: Reorder #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155286 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 15:31:36 +00:00
Nuno Lopes
e0af267bc2 move Signals to .rodata
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155283 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 14:45:37 +00:00
NAKAMURA Takumi
d1ad82f869 HexagonInstPrinter.cpp: Suppress -Wunused-variable warnings with -Asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 11:24:55 +00:00
Benjamin Kramer
2ddb84506c YAMLParser: silence warning about tautological comparison on unsigned-char platforms.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155280 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 10:51:42 +00:00
Jim Grosbach
8e3c17aabf ARM: tblgen'erate more NEON two-operand aliases.
VMUL and VEXT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155258 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 23:46:33 +00:00
Jakob Stoklund Olesen
0b35c35efc Fix PR12599.
The X86 target is editing the selection DAG while isel is selecting
nodes following a topological ordering. When the DAG hacking triggers
CSE, nodes can be deleted and bad things happen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155257 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 23:36:09 +00:00
Jim Grosbach
d83c9ea7d1 ARM: tblgen'erate more NEON two-operand aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155254 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 23:30:14 +00:00
Bill Wendling
c827834d49 Revert r155241, which is causing some breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155253 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 23:11:38 +00:00
Jakob Stoklund Olesen
8c48e4ff89 Make ISelPosition a local variable.
Now that multiple DAGUpdateListeners can be active at the same time,
ISelPosition can become a local variable in DoInstructionSelection.

We simply register an ISelUpdater with CurDAG while ISelPosition exists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155249 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 22:08:50 +00:00
Jakob Stoklund Olesen
bc7d448f24 Register DAGUpdateListeners with SelectionDAG.
Instead of passing listener pointers to RAUW, let SelectionDAG itself
keep a linked list of interested listeners.

This makes it possible to have multiple listeners active at once, like
RAUWUpdateListener was already doing. It also makes it possible to
register listeners up the call stack without controlling all RAUW calls
below.

DAGUpdateListener uses an RAII pattern to add itself to the SelectionDAG
list of active listeners.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155248 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 22:08:46 +00:00
Bill Wendling
64c7af8900 If we discover all of the named structs in a module, then don't bother to
process any more Values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155241 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 21:56:24 +00:00
Jakob Stoklund Olesen
3429c7571e Print <def,read-undef> to avoid confusion.
The <undef> flag on a def operand only applies to partial register
redefinitions. Only print the flag when relevant, and print it as
<def,read-undef> to make it clearer what it means.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155239 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 21:45:33 +00:00
Andrew Trick
a30444a69c New and improved comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155229 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:24:33 +00:00
Andrew Trick
c0ccb8bb17 SparseSet: Add support for key-derived indexes and arbitrary key types.
This nicely handles the most common case of virtual register sets, but
also handles anticipated cases where we will map pointers to IDs.

The goal is not to develop a completely generic SparseSet
template. Instead we want to handle the expected uses within llvm
without any template antics in the client code. I'm adding a bit of
template nastiness here, and some assumption about expected usage in
order to make the client code very clean.

The expected common uses cases I'm designing for:
- integer keys that need to be reindexed, and may map to additional
  data
- densely numbered objects where we want pointer keys because no
  number->object map exists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:05:28 +00:00
Andrew Trick
918f38ab24 misched: initialize BB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:05:21 +00:00
Jim Grosbach
d8b3ed8f25 ARM: Update NEON assembly two-operand aliases.
Use the new TwoOperandAliasConstraint to handle lots of the two-operand aliases
for NEON instructions. There's still more to go, but this is a good chunk of
them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155210 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 18:12:54 +00:00
Gabor Greif
413ca0d34b effectively back out my last change (r155190)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155195 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 11:41:38 +00:00
Gabor Greif
c77d6781d5 fix obviously bogus (IMO) operand index of the load in asserts
(load only has one operand) and smuggle in some whitespace changes too

NB: I am obviously testing the water here, and believe that the unguarded
    cast is still wrong, but why is the getZExtValue of the load's operand
    tested against zero here? Any review is appreciated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 08:58:49 +00:00
Craig Topper
420761a0f1 Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 07:30:17 +00:00
Craig Topper
c909950c38 Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155186 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 06:31:50 +00:00
Jakob Stoklund Olesen
eece9dc81c Revert r155136 "Defer some shl transforms to DAGCombine."
While the patch was perfect and defect free, it exposed a really nasty
bug in X86 SelectionDAG that caused an llc crash when compiling lencod.

I'll put the patch back in after fixing the SelectionDAG problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155181 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 00:38:45 +00:00
Jim Grosbach
181b147975 ARM some VFP tblgen'erated two-operand aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 00:15:00 +00:00
Jim Grosbach
2a22b691b6 ARM let TableGen handle a few two-operand aliases.
No need for these explicit aliases anymore. Nuke 'em.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 23:59:26 +00:00
Bill Wendling
dc21604d4a Put this expensive check below the less expensive ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 23:31:07 +00:00
Dan Gohman
8b74e5afda Avoid a bug in the path count computation, preventing an infinite
loop repeatedlt making the same change. This is for rdar://11256239.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155160 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 21:50:46 +00:00
Jakob Stoklund Olesen
0d5fcae6cd Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.

Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.

These transformations are deferred:

  (X >>? C) << C   --> X & (-1 << C)  (When X >> C has multiple uses)
  (X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2)   (When C2 > C1)
  (X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2)  (When C1 > C2)

The corresponding exact transformations are preserved, just like
div-exact + mul:

  (X >>?,exact C) << C   --> X
  (X >>?,exact C1) << C2 --> X << (C2-C1)
  (X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)

The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 16:46:26 +00:00
Gabor Greif
a4b00b2db7 zap tabs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 15:16:31 +00:00
Andrew Trick
fc728fbdc2 Allow targets to select the default scheduler by name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 01:34:10 +00:00
Kevin Enderby
c007eff536 Fixed the llvm-mv X86 disassembler so the 'C' API gets jumps properly
symbolicated.  These have and operand type of TYPE_RELv which was not handled
as isBranch in translateImmediate() in X86Disassembler.cpp.  rdar://11268426 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155074 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 23:12:11 +00:00
Dan Gohman
3b5b2a22ca Don't crash on code where the user put __attribute__((constructor)) on
a function with arguments. This fixes rdar://11265785.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155073 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 22:24:33 +00:00
Chandler Carruth
37097623bb This reverts a long string of commits to the Hexagon backend. These
commits have had several major issues pointed out in review, and those
issues are not being addressed in a timely fashion. Furthermore, this
was all committed leading up to the v3.1 branch, and we don't need piles
of code with outstanding issues in the branch.

It is possible that not all of these commits were necessary to revert to
get us back to a green state, but I'm going to let the Hexagon
maintainer sort that out. They can recommit, in order, after addressing
the feedback.

Reverted commits, with some notes:

Primary commit r154616: HexagonPacketizer
  - There are lots of review comments here. This is the primary reason
    for reverting. In particular, it introduced large amount of warnings
    due to a bad construct in tablegen.
  - Follow-up commits that should be folded back into this when
    reposting:
    - r154622: CMake fixes
    - r154660: Fix numerous build warnings in release builds.
  - Please don't resubmit this until the three commits above are
    included, and the issues in review addressed.

Primary commit r154695: Pass to replace transfer/copy ...
  - Reverted to minimize merge conflicts. I'm not aware of specific
    issues with this patch.

Primary commit r154703: New Value Jump.
  - Primarily reverted due to merge conflicts.
  - Follow-up commits that should be folded back into this when
    reposting:
    - r154703: Remove iostream usage
    - r154758: Fix CMake builds
    - r154759: Fix build warnings in release builds
  - Please incorporate these fixes and and review feedback before
    resubmitting.

Primary commit r154829: Hexagon V5 (floating point) support.
  - Primarily reverted due to merge conflicts.
  - Follow-up commits that should be folded back into this when
    reposting:
    - r154841: Remove unused variable (fixing build warnings)

There are also accompanying Clang commits that will be reverted for
consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155047 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 21:31:19 +00:00
Pete Cooper
722b6f1853 LiveIntervalUpdate validators weren't recorded after the calls to std::for_each. Turns out std::for_each doesn't update the variable passed in for the functor but instead copy constructs a new one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155041 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 20:29:17 +00:00
Benjamin Kramer
89f33fdb77 SourceMgr: Colorize diagnostics.
Same color scheme as clang uses. The colors are only enabled if the output is a tty.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155035 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 19:04:15 +00:00
Akira Hatanaka
a69534912d Mark instruction classes ArithLogicR, ArithLogicI and LoadUpper as isRematerializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155031 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 18:52:10 +00:00
Akira Hatanaka
9853b49f61 Delete blank line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155030 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 18:47:17 +00:00
Jim Grosbach
28b810e9e4 Fix copy/paste-o.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155016 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 18:09:53 +00:00
Jim Grosbach
97c02bf240 TableGen add warning diagnostic helper functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155012 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 17:46:31 +00:00
Silviu Baranga
35ee7d28a6 Added support for disassembling unpredictable swp/swpb ARM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155004 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 14:18:57 +00:00
Silviu Baranga
6b9f97dd89 Fix the bahavior of the disassembler when decoding unpredictable mrs instructions on ARM. Now the diasassembler emmits warnings instead of errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155002 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 14:09:07 +00:00
Silviu Baranga
fa1ebc6abe Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the disassembler. Since the upredicability conditions are complex, C++ code was added to handle them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 13:12:50 +00:00
Silviu Baranga
e546c4c9c3 Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocessor number was removed for this instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155000 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 13:02:55 +00:00
Silviu Baranga
9e71231309 Add suport for unpredicatble cases of the cmp, tst, teq and cmnz ARM instructions in the disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154999 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 12:48:43 +00:00
Benjamin Kramer
4bb87cbac5 SmallPtrSet: Reuse DenseMapInfo's pointer hash function instead of inventing a bad one ourselves.
DenseMap's hash function uses slightly more entropy and reduces hash collisions
significantly.  I also experimented with Hashing.h, but it didn't gave a lot of
improvement while being much more expensive to compute.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154996 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 10:37:32 +00:00
Bill Wendling
1356041296 Use a heavy hammer to fix PR12573.
If the loop contains invoke instructions, whose unwind edge escapes the loop,
then don't try to unswitch the loop. Doing so may cause the unwind edge to be
split, which not only is non-trivial but doesn't preserve loop simplify
information.

Fixes PR12573


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154987 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 06:00:09 +00:00
Craig Topper
a963c81819 Remove AVX vpermil intrinsics. I removed their uses from clang headers and builtins a while back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154985 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 05:24:00 +00:00
Andrew Trick
b512263596 loop-reduce: Add an early bailout to catch extremely large loops.
This introduces a threshold of 200 IV Users, which is very
conservative but should be sufficient to avoid serious compile time
sink or stack overflow. The llvm test-suite with LTO never exceeds 190
users per loop.

The bug doesn't relate to a specific type of loop. Checking in an
arbitrary giant loop as a unit test would be silly.

Fixes rdar://11262507.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154983 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 04:00:10 +00:00
Seth Cantrell
575fcb38de fix error check in assert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154971 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 00:40:23 +00:00
David Blaikie
b0616a5afc C++ has newlines at the end of files (including include files).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154962 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 23:46:51 +00:00
Joe Groff
d5bda5ec66 fix pr12559: mark unavailable win32 math libcalls
also fix SimplifyLibCalls to use TLI rather than compile-time conditionals to enable optimizations on floor, ceil, round, rint, and nearbyint

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154960 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 23:05:54 +00:00
Joel Jones
d16ce17711 Fixes a problem in instruction selection with testing whether or not the
transformation:

(X op C1) ^ C2 --> (X op C1) & ~C2 iff (C1&C2) == C2

should be done.  

This change has been tested:
 Using a debug+asserts build:
   on the specific test case that brought this bug to light
   make check-all
   lnt nt
   using this clang to build a release version of clang
 Using the release+asserts clang-with-clang build:
   on the specific test case that brought this bug to light
   make check-all
   lnt nt

Checking in because Evan wants it checked in.  Test case forthcoming after
scrubbing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154955 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 22:23:10 +00:00
Chad Rosier
3f5966b85e Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154953 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 21:48:36 +00:00
Danil Malyshev
ab427334f5 Fix incorrect call of resolveRelocation() for ARM ELF stub relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154948 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 20:10:16 +00:00
Seth Cantrell
fdc97cd2c3 platform support for counting column widths and checking isprint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154944 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 20:03:03 +00:00
Akira Hatanaka
b90757078f Delete latter half of CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154936 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 18:18:09 +00:00
Akira Hatanaka
ecdc9d5bb2 Add disassembler to MIPS.
Patch by Vladimir Medic. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154935 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 18:03:21 +00:00
Manuel Klimek
61c3d30015 Goodbye, JSONParser...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154930 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 17:21:17 +00:00
Jay Foad
ef1a3a25b3 Remove unused CCIfSubtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154921 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 11:29:05 +00:00