Commit Graph

80263 Commits

Author SHA1 Message Date
Craig Topper
4eaca023dc Remove more vector_shuffle patterns for unpack. These should be target specific nodes when they get to isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150363 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-13 05:48:49 +00:00
Craig Topper
3b17bf9a7c Recommit r150328. Previous test failures should be fixed by r150360.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150362 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-13 05:10:10 +00:00
Craig Topper
3434b4354a Revert accidental commit of a pruned testcase from r150360.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150361 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-13 04:33:33 +00:00
Craig Topper
2dcd718c13 Update CanXFormVExtractWithShuffleIntoLoad to ensure bitcasts of loads only have one use. Matches DAGCombiner and prevents vector_shuffles from reaching isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150360 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-13 04:30:38 +00:00
NAKAMURA Takumi
7f42e9886e Revert r150328, "Remove more vector_shuffle patterns."
It caused 3 failures on pre-penryn and non-x86(generic) hosts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150357 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-13 00:10:15 +00:00
Pete Cooper
ce3900849a Fixed bug when custom lowering DEC64m on x86.
If the DEC node had more than one user, it was doing this lowering but
leaving the original DEC node around and so decrementing twice.

Fixes PR11964.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150356 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-13 00:10:03 +00:00
Nadav Rotem
2ee746b87d This patch addresses the problem of poor code generation for the zext
v8i8 -> v8i32 on AVX machines. The codegen often scalarizes ANY_EXTEND nodes.
The DAGCombiner has two optimizations that can mitigate the problem. First,
if all of the operands of a BUILD_VECTOR node are extracted from an ZEXT/ANYEXT
nodes, then it is possible to create a new simplified BUILD_VECTOR which uses
UNDEFS/ZERO values to eliminate the scalar ZEXT/ANYEXT nodes.
Second, another dag combine optimization lowers BUILD_VECTOR into a shuffle
vector instruction.

In the case of zext v8i8->v8i32 on AVX, a value in an XMM register is to be
shuffled into a wide YMM register.

This patch modifes the second optimization and allows the creation of
shuffle vectors even when the newly generated vector and the original vector
from which we extract the values are of different types.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150340 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-12 15:05:31 +00:00
Benjamin Kramer
61c2c128f7 StringSwitchify the rest of Triple.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150332 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-12 10:56:52 +00:00
Chandler Carruth
06accdade8 Switch a bunch of manual if-chains to use StringSwitch. Clean them up in
the process. Some of these are still a bit gross.

Still, this cuts 80 some lines out of this ridiculous file. ;]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150331 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-12 09:27:38 +00:00
Craig Topper
cc9231a05d Remove more vector_shuffle patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150328 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-12 08:14:35 +00:00
Eli Bendersky
f4eff4baeb Expose the ELFObjectFile class directly in the Object/ELF.h header, similarly
to what's done for MachO and COFF. This allows advanced uses of the class to
be implemented outside the Object library. In particular, the DyldELFObject
subclass is now moved into its logical home - ExecutionEngine/RuntimeDyld.

This patch was reviewed by Michael Spencer.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150327 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-12 06:12:10 +00:00
Nick Lewycky
132bd9ce56 Handle InvokeInst in EvaluateBlock. Don't try to support exceptions, it's just
that no optz'ns have run yet to convert invokes to calls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150326 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-12 05:09:35 +00:00
Nick Lewycky
6f160d3d78 false is totally null!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150324 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-12 02:17:18 +00:00
Nick Lewycky
6a7df9aae6 Remove redundant getAnalysis<> calls in GlobalOpt. Add a few Itanium ABI calls
to TargetLibraryInfo and use one of them in GlobalOpt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150323 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-12 02:15:20 +00:00
Nick Lewycky
6a577f82ba Pass TargetData and TargetLibraryInfo through to the constant folder. Fixes a
few fixme's when TLI was added.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150322 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-12 01:13:18 +00:00
Craig Topper
26f927951b Remove more vector_shuffle patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150321 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-12 01:07:34 +00:00
Nick Lewycky
db292a6f7f Fix function name in comment to match actual name. Fix comments that are using
doxy-style on local variables to not do so. Fix one 80-col violation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150320 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-12 00:52:26 +00:00
Nick Lewycky
8e4ba6b954 Don't traverse the PHI nodes twice. No functionality change!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150319 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-12 00:47:24 +00:00
Craig Topper
1f2fa99b2a Remove more vector_shuffle patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150314 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 23:31:01 +00:00
Anton Korobeynikov
d4a19b6a72 Add support for implicit TLS model used with MS VC runtime.
Patch by Kai Nacke!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150307 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 17:26:53 +00:00
Benjamin Kramer
6b30274e27 Don't mix declarations and code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150305 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 16:01:02 +00:00
Benjamin Kramer
88b6fc06db Make the EDis tables const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150304 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 14:51:07 +00:00
Benjamin Kramer
953362cdfb Reuse the enum names from X86Desc in the X86Disassembler.
This requires some gymnastics to make it available for C code. Remove the names
from the disassembler tables, making them relocation free.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150303 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 14:50:54 +00:00
Bill Wendling
b9d75a94dd Document the new module flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150301 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 11:59:36 +00:00
Bill Wendling
d34cb1e09f [WIP] Initial code for module flags.
Module flags are key-value pairs associated with the module. They include a
'behavior' value, indicating how module flags react when mergine two
files. Normally, it's just the union of the two module flags. But if two module
flags have the same key, then the resulting flags are dictated by the behaviors.

Allowable behaviors are:

     Error
       Emits an error if two values disagree.

     Warning
       Emits a warning if two values disagree.

     Require
       Emits an error when the specified value is not present
       or doesn't have the specified value. It is an error for
       two (or more) llvm.module.flags with the same ID to have
       the Require behavior but different values. There may be
       multiple Require flags per ID.

     Override
       Uses the specified value if the two values disagree. It
       is an error for two (or more) llvm.module.flags with the
       same ID to have the Override behavior but different
       values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150300 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 11:38:06 +00:00
Craig Topper
a819c397e7 Remove some patterns for matching vector_shuffle instructions since vector_shuffles should be custom lowered before isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 07:43:35 +00:00
Andrew Trick
746f24b732 Add TargetPassConfig hooks for scheduling/bundling.
In case the MachineScheduling pass I'm working on doesn't work well
for another target, they can completely override it. This also adds a
hook immediately after the RegAlloc pass to cleanup immediately after
vregs go away. We may want to fold it into the postRA hook later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150298 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 07:11:32 +00:00
Andrew Trick
fda655ec23 comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150297 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 07:11:29 +00:00
Craig Topper
39a9e485f2 Fix shuffle lowering code to stop creating temporary DAG nodes to do shuffle mask checks on. This seemed to be confusing things such that vector_shuffle ops to got through to iselection. This is another step towards removing the vector_shuffle handling patterns from isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150296 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 06:24:48 +00:00
Jakob Stoklund Olesen
5637379000 Allow Post-RA LICM to hoist reserved register reads.
When using register masks, registers like %rip are clobbered by the
register mask. LICM should still be able to hoist instructions reading
%rip from a loop containing calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150288 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 00:44:19 +00:00
Jakob Stoklund Olesen
a6d513f474 Handle register masks in local live range splitting.
Again the goal is to produce identical assembly with register mask
operands enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150287 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 00:42:18 +00:00
Jakob Stoklund Olesen
fd3d4cf0ef Don't read PreRegAlloc before it is initialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150286 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 00:40:36 +00:00
Jim Grosbach
f06dfa7860 Revert r150222, as the clang driver now handles this properly.
Now that the clang driver passes the CPU and feature information to
the backend when processing assembly files (150273), this isn't necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150274 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 20:38:46 +00:00
Jakob Stoklund Olesen
f1deaff53b Clean up comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150262 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 19:27:34 +00:00
Jakob Stoklund Olesen
938200859e Add a static MachineOperand::clobbersPhysReg().
It can be necessary to detach a register mask pointer from its
MachineOperand. This method is convenient for checking clobbered
physregs on a detached bitmask pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150261 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 19:23:53 +00:00
Jakob Stoklund Olesen
6ef7da0197 Add register mask support to InterferenceCache.
This makes global live range splitting behave identically with and
without register mask operands.

This is not necessarily the best way of using register masks for live
range splitting.  It would be more efficient to first split global live
ranges around calls (i.e., register masks), and reserve the fine grained
per-physreg interference guidance for global live ranges that do not
cross calls.

For now the goal is to produce identical assembly when enabling register
masks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150259 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 18:58:34 +00:00
Jakob Stoklund Olesen
3bf7a1cc3c Remove unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150258 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 18:52:15 +00:00
Pete Cooper
f95acc6d02 Added description of invariant.load metadata to LangRef. It was added to the compiler in r144100
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150257 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 18:13:54 +00:00
Jason W Kim
1de886c1fa Make valgrind happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150251 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 16:07:59 +00:00
Hal Finkel
38a7f22445 Update BBVectorize to use aliasesUnknownInst.
This allows BBVectorize to check the "unknown instruction" list in the
alias sets. This is important to prevent instruction fusing from reordering
function calls. Resolves PR11920.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150250 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 15:52:40 +00:00
Hal Finkel
ce0dd7314b Have AliasSet::aliasesUnknownInst use pointer TBAA info when available
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150249 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 15:52:39 +00:00
Hal Finkel
1a4ccc3aa2 Make aliasesPointer and aliasesUnknownInst public members of AliasSet.
These query functions are safe for external use and, furthermore,
are the only way to make queries against the "unknown instructions" array.
BBVectorize will use these functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150248 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 15:52:37 +00:00
Duncan Sands
aa97bb54f0 Fix PR11948: the result type of an icmp may be a vector of boolean -
don't assume it is a boolean.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150247 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 14:31:24 +00:00
Duncan Sands
edfb931edb Revert commit 149912 (lattner) and add a testcase that shows the problem (which
is that patterns no longer match for vectors of booleans, because you only get
ConstantDataVector when the vector element type is i8, i16, etc, not when it is
i1).  Original commit message:
Remove some dead code and tidy things up now that vectors use ConstantDataVector
instead of always using ConstantVector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150246 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 14:26:42 +00:00
Benjamin Kramer
c667ba69ac Put instruction names into an indexed string table on the side, removing a pointer from MCInstrDesc.
Make them accessible through MCInstrInfo. They are only used for debugging purposes so this doesn't
have an impact on performance. X86MCTargetDesc.o goes from 630K to 461K on x86_64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150245 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 13:18:44 +00:00
Andrew Trick
06efdd238e comment grammar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 07:08:25 +00:00
Jia Liu
060047f03b update --enable-targets list
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150229 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 04:58:24 +00:00
Andrew Trick
4a5f3cd6ca unnecessary include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150228 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 04:10:44 +00:00
Andrew Trick
1e9bcb3b1f PTX no longer needs to provide its own backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 04:10:40 +00:00
Andrew Trick
8dd26253f5 RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
Creates a configurable regalloc pipeline.

Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa.

When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>.

CodeGen transformation passes are never "required" as an analysis

ProcessImplicitDefs does not require LiveVariables.

We have a plan to massively simplify some of the early passes within the regalloc superpass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 04:10:36 +00:00