Commit Graph

16722 Commits

Author SHA1 Message Date
Craig Topper
4feb647283 Implement proper handling for pcmpistri/pcmpestri intrinsics. Requires custom handling in DAGISelToDAG due to limitations in TableGen's implicit def handling. Fixes PR11305.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161318 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-06 06:22:36 +00:00
Craig Topper
d230d20b73 Update test to check for r161305
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161307 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-05 09:06:28 +00:00
Hal Finkel
8cc3474f72 Add readcyclecounter lowering on PPC64.
On PPC64, this can be done with a simple TableGen pattern.
To enable this, I've added the (otherwise missing) readcyclecounter
SDNode definition to TargetSelectionDAG.td.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161302 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-04 14:10:46 +00:00
Anton Korobeynikov
b58d7d0312 Add stack spill / reload instructions for DTriple and DQuad register classes, which
were missed for no reason. This fixes PR13377


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-04 13:16:12 +00:00
Bob Wilson
53624a2df5 Refactor and check "onlyReadsMemory" before optimizing builtins.
This patch is mostly just refactoring a bunch of copy-and-pasted code, but
it also adds a check that the call instructions are readnone or readonly.
That check was already present for sin, cos, sqrt, log2, and exp2 calls, but
it was missing for the rest of the builtins being handled in this code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161282 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-03 23:29:17 +00:00
Akira Hatanaka
24e79e55da 1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
Change these to patterns.
2. Add another 16 instructions.

Patch by Reed Kotler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161272 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-03 22:57:02 +00:00
Bob Wilson
772af92cb1 Fix memcmp code-gen to honor -fno-builtin.
I noticed that SelectionDAGBuilder::visitCall was missing a check for memcmp
in TargetLibraryInfo, so that it would use custom code for memcmp calls even
with -fno-builtin.  I also had to add a new -disable-simplify-libcalls option
to llc so that I could write a test for this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161262 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-03 21:26:18 +00:00
Bob Wilson
d49edb7ab0 Fall back to selection DAG isel for calls to builtin functions.
Fast isel doesn't currently have support for translating builtin function
calls to target instructions.  For embedded environments where the library
functions are not available, this is a matter of correctness and not
just optimization.  Most of this patch is just arranging to make the
TargetLibraryInfo available in fast isel.  <rdar://problem/12008746>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161232 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-03 04:06:28 +00:00
Jush Lu
2946549a28 [arm-fast-isel] Add support for shl, lshr, and ashr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161230 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-03 02:37:48 +00:00
NAKAMURA Takumi
8b52c855b3 [CMake] Add yaml2obj to check-llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161229 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-03 00:45:32 +00:00
Matt Beaumont-Gay
923123c370 Move test yaml files under Inputs until they are converted to be the actual
test files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161219 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02 21:52:49 +00:00
Manman Ren
127eea87d6 X86 Peephole: fold loads to the source register operand if possible.
Add more comments and use early returns to reduce nesting in isLoadFoldable.
Also disable folding for V_SET0 to avoid introducing a const pool entry and
a const pool load.

rdar://10554090 and rdar://11873276


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161207 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02 19:37:32 +00:00
Michael J. Spencer
a915f247f7 Add yaml2obj. A utility to convert YAML to binaries.
yaml2obj takes a textual description of an object file in YAML format
and outputs the binary equivalent. This greatly simplifies writing
tests that take binary object files as input.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161205 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02 19:16:56 +00:00
Akira Hatanaka
bddf83614a Set transient stack alignment in constructor of MipsFrameLowering and re-enable
test o32_cc_vararg.ll.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161189 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02 18:15:13 +00:00
Jiangning Liu
1c37814960 Support fpv4 for ARM Cortex-M4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161163 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02 08:35:55 +00:00
Jiangning Liu
fd652df8b3 Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset index issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161162 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02 08:29:50 +00:00
Jiangning Liu
c1b7ca5ba2 Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161161 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02 08:21:27 +00:00
Jiangning Liu
1fb27eccf5 Fix #13241, a bug around shift immediate operand for ARM instruction ADR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161159 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02 08:13:13 +00:00
NAKAMURA Takumi
ac89c0ddfd llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll: Make sure this is testing without +avx.
FIXME: Could +avx be checked here too?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161156 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02 06:36:56 +00:00
NAKAMURA Takumi
25fa9a4890 llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll: Rewrite expressions to pass regardless of PR11031.
- Relax to match even if epilogue (pop %ebp) were emitted.
  - Assume the return value is stored to %xmm0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161155 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02 06:33:58 +00:00
Manman Ren
d7d003c2b7 X86 Peephole: fold loads to the source register operand if possible.
Machine CSE and other optimizations can remove instructions so folding
is possible at peephole while not possible at ISel.

This patch is a rework of r160919 and was tested on clang self-host on my local
machine.

rdar://10554090 and rdar://11873276


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161152 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02 00:56:42 +00:00
Eric Christopher
6635cad548 Temporarily revert c23b933d5f. It's causing
failures in the debug testsuite and possibly PR13486.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161121 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01 18:19:01 +00:00
Matt Beaumont-Gay
b705e4a8b6 Line endings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161117 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01 16:42:35 +00:00
Nuno Lopes
62ad748454 fix 'make check' when ocamlopt returns the compiler path with CFLAGS (and there's a cflag with a = char)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161114 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01 15:50:34 +00:00
Elena Demikhovsky
1503aba4a0 Added FMA functionality to X86 target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161110 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01 12:06:00 +00:00
Nick Lewycky
6ce2471806 Stay rational; don't assert trying to take the square root of a negative value.
If it's negative, the loop is already proven to be infinite. Fixes PR13489!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01 09:14:36 +00:00
Akira Hatanaka
cdb3ba71ce Add definitions of two subclasses of MipsFrameLowering, Mips16FrameLowering and
MipsSEFrameLowering.

Implement MipsSEFrameLowering::hasReservedCallFrame. Call frames will not be
reserved if there is a call with a large call frame or there are variable sized
objects on the stack.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 22:50:19 +00:00
Akira Hatanaka
1d53f1bbab Let PEI::calculateFrameObjectOffsets compute the final stack size rather than
computing it in MipsFrameLowering::emitPrologue.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161078 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 21:28:49 +00:00
Akira Hatanaka
1d165f1c25 Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.
The frame object which points to the dynamically allocated area will not be
needed after changes are made to cease reserving call frames.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161076 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 20:54:48 +00:00
Akira Hatanaka
e2d529ac11 When store nodes or memcpy nodes are created to copy the function call
arguments to the stack in MipsISelLowering::LowerCall, use stack pointer and
integer offset operands rather than frame object operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161068 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 18:46:41 +00:00
Chad Rosier
d97f3a5ab0 [x86 frame lowering] In 32-bit mode, use ESI as the base pointer.
Previously, we were using EBX, but PIC requires the GOT to be in EBX before 
function calls via PLT GOT pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161066 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 18:29:21 +00:00
Akira Hatanaka
36bcc11236 Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as
single-precision load and store.

Also avoid selecting LUXC1 and SUXC1 instructions during isel. It is incorrect
to map unaligned floating point load/store nodes to these instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161063 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 18:16:49 +00:00
Manman Ren
53b59d1d97 MachineSink: Sort the successors before trying to find SuccToSinkTo.
One motivating example is to sink an instruction from a basic block which has
two successors: one outside the loop, the other inside the loop. We should try
to sink the instruction outside the loop.

rdar://11980766


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161062 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 18:10:39 +00:00
Jakob Stoklund Olesen
34af6f597b Clear kill flags in removeCopyByCommutingDef().
We are extending live ranges, so kill flags are not accurate. They
aren't needed until they are recomputed after RA anyway.

<rdar://problem/11950722>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161023 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 02:47:24 +00:00
Manman Ren
1123614317 Reverse order of the two branches at end of a basic block if it is profitable.
We branch to the successor with higher edge weight first.
Convert from
     je    LBB4_8  --> to outer loop
     jmp   LBB4_14 --> to inner loop
to
     jne   LBB4_14
     jmp   LBB4_8

PR12750
rdar: 11393714


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161018 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 01:11:07 +00:00
Jim Grosbach
9714644a38 Keep empty assembly macro argument values in the middle of the list.
Empty macro arguments at the end of the list should be as-if not specified at
all, but those in the middle of the list need to be kept so as not to screw
up the positional numbering. E.g.:
.macro foo
foo_-bash___:
  nop
.endm

foo 1, 2, 3, 4
foo 1, , 3, 4

Should create two labels, "foo_1_2_3_4" and "foo_1__3_4".

rdar://11948769

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161002 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 22:44:17 +00:00
Pete Cooper
32ecfb4158 Consider address spaces for hashing and CSEing DAG nodes. Otherwise two loads from different x86 segments but the same address would get CSEd
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160987 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 20:23:19 +00:00
Kevin Enderby
5af4de18ef Fix a bug in ARMMachObjectWriter::RecordRelocation() in ARMMachObjectWriter.cpp
where the other_half of the movt and movw relocation entries needs to get set
and only with the 16 bits of the other half.

rdar://10038370


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160978 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 18:46:15 +00:00
Nadav Rotem
97baaeaeb2 When constant folding GEP expressions, keep the address space information of pointers.
Together with Ran Chachick <ran.chachick@intel.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160954 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 07:25:20 +00:00
Manman Ren
e8b4a4a9d1 Revert r160920 and r160919 due to dragonegg and clang selfhost failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160927 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-29 02:44:09 +00:00
Nick Lewycky
d64cb165d7 Add testcases for GlobalOpt changes in r160693 and r160757.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160925 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-29 01:15:37 +00:00
Manman Ren
14148c41d9 X86 Peephole: fold loads to the source register operand if possible.
Trying to fix the bot by specifying a triple in the failing testing cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160920 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-28 17:51:24 +00:00
Manman Ren
0eb3edea9c X86 Peephole: fold loads to the source register operand if possible.
Machine CSE and other optimizations can remove instructions so folding
is possible at peephole while not possible at ISel.

rdar://10554090 and rdar://11873276


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160919 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-28 16:48:01 +00:00
Manman Ren
43d9ab1812 X86 Peephole: fix PR13475 in optimizeCompare.
It is possible that an instruction can use and update EFLAGS.
When checking the safety, we should check the usage of EFLAGS first before
declaring it is safe to optimize due to the update.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160912 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-28 03:15:46 +00:00
Eric Christopher
c23b933d5f Add a DW_AT_high_pc for CUs that are a single address range. Update
all tests accordingly.

Fixes PR13351.

Patch by shinichiro hamaji!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160899 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 22:00:05 +00:00
Evan Cheng
9c777a4844 Teach CodeGenPrep to look past bitcast when it's duplicating return instruction
into predecessor blocks to enable tail call optimization.

rdar://11958338


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160894 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 21:21:26 +00:00
Jakob Stoklund Olesen
72e7dbf88b Add <imp-def> of super-register when lowering SUBREG_TO_REG.
Patch by Tyler Nowicki!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160888 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 20:19:49 +00:00
Nuno Lopes
e982de7be9 fix PR13390: do not loop forever with self-referencing self instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160876 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 18:21:15 +00:00
Nuno Lopes
75564e3514 fix infinite loop in instcombine in the presence of a (malformed) self-referencing select inst.
This can happen as long as the instruction is not reachable. Instcombine does generate these unreachable malformed selects when doing RAUW

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160874 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 18:03:57 +00:00
Pete Cooper
7971de4178 Simplify demanded bits of select sources where the condition is a constant vector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160835 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-26 23:10:24 +00:00