David Goodwin
53e4471adc
Add NEON single-precision FP support for fabs and fneg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:39:05 +00:00
Evan Cheng
3425df44b5
In thumb mode, r7 is used as frame register. This fixes pr4681.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78086 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 18:46:17 +00:00
David Goodwin
b84f3d427c
Match common pattern for FNMAC. Add NEON SP support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78085 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 18:44:29 +00:00
David Goodwin
42a83f2d15
Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 17:53:06 +00:00
Anton Korobeynikov
939ba32747
Ooops, I was too fast to commit the wrong fix :(
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78060 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 11:18:31 +00:00
Anton Korobeynikov
20e037a8c5
Fix a typo - this unbreaks llvm-gcc build on arm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78059 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 11:12:51 +00:00
Evan Cheng
eb084d1671
Thumb2 does not have ib (increment before) and da (decrement after) forms of ldm / stm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 08:34:18 +00:00
Evan Cheng
f0409ea488
Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster) generic algorithm for now. If more accurate computation is needed, we'll rely on the disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78032 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:56:09 +00:00
Evan Cheng
27934da97b
Load / store multiple pass fixes for Thumb2. Not enabled yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78031 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:43:45 +00:00
Evan Cheng
fa2ea1a8cf
Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78030 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:41:15 +00:00
Bob Wilson
a599bff101
Lower Neon VLD* intrinsics to custom DAG nodes, and manually allocate the
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results to fixed registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78025 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 00:36:16 +00:00
Bob Wilson
916afdbc2d
Minor cleanup. No functional changes intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78024 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 00:25:01 +00:00
Chris Lattner
5e44e472d6
use TLOF to compute the section for a function instead of
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replicating the logic manually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 22:32:50 +00:00
Chris Lattner
f61159b574
convert macho stub emission to use SwitchToSection instead of
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textual sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78007 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 22:18:15 +00:00
Bob Wilson
a6d658620f
Lower CONCAT_VECTOR during legalization instead of matching it during isel.
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Add a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 20:36:38 +00:00
Benjamin Kramer
d5fe92efbc
llvm_report_error already prints "LLVM ERROR:". So stop reporting errors like "LLVM ERROR: llvm: error:" or "LLVM ERROR: ERROR:".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77971 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 13:33:33 +00:00
Evan Cheng
9072c8198d
These are done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77949 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 04:08:36 +00:00
Evan Cheng
a8e8984ee4
Use the i12 variant of load / store opcodes if offset is zero. Now we pass all of multisource as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77939 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 02:38:06 +00:00
Daniel Dunbar
e28039cfd1
Move most targets TargetMachine constructor to only taking a target triple.
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- The C, C++, MSIL, and Mips backends still need the module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77927 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 23:37:13 +00:00
Daniel Dunbar
3be03406c9
Normalize Subtarget constructors to take a target triple string instead of
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Module*.
Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77918 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 22:11:08 +00:00
Chris Lattner
18a4c16726
move dwarf debug info section selection stuff from TAI to
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TLOF, unifying all the dwarf targets at the same time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 07:24:22 +00:00
Chris Lattner
24def37c85
ARM TAI no longer needs a TM, but createTargetAsmInfo() still does.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77878 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 05:23:52 +00:00
Chris Lattner
d90183d25d
Move the getInlineAsmLength virtual method from TAI to TII, where
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the only real caller (GetFunctionSizeInBytes) uses it.
The custom ARM implementation of this is basically reimplementing
an assembler poorly for negligible gain. It should be removed
IMNSHO, but I'll leave that to ARMish folks to decide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77877 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 05:20:37 +00:00
Chris Lattner
7bbd178d4b
turn some templated inline functions into static functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77873 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:52:00 +00:00
Chris Lattner
9ba8c6872d
remove the dead ELFTargetAsmInfo.h/cpp file. TargetAsmInfo
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defaults to being ELF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:33:09 +00:00
Chris Lattner
8d4a0a328a
remove TargetAsmInfo::TM, which is now dead. The basic TAI class now
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no longer depends on TM!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77863 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:27:24 +00:00
Chris Lattner
80ec2792b2
convert ctors/dtors section to be in TLOF instead of
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TAI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77842 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 00:34:36 +00:00
Chris Lattner
b80610cd13
REmove dead fields of TAI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77820 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 22:40:22 +00:00
Evan Cheng
25f7cfc3cc
Workaround a couple of Darwin assembler bugs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 06:13:52 +00:00
Evan Cheng
13f8b36205
Split t2MOVCCs since some assemblers do not recognize mov shifted register alias with predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 01:43:45 +00:00
Evan Cheng
b620724e61
Fix Thumb2 function call isel. Thumb1 and Thumb2 should share the same
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instructions for calls since BL and BLX are always 32-bit long and BX is always
16-bit long.
Also, we should be using BLX to call external function stubs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77756 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 00:16:10 +00:00
Evan Cheng
a0ee862f2e
t2BR_JT is mov pc, it's 2 byte long, not 4.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 22:22:22 +00:00
Evan Cheng
1119776b19
Thumb2 movcc need .w suffix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 22:21:55 +00:00
Chris Lattner
a87dea4f8c
switch off of 'Section' onto MCSection. We're not properly using
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MCSection subclasses yet, but this is a step in the right direction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77708 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:48:30 +00:00
Evan Cheng
ff6ab17619
Until we have a "ALIGN" pseudo instruction, have asm printer emitted a .align
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to ensure the instruction that follows a TBB (when the number of table entries
is odd) is 2-byte aligned.
Patch by Sandeep Patel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:35:56 +00:00
Evan Cheng
d26b14c34c
- Teach TBB / TBH offset limits are 510 and 131070 respectively since the offset
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is scaled by two.
- Teach GetInstSizeInBytes about TBB and TBH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77701 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:28:05 +00:00
Chris Lattner
f26e03bc7e
refactor section construction in TLOF to be through an explicit
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initialize method, which can be called when an MCContext is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77687 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 17:42:42 +00:00
Evan Cheng
ee42fd309e
When fp is not eliminated, instructions with T2_i12 modes will be changed to T2_i8 ones. Take that into consideration when determining stack size limit for reserving register scavenging slot.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77642 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 23:29:25 +00:00
David Goodwin
07337c0fcf
Remove redundant match for frame index from imm8 addrmode, it is handled by the imm12 addrmode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77632 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 22:45:52 +00:00
David Goodwin
8f65253236
Darwin assembler now recognizes "orn", so remove workaround.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77627 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 21:51:41 +00:00
David Goodwin
7c92f3ac99
Darwin assembler now supports "rrx", so remove workaround.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77625 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 21:38:40 +00:00
David Goodwin
d8c95b5ac2
Cleanup and include code selection for some frame index cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 18:56:48 +00:00
David Goodwin
3e4b22d983
Add missing D* register clobbers for Thumb-2 call.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77611 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 18:01:09 +00:00
Chris Lattner
513503961d
add a random codegen deficiency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77598 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 16:08:58 +00:00
Daniel Dunbar
7f93dc8345
Switch obvious clients to Twine instead of utostr (when they were already using
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a Twine, e.g., for names).
- I am a little ambivalent about this; we don't want the string conversion of
utostr, but using overload '+' mixed with string and integer arguments is
sketchy. On the other hand, this particular usage is something of an idiom.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77579 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 04:20:37 +00:00
Bob Wilson
cf661e2c56
Lower a 128-bit BUILD_VECTOR with 2 elements to a pair of INSERT_VECTOR_ELTs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 00:31:25 +00:00
Evan Cheng
8770f747a9
tbb / tbh instructions only branch forward, not backwards.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77522 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 23:20:20 +00:00
Evan Cheng
d600522608
Add VFP3 D registers to the DPR register class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77521 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 23:03:41 +00:00
Evan Cheng
20a2a0aff3
Make sure Thumb2 uses the right call instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77507 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 21:26:42 +00:00
Chris Lattner
2cfd52c507
Give getPointerRegClass() a "kind" value so that targets can
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support multiple different pointer register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77501 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 20:31:52 +00:00