Chris Lattner
541a24f7af
remove cases handled elsewhere
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28150 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 22:43:44 +00:00
Chris Lattner
d6f7fe76a6
Add some more simple sign bit propagation cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28149 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 22:39:59 +00:00
Jeff Cohen
d43b18d9e4
Fix some loose ends in MASM support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28148 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 21:27:14 +00:00
Chris Lattner
ee4ea92358
Use the new TargetLowering::ComputeNumSignBits method to eliminate
...
sign_extend_inreg operations. Though ComputeNumSignBits is still rudimentary,
this is enough to compile this:
short test(short X, short x) {
int Y = X+x;
return (Y >> 1);
}
short test2(short X, short x) {
int Y = (short)(X+x);
return Y >> 1;
}
into:
_test:
add r2, r3, r4
srawi r3, r2, 1
blr
_test2:
add r2, r3, r4
extsh r2, r2
srawi r3, r2, 1
blr
instead of:
_test:
add r2, r3, r4
srawi r2, r2, 1
extsh r3, r2
blr
_test2:
add r2, r3, r4
extsh r2, r2
srawi r2, r2, 1
extsh r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28146 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 09:30:03 +00:00
Chris Lattner
5c3e21d687
Add some really really simple code for computing sign-bit propagation.
...
This will certainly be enhanced in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28145 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 09:27:13 +00:00
Chris Lattner
f0df8824eb
When inserting casts, be careful of where we put them. We cannot insert
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a cast immediately before a PHI node.
This fixes Regression/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28143 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 09:10:37 +00:00
Chris Lattner
33a6113995
Move some code around.
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Make the "fold (and (cast A), (cast B)) -> (cast (and A, B))" transformation
only apply when both casts really will cause code to be generated. If one or
both doesn't, then this xform doesn't remove a cast.
This fixes Transforms/InstCombine/2006-05-06-Infloop.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28141 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 09:00:16 +00:00
Chris Lattner
80a7ecc923
Teach the X86 backend about non-i32 inline asm register classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28139 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 00:29:37 +00:00
Chris Lattner
c93dfda905
Fold (trunc (srl x, c)) -> (srl (trunc x), c)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28138 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 00:11:52 +00:00
Chris Lattner
b72773bb88
Fold trunc(any_ext). This gives stuff like:
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27,28c27
< movzwl %di, %edi
< movl %edi, %ebx
---
> movw %di, %bx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28137 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 22:56:26 +00:00
Chris Lattner
06afe07037
Shrink shifts when possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28136 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 22:53:17 +00:00
Chris Lattner
fe8babf689
Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28135 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 22:32:12 +00:00
Chris Lattner
35c3913328
Print a grouping around inline asm blocks so that we can tell when we are
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using them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28134 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:50:04 +00:00
Chris Lattner
7660ebc90a
Print *some* grouping around inline asm blocks so we know where they are.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28133 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:48:50 +00:00
Chris Lattner
1c05997bd8
Indent multiline asm strings more nicely
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28132 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:47:05 +00:00
Chris Lattner
bd04aa5796
Teach the code generator to use cvtss2sd as extload f32 -> f64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28131 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:35:18 +00:00
Chris Lattner
e564dbb51c
Fold (fpext (load x)) -> (extload x)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28130 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:34:35 +00:00
Chris Lattner
903236468c
More aggressively sink GEP offsets into loops. For example, before we
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generated:
movl 8(%esp), %eax
movl %eax, %edx
addl $4316, %edx
cmpb $1, %cl
ja LBB1_2 #cond_false
LBB1_1: #cond_true
movl L_QuantizationTables720$non_lazy_ptr, %ecx
movl %ecx, (%edx)
movl L_QNOtoQuantTableShift720$non_lazy_ptr, %edx
movl %edx, 4460(%eax)
ret
...
Now we generate:
movl 8(%esp), %eax
cmpb $1, %cl
ja LBB1_2 #cond_false
LBB1_1: #cond_true
movl L_QuantizationTables720$non_lazy_ptr, %ecx
movl %ecx, 4316(%eax)
movl L_QNOtoQuantTableShift720$non_lazy_ptr, %ecx
movl %ecx, 4460(%eax)
ret
... which uses one fewer register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28129 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:17:49 +00:00
Chris Lattner
581a7ad7c9
Fix an infinite loop compiling oggenc last night.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28128 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 20:51:30 +00:00
Evan Cheng
4713724eda
Need extload patterns after Chris' DAG combiner changes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28127 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 08:23:07 +00:00
Chris Lattner
6fc205fc44
Implement InstCombine/cast.ll:test29
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28126 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 06:39:07 +00:00
Chris Lattner
0d8dae749c
Fold some common code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28124 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 06:32:04 +00:00
Chris Lattner
540121f1ec
Implement:
...
// fold (and (sext x), (sext y)) -> (sext (and x, y))
// fold (or (sext x), (sext y)) -> (sext (or x, y))
// fold (xor (sext x), (sext y)) -> (sext (xor x, y))
// fold (and (aext x), (aext y)) -> (aext (and x, y))
// fold (or (aext x), (aext y)) -> (aext (or x, y))
// fold (xor (aext x), (aext y)) -> (aext (xor x, y))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28123 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 06:31:05 +00:00
Chris Lattner
a3dc3f692c
Pull and through and/or/xor. This compiles some bitfield code to:
...
mov EAX, DWORD PTR [ESP + 4]
mov ECX, DWORD PTR [EAX]
mov EDX, ECX
add EDX, EDX
or EDX, ECX
and EDX, -2147483648
and ECX, 2147483647
or EDX, ECX
mov DWORD PTR [EAX], EDX
ret
instead of:
sub ESP, 4
mov DWORD PTR [ESP], ESI
mov EAX, DWORD PTR [ESP + 8]
mov ECX, DWORD PTR [EAX]
mov EDX, ECX
add EDX, EDX
mov ESI, ECX
and ESI, -2147483648
and EDX, -2147483648
or EDX, ESI
and ECX, 2147483647
or EDX, ECX
mov DWORD PTR [EAX], EDX
mov ESI, DWORD PTR [ESP]
add ESP, 4
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28122 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 06:10:43 +00:00
Chris Lattner
5ffc066912
Implement a variety of simplifications for ANY_EXTEND.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28121 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 05:58:59 +00:00
Chris Lattner
35e5c14b80
Factor some code, add these transformations:
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// fold (and (trunc x), (trunc y)) -> (trunc (and x, y))
// fold (or (trunc x), (trunc y)) -> (trunc (or x, y))
// fold (xor (trunc x), (trunc y)) -> (trunc (xor x, y))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28120 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 05:51:50 +00:00
Evan Cheng
8f7f7125e9
Better implementation of truncate. ISel matches it to a pseudo instruction
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that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28119 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 05:40:20 +00:00
Chris Lattner
55c63257f3
New note, Nate, please check to see if I'm full of it :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28118 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 05:36:15 +00:00
Jeff Cohen
4b75e73791
Fix VC++ compilation error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28117 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 01:47:05 +00:00
Chris Lattner
7e598096ea
Sink noop copies into the basic block that uses them. This reduces the number
...
of cross-block live ranges, and allows the bb-at-a-time selector to always
coallesce these away, at isel time.
This reduces the load on the coallescer and register allocator. For example
on a codec on X86, we went from:
1643 asm-printer - Number of machine instrs printed
419 liveintervals - Number of loads/stores folded into instructions
1144 liveintervals - Number of identity moves eliminated after coalescing
1022 liveintervals - Number of interval joins performed
282 liveintervals - Number of intervals after coalescing
1304 liveintervals - Number of original intervals
86 regalloc - Number of times we had to backtrack
1.90232 regalloc - Ratio of intervals processed over total intervals
40 spiller - Number of values reused
182 spiller - Number of loads added
121 spiller - Number of stores added
132 spiller - Number of register spills
6 twoaddressinstruction - Number of instructions commuted to coalesce
360 twoaddressinstruction - Number of two-address instructions
to:
1636 asm-printer - Number of machine instrs printed
403 liveintervals - Number of loads/stores folded into instructions
1155 liveintervals - Number of identity moves eliminated after coalescing
1033 liveintervals - Number of interval joins performed
279 liveintervals - Number of intervals after coalescing
1312 liveintervals - Number of original intervals
76 regalloc - Number of times we had to backtrack
1.88998 regalloc - Ratio of intervals processed over total intervals
1 spiller - Number of copies elided
41 spiller - Number of values reused
191 spiller - Number of loads added
114 spiller - Number of stores added
128 spiller - Number of register spills
4 twoaddressinstruction - Number of instructions commuted to coalesce
356 twoaddressinstruction - Number of two-address instructions
On this testcase, this change provides a modest reduction in spill code,
regalloc iterations, and total instructions emitted. It increases the number
of register coallesces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28115 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 01:04:50 +00:00
Chris Lattner
b93b0347d8
Adjust to use proper TargetData copy ctor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28112 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 21:18:40 +00:00
Chris Lattner
6e994b7492
Final pass of minor cleanups for MachineInstr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28110 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 19:36:09 +00:00
Evan Cheng
14a6db8bd9
Initial support for register pressure aware scheduling. The register reduction
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scheduler can go into a "vertical mode" (i.e. traversing up the two-address
chain, etc.) when the register pressure is low.
This does seem to reduce the number of spills in the cases I've looked at. But
with x86, it's no guarantee the performance of the code improves.
It can be turned on with -sched-vertically option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28108 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 19:16:39 +00:00
Chris Lattner
943b5e117f
Remove redundancy and a level of indirection when creating machine operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28107 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 19:14:44 +00:00
Chris Lattner
8b915b4ed2
Remove and simplify some more machineinstr/machineoperand stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 18:16:01 +00:00
Chris Lattner
2d90ac7ca6
Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28104 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 18:05:43 +00:00
Chris Lattner
e53f4a055f
Move some methods out of MachineInstr into MachineOperand
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28102 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 17:52:23 +00:00
Chris Lattner
e3158308e0
Fix Transforms/InstCombine/2006-05-04-DemandedBitCrash.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28101 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 17:33:35 +00:00
Chris Lattner
63b3d7113d
There shalt be only one "immediate" operand type!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 17:21:20 +00:00
Chris Lattner
ceb408f6a2
Change "value" in MachineOperand to be a GlobalValue, as that is the only
...
thing that can be in it. Remove a dead method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28098 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 17:02:51 +00:00
Chris Lattner
e45aa737ba
Revert Nate's CR patch from last night, which caused many regressions (e.g. fhourstones).
...
Loading and storing off R0 isn't what we wanted. Also, taking some CR's out of
CRRC seems to cause failures as well. Further investigation is required.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28097 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 16:56:45 +00:00
Jeff Cohen
10efcfabf1
Make external globals public; other minor cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28096 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 16:20:22 +00:00
Jeff Cohen
a6e24d8caf
Make Intel syntax the default when LLVM is built with VC++.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28095 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 16:19:27 +00:00
Chris Lattner
4efeab208c
Remove a bunch more dead V9 specific stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28094 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 01:26:39 +00:00
Chris Lattner
ea50fabfd4
Remove a bunch more SparcV9 specific stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28093 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 01:15:02 +00:00
Chris Lattner
34fb2cad46
Remove some more V9-specific stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28092 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 00:49:59 +00:00
Chris Lattner
10f3597c4e
Remove some more unused stuff from MachineInstr that was leftover from V9.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28091 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 00:44:25 +00:00
Chris Lattner
0e57629a93
Simplify handling of relocations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28090 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 00:42:08 +00:00
Evan Cheng
9e062ed516
Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when
...
movlps cannot be used (e.g. when load from m64 has multiple uses).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28089 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 20:32:03 +00:00
Chris Lattner
5a032de387
Change from using MachineRelocation ctors to using static methods
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in MachineRelocation to create Relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28088 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 20:30:20 +00:00