Commit Graph

86333 Commits

Author SHA1 Message Date
Meador Inge
57cfd71f88 instcombine: Migrate strlen optimizations
This patch migrates the strlen optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167103 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 03:33:06 +00:00
Meador Inge
a0885fb882 instcombine: Migrate strncpy optimizations
This patch migrates the strncpy optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 03:33:00 +00:00
Nadav Rotem
5b2c4dc5f8 LoopVectorize: Do not vectorize loops with tiny constant trip counts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 03:31:07 +00:00
Bill Schmidt
42d43351b2 This patch addresses an ABI compatibility issue with empty aggregate
parameters.  Examples of these are:

  struct { } a;
  union { } b[256];
  int a[0];

An empty aggregate has an address, although dereferencing that address is
pointless.  When passed as a parameter, an empty aggregate does not consume
a protocol register, nor does it consume a doubleword in the parameter save
area.  Passing an empty aggregate by reference passes an address just as
for any other aggregate.  Returning an empty aggregate uses GPR3 as a hidden
address of the return value location, just as for any other aggregate.

The patch modifies PPCTargetLowering::LowerFormalArguments_64SVR4 and
PPCTargetLowering::LowerCall_64SVR4 to properly skip empty aggregate
parameters passed by value.  The handling of return values and by-reference
parameters was already correct.

Built on powerpc64-unknown-linux-gnu and tested with no new regressions.
A test case is included to test proper handling of empty aggregate
parameters on both sides of the function call protocol.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 01:15:05 +00:00
Akira Hatanaka
bab24216cc Change signature of function RAFast::spillAll to avoid conversion between
type MachineInstr* and MachineBasicBlock::iterator.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167088 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 00:56:01 +00:00
Rafael Espindola
52d053238a xlc supports __attribute__((aligned(x))), use it.
Patch by Kai.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167087 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 00:54:26 +00:00
Akira Hatanaka
dc6d846df5 Check that iterator I is not the end iterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 00:50:52 +00:00
Rafael Espindola
3a9b71434c Add extra declarations of hash_value needed to build llvm with xlc 12.1.
Patch by Kai!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167085 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 00:46:18 +00:00
Nadav Rotem
462d1ca428 Add support for loops that don't start with Zero.
This is important for loops in the LAPACK test-suite.
These loops start at 1 because they are auto-converted from fortran.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167084 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 00:45:26 +00:00
Meador Inge
e6d781fd3c instcombine: Migrate stpcpy optimizations
This patch migrates the stpcpy optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.  Note that the
__stpcpy_chk simplifications were migrated in a previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 00:20:56 +00:00
Meador Inge
fa9d1372c9 instcombine: Split out the __stpcpy_chk simplifications from StrCpyChkOpt
r166198 migrated the strcpy optimization to instcombine.  The strcpy
simplifier that was migrated from Transforms/Scalar/SimplifyLibCalls.cpp
was also doing some __strcpy_chk simplifications.  Those fortified
simplifications were migrated as well, but introduced a bug in the
__stpcpy_chk simplifier in the process.  This happened because the
__strcpy_chk and __stpcpy_chk simplifiers were both mapped to StrCpyChkOpt
which was updated with simplifications that worked for __strcpy_chk, but
not __stpcpy_chk.

This patch fixes the problem by adding proper test coverage and creating a
new simplifier for __stpcpy_chk (instead of sharing one with __strcpy_chk).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167082 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 00:20:51 +00:00
Manman Ren
dfd0b9b460 X86 SSE: update rsqrtss and rcpss to use two source operands and
the first source operand is tied to the destination operand.

This is to accurately model the corresponding instructions where the upper
bits are unmodified.

rdar://12558838
PR14221


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167064 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 23:53:59 +00:00
Eli Friedman
bbc6e671b1 Fix regression in old-style JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 22:21:55 +00:00
Manman Ren
4c74a956b2 X86 MMX: optimize transfer from mmx to i32
We used to generate a store (movq) + a load.
Now we use movd.

rdar://9946746


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167056 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 22:15:38 +00:00
Nadav Rotem
a368b89f28 Add documentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167055 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 22:06:26 +00:00
Eric Christopher
203e6f60a8 Reformat and 80-column this. It's not strictly conforming
yet, but it's better.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167053 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 21:36:43 +00:00
Chandler Carruth
70dace3052 Fix PR14212: For some strange reason I treated vectors differently from
integers in that the code to handle split alloca-wide integer loads or
stores doesn't come first. It should, for the same reasons as with
integers, and the PR attests to that. Also had to fix a busted assert in
that this test case also covers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167051 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 20:52:40 +00:00
Chad Rosier
daeec8fad3 [inline asm] Get the mayLoad/mayStore directly from the MIOp_ExtraInfo operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167050 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 20:39:19 +00:00
Hal Finkel
a9779bfbc9 BBVectorize: Cache fixed-order pairs instead of recomputing pointer info.
Instead of recomputing relative pointer information just prior to fusing,
cache this information (which also needs to be computed during the
candidate-pair selection process). This cuts down on the total number of
SE queries made, and also is a necessary intermediate step on the road toward
including shuffle costs in the pair selection procedure.

No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167049 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 20:17:37 +00:00
Akira Hatanaka
2f34d754d0 [mips] Allow tail-call optimization for vararg functions and functions which
use the caller's stack.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167048 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 20:16:31 +00:00
Chad Rosier
dfa4cecb1e Add a comment for r167040.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167046 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 20:01:12 +00:00
Benjamin Kramer
415f869cf3 LoopIdiom: Fix a serious missed optimization: we only turned top-level loops into memmove.
Thanks to Preston Briggs for catching this!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167045 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 19:49:39 +00:00
Hal Finkel
8a69a95f91 BBVectorize: Fix a small bug introduced in r167042.
We need to make sure that we take the correct load/store alignment
when the inputs are flipped.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167044 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 19:47:37 +00:00
Akira Hatanaka
b33b34a7dc Add code for saving formal argument information to MipsFunctionInfo. This
information will be used by IsEligibleForTailCallOptimization to determine
whether a call can be tail-call optimized.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 19:37:25 +00:00
Hal Finkel
202d1cb8a5 BBVectorize: Simplify how input swapping is handled.
Stop propagating the FlipMemInputs variable into the routines that
create the replacement instructions. Instead, just flip the arguments
of those routines. This allows for some associated cleanup (not all
of which is done here). No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167042 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 19:35:29 +00:00
Akira Hatanaka
7d71209912 Add definition of function MipsTargetLowering::passArgOnStack which emits nodes
for passing a function call argument on a stack.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167041 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 19:23:25 +00:00
Chad Rosier
3d71688476 [inline asm] Implement mayLoad and mayStore for inline assembly. In general,
the MachineInstr MayLoad/MayLoad flags are based on the tablegen implementation.
For inline assembly, however, we need to compute these based on the constraints.

Revert r166929 as this is no longer needed, but leave the test case in place. 
rdar://12033048 and PR13504

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167040 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 19:11:54 +00:00
Akira Hatanaka
e7b406d7ac Do not do tail-call optimization if target is mips16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167039 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 19:07:58 +00:00
Hal Finkel
93f6f45761 BBVectorize: Don't make calls to SE when the result is unused.
SE was being called during the instruction-fusion process (when the result
is unreliable, and thus ignored). No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167037 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 18:55:49 +00:00
Nadav Rotem
9210cc3a17 80-col
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167036 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 18:37:43 +00:00
Nadav Rotem
e709f5b600 LoopVectorize: Add support for write-only loops when the write destination is a single pointer.
Speedup SciMark by 1%



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167035 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 18:36:45 +00:00
Adhemerval Zanella
c83b5dc625 PowerPC: Expand FSRQT for vector types
This patch expands FSQRT for floating point vector types when altivec is
used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167034 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 18:29:42 +00:00
Nadav Rotem
cc03331caa LoopVectorize: Fix a bug in the initialization of reduction variables. AND needs to start at all-one
while XOR, and OR need to start at zero.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 18:12:36 +00:00
Ulrich Weigand
c197a55019 Set %defaultjit to use MCJIT for PowerPC targets.
Update Transforms/LICM/2003-12-11-SinkingToPHI.ll test to use
%defaultjit as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167031 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 18:07:58 +00:00
Bill Wendling
e0aae5b4f3 Fix grammar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167029 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 17:51:02 +00:00
Michael Liao
678c35c386 Enable ELF machine type to be specified explicitly in X86 backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167027 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 17:33:39 +00:00
Quentin Colombet
9a419f656e Change ForceSizeOpt attribute into MinSize attribute
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167020 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 16:32:52 +00:00
Duncan Sands
446cf94cdb Fix isEliminableCastPair to work correctly in the presence of pointers
with different sizes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167018 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 16:03:32 +00:00
Hans Wennborg
92b469971e switch_to_lookup_table.ll: Remove some unnecessary lines, comments,
function attributes, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167016 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 15:11:52 +00:00
Adhemerval Zanella
5f41fd685b PowerPC: More support for Altivec compare operations
This patch adds more support for vector type comparisons using altivec.
It adds correct support for v16i8, v8i16, v4i32, and v4f32 vector
types for comparison operators ==, !=, >, >=, <, and <=.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167015 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 13:50:19 +00:00
Duncan Sands
7adfe3fd60 Add a helper for telling whether a type is a pointer or vector of pointer type.
Simplify the implementation of the corresponding integer and float functions and
move them inline while there.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167014 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 13:38:54 +00:00
Ulrich Weigand
3467b9fd5d Enable some additional constant folding for PPCDoubleDouble.
This fixes Clang :: CodeGen/complex-builtints.c on PowerPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167013 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 12:33:18 +00:00
Hans Wennborg
04d7d13d30 Use TargetTransformInfo to control switch-to-lookup table transformation
When the switch-to-lookup tables transform landed in SimplifyCFG, it
was pointed out that this could be inappropriate for some targets.
Since there was no way at the time for the pass to know anything about
the target, an awkward reverse-transform was added in CodeGenPrepare
that turned lookup tables back into switches for some targets.

This patch uses the new TargetTransformInfo to determine if a
switch should be transformed, and removes
CodeGenPrepare::ConvertLoadToSwitch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167011 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 11:23:25 +00:00
Hal Finkel
c588e0e162 Remove an invalid assert in TargetTransformImpl
getCastInstrCost had an assert prohibiting scalar to vector casts. Such casts,
however, are allowed. This should make the vectorizer buildbot happier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166998 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 02:41:57 +00:00
Sid Manning
8ceffeb95c * Add e_flags enum for Hexagon
* Add Hexagon specific section indexes for small data
- Reviewed by Michael Spencer


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166997 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 02:26:15 +00:00
Jim Grosbach
8ba1474181 ARM: Better disassembly for pc-relative LDR.
When the operand is a plain immediate rather than a label, print it
as [pc, #imm] like we do for the Thumb2 wide encoding variant.

rdar://12154503

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166991 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 01:04:51 +00:00
Reed Kotler
c09856b535 Change mips16 delay slot jumps to non delay slot forms by default.
We will make them delay slot forms if there is something that can be
placed in the delay slot during a separate pass. Mips16 extended instructions
cannot be placed in delay slots.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166990 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 00:54:49 +00:00
Nadav Rotem
803ea1c40a LoopVectorizer: change debug prints: Print the module identifier when deciding to vectorize. When deciding not to vectorize do not print the called function name because it can be null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166989 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 00:40:39 +00:00
Jakub Staszak
a24262a0f5 Re-commit r166971. I reverted it to quickly, when buildbots didn't have a chance
to test it with chapni's fix (-mattr=+avx).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166985 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 00:01:57 +00:00
Kevin Enderby
445ba85b8d Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch target
is 24 bits not 20 and the decoding needed to correctly handle converting the
J1 and J2 bits to their I1 and I2 values to reconstruct the displacement. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166982 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29 23:27:20 +00:00