I have run so far when run before Legalize. It still needs to pick up the
SetCC folds, and nodes that use SetCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23243 91177308-0d34-0410-b5e6-96231b3b80d8
Define the PatFrag class which can be used to define subpatterns to match
things with. Define 'not', and use it to define the patterns for andc,
nand, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23233 91177308-0d34-0410-b5e6-96231b3b80d8
currently don't do anything. This elides patterns for binary operators
that ping on the carry flag, since we don't model it yet.
This patch also removes PPC::SUB, because it is dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23230 91177308-0d34-0410-b5e6-96231b3b80d8
i64 values on targets that need that expanded to 32-bit registers. This fixes
PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll and speeds up 189.lucas from
taking 122.72s to 81.96s on my desktop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23228 91177308-0d34-0410-b5e6-96231b3b80d8
from the binary ops map, even if they had multiple results. This latent bug
caused a few failures with the dag isel last night.
To prevent stuff like this from happening in the future, add some really
strict checking to make sure that the CSE maps always match up with reality!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23221 91177308-0d34-0410-b5e6-96231b3b80d8
in building maximal expressions before simplifying them. In particular, i
cases like this:
X-(A+B+X)
the code would consider A+B+X to be a maximal expression (not understanding
that the single use '-' would be turned into a + later), simplify it (a noop)
then later get simplified again.
Each of these simplify steps is where the cost of reassociation comes from,
so this patch should speed up the already fast pass a bit.
Thanks to Dan for noticing this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23214 91177308-0d34-0410-b5e6-96231b3b80d8
instead of ZERO_EXTEND to eliminate extraneous extensions. This eliminates
dead zero extensions on formal arguments and other cases on PPC, implementing
the newly tightened up test/Regression/CodeGen/PowerPC/small-arguments.ll test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23205 91177308-0d34-0410-b5e6-96231b3b80d8
over to DAGCombiner.cpp
1. Don't assume that SetCC returns i1 when folding (xor (setcc) constant)
2. Don't duplicate code in folding AND with AssertZext that is handled by
MaskedValueIsZero
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23196 91177308-0d34-0410-b5e6-96231b3b80d8
platforms. This reduces executable size and makes shark realize the actual
bounds of functions instead of showing each MBB as a function :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23193 91177308-0d34-0410-b5e6-96231b3b80d8
2. Propagate feature "string" to all targets.
3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23192 91177308-0d34-0410-b5e6-96231b3b80d8
is to manage processor specific attributes from the command line. See examples
of use in llc/lli and PowerPCTargetSubtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23191 91177308-0d34-0410-b5e6-96231b3b80d8
directly out of R1 (without using a CopyFromReg, which uses a chain), multiple
allocas were getting CSE'd together, producing bogus code. For this:
int %foo(bool %X, int %A, int %B) {
br bool %X, label %T, label %F
F:
%G = alloca int
%H = alloca int
store int %A, int* %G
store int %B, int* %H
%R = load int* %G
ret int %R
T:
ret int 0
}
We were generating:
_foo:
stwu r1, -16(r1)
stw r31, 4(r1)
or r31, r1, r1
stw r1, 12(r31)
cmpwi cr0, r3, 0
bne cr0, .LBB_foo_2 ; T
.LBB_foo_1: ; F
li r2, 16
subf r2, r2, r1 ;; One alloca
or r1, r2, r2
or r3, r1, r1
or r1, r2, r2
or r2, r1, r1
stw r4, 0(r3)
stw r5, 0(r2)
lwz r3, 0(r3)
lwz r1, 12(r31)
lwz r31, 4(r31)
lwz r1, 0(r1)
blr
.LBB_foo_2: ; T
li r3, 0
lwz r1, 12(r31)
lwz r31, 4(r31)
lwz r1, 0(r1)
blr
Now we generate:
_foo:
stwu r1, -16(r1)
stw r31, 4(r1)
or r31, r1, r1
stw r1, 12(r31)
cmpwi cr0, r3, 0
bne cr0, .LBB_foo_2 ; T
.LBB_foo_1: ; F
or r2, r1, r1
li r3, 16
subf r2, r3, r2 ;; Alloca 1
or r1, r2, r2
or r2, r1, r1
or r6, r1, r1
subf r3, r3, r6 ;; Alloca 2
or r1, r3, r3
or r3, r1, r1
stw r4, 0(r2)
stw r5, 0(r3)
lwz r3, 0(r2)
lwz r1, 12(r31)
lwz r31, 4(r31)
lwz r1, 0(r1)
blr
.LBB_foo_2: ; T
li r3, 0
lwz r1, 12(r31)
lwz r31, 4(r31)
lwz r1, 0(r1)
blr
This fixes Povray and SPASS with the dag isel, the last two failing cases.
Tommorow we will hopefully turn it on by default! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23190 91177308-0d34-0410-b5e6-96231b3b80d8
could cause a miscompile. Fixing this didn't fix the two programs that fail
though. :(
This also changes the implementation to follow the pattern selector more
closely, causing us to select 0 to li instead of lis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23189 91177308-0d34-0410-b5e6-96231b3b80d8
be mostly functional. It currently has all folds from SelectionDAG.cpp
that do not involve a condition code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23184 91177308-0d34-0410-b5e6-96231b3b80d8
