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14 Commits

Author SHA1 Message Date
Elena Demikhovsky
a1fa0de258 AVX-512: Added logical and arithmetic instructions for SKX 
by Asaf Badouh (asaf.badouh@intel.com)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235375 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-21 10:27:40 +00:00
Elena Demikhovsky
3209a40889 AVX-512: Added encoding tests for VPROR, VPROL instructions, 
fixed opcode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232018 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-12 07:28:41 +00:00
Elena Demikhovsky
13cc6f2b6e AVX-512: Added SKX forms of shift instructions. 
Added rotation instructions, encoding only.
Added encoding tests for all these forms.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231916 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-11 10:25:42 +00:00
Elena Demikhovsky
53fb369429 AVX-512: Add assembly parser support for Rounding mode 
By Asaf Badouh <asaf.badouh@intel.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230962 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-02 15:00:34 +00:00
Robert Khasanov
c50f9f15f5 [AVX512] Added VPBROADCAST{BWDQ} (Load with Broadcast Integer Data from General Purpose Register) encodings for AVX512-BW/VL subsets 
Added encoding tests.
        


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223787 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-12-09 16:38:41 +00:00
Robert Khasanov
7d18d46ef2 [AVX512] Added VBROADCAST{SS/SD} encoding for VL subset. 
Refactored through AVX512_maskable
        


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220908 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-10-30 14:21:47 +00:00
Robert Khasanov
63c2f3292e [AVX512] Implemented AVX512VL FP bnary packed instructions (VADDP*, VSUBP*, VMULP*, VDIVP*, VMAXP*, VMINP*) 
Refactored through AVX512_maskable
Added encoding tests for them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220858 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-10-29 15:43:02 +00:00
Robert Khasanov
9371efbcdb [AVX512] Extended avx512_sqrt_packed (sqrt instructions) to VL subset. 
Refactored through AVX512_maskable



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220806 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-10-28 18:15:20 +00:00
Robert Khasanov
59cb03d329 [AVX-512] Expanded rsqrt/rcp instructions to VL subset. 
Refactored multiclass through AVX512_maskable



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220783 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-10-28 16:37:13 +00:00
Robert Khasanov
340b5b9ad7 [AVX512] Extended avx512_binop_rm for AVX512VL subsets. 
Added avx512_binop_rm_vl multiclass for VL subset
Added encoding tests



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219390 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-10-09 08:38:48 +00:00
Robert Khasanov
e79a94a839 [SKX] Added new versions of cmp instructions in avx512_icmp_cc multiclass, added VL multiclass. 
Added encoding tests


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216532 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-08-27 09:34:37 +00:00
Robert Khasanov
cc4b123a47 [SKX] avx512_icmp_packed multiclass extension 
Extended avx512_icmp_packed multiclass by masking versions.
Added avx512_icmp_packed_rmb multiclass for embedded broadcast versions.
Added corresponding _vl multiclasses.
Added encoding tests for CPCMP{EQ|GT}* instructions.
Add more fields for X86VectorVTInfo.
Added AVX512VLVectorVTInfo that include X86VectorVTInfo for 512/256/128-bit versions

Differential Revision: http://reviews.llvm.org/D5024


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216383 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-08-25 14:49:34 +00:00
Robert Khasanov
232202439a [SKX] Extended non-temporal load/store instructions for AVX512VL subsets. 
Added avx512_movnt_vl multiclass for handling 256/128-bit forms of instruction.
Added encoding and lowering tests.

Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215536 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-08-13 10:46:00 +00:00
Robert Khasanov
7017934668 [SKX] Enabling load/store instructions: encoding 
Instructions: VMOVAPD, VMOVAPS, VMOVDQA8, VMOVDQA16, VMOVDQA32,VMOVDQA64, VMOVDQU8, VMOVDQU16, VMOVDQU32,VMOVDQU64, VMOVUPD, VMOVUPS,

Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214719 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-08-04 14:35:15 +00:00