Commit Graph

166 Commits

Author SHA1 Message Date
Anton Korobeynikov
699647cabc Use rip-rel addressing on win64 by default. For this we just
defaults to small pic code model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111741 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-21 17:21:11 +00:00
Bruno Cardoso Lopes
cdae7e8244 Add x86 CLMUL (Carry-less multiplication) cpu feature
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 01:17:51 +00:00
Eric Christopher
62f35a2c13 Have the X86 backend use Triple instead of a string and some enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107625 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-05 19:26:33 +00:00
Chris Lattner
6b601536ff fix a nasty bug where we were not treating available_externally
symbols as declarations in the X86 backend.  This would manifest
on darwin x86-32 as errors like this with -fvisibility=hidden:

symbol '__ZNSbIcED1Ev' can not be undefined in a subtraction expression

This fixes PR7353.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105954 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-14 20:11:56 +00:00
Dan Gohman
4d3d6e1a0c FastISel doesn't yet handle callee-pop functions.
To support this, move IsCalleePop from X86ISelLowering to X86Subtarget.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104866 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 18:43:40 +00:00
Evan Cheng
2bce5f4b56 Enable i16 to i32 promotion by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102493 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 08:30:49 +00:00
Evan Cheng
5528e7bcb1 isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101979 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 01:47:12 +00:00
Eric Christopher
6d1cd1cd04 Separate out the AES-NI instructions from the SSE4.2 instructions. Add
a new subtarget option for AES and check for the support.  Add "westmere"
line of processors and add AES-NI support to the core i7.

Add a couple of TODOs for information I couldn't verify.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100231 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 21:54:27 +00:00
Evan Cheng
48c58bb861 Nehalem unaligned memory access is fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100089 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-01 05:58:17 +00:00
Evan Cheng
bdc652bab8 Turning off post-ra scheduling for x86. It isn't a consistent win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98810 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 06:55:42 +00:00
Chris Lattner
1c436d0b0b no really, all 64-bit cpu's have cmov support. This should
fix the rest of the buildbot failures on non-x86 hosts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98522 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14 22:39:35 +00:00
Jeffrey Yasskin
f0356fe140 Kill ModuleProvider and ghost linkage by inverting the relationship between
Modules and ModuleProviders. Because the "ModuleProvider" simply materializes
GlobalValues now, and doesn't provide modules, it's renamed to
"GVMaterializer". Code that used to need a ModuleProvider to materialize
Functions can now materialize the Functions directly. Functions no longer use a
magic linkage to record that they're materializable; they simply ask the
GVMaterializer.

Because the C ABI must never change, we can't remove LLVMModuleProviderRef or
the functions that refer to it. Instead, because Module now exposes the same
functionality ModuleProvider used to, we store a Module* in any
LLVMModuleProviderRef and translate in the wrapper methods.  The bindings to
other languages still use the ModuleProvider concept.  It would probably be
worth some time to update them to follow the C++ more closely, but I don't
intend to do it.

Fixes http://llvm.org/PR5737 and http://llvm.org/PR5735.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94686 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-27 20:34:15 +00:00
David Greene
95eb2eeea6 Implement a feature (-vector-unaligned-mem) to allow targets to
ignore alignment requirements for SIMD memory operands.  This
is useful on architectures like the AMD 10h that do not trap on
unaligned references if a status bit is twiddled at startup time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93151 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 16:29:42 +00:00
David Greene
bd7b8458d1 Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92648 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:29:13 +00:00
Evan Cheng
b1f4981333 Remove target attribute break-sse-dep. Instead, do not fold load into sse partial update instructions unless optimizing for size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91910 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 17:47:23 +00:00
Evan Cheng
400073d546 On recent Intel u-arch's, folding loads into some unary SSE instructions can
be non-optimal. To be precise, we should avoid folding loads if the instructions
only update part of the destination register, and the non-updated part is not
needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks
the partial register dependency and it can improve performance. e.g.

movss (%rdi), %xmm0
cvtss2sd %xmm0, %xmm0

instead of
cvtss2sd (%rdi), %xmm0

An alternative method to break dependency is to clear the register first. e.g.
xorps %xmm0, %xmm0
cvtss2sd (%rdi), %xmm0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 07:40:29 +00:00
Dan Gohman
d84ea47b89 Don't enable the post-RA scheduler on x86 except at -O3. In its
current form, it is too expensive in compile time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 19:04:31 +00:00
Dan Gohman
29cbade25a Target-independent support for TargetFlags on BlockAddress operands,
and support for blockaddresses in x86-32 PIC mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:18:13 +00:00
Daniel Dunbar
067d024b05 Add llvm::sys::getHostCPUName, for detecting the LLVM name for the host CPU.
- This is an initial step towards -march=native support in Clang, and towards
   eliminating host dependencies in the targets. See PR5389.

 - Patch by Roman Divacky!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 10:09:12 +00:00
David Goodwin
87d21b92fc Allow target to specify regclass for which antideps will only be broken along the critical path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88682 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 19:52:48 +00:00
David Goodwin
c2e8a7e8d2 Fixed to address code review. No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 00:48:55 +00:00
Evan Cheng
79f7400e4f Remove X86Subtarget::IsLinux. It's no longer being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 20:23:21 +00:00
Evan Cheng
63476a8040 Reference to hidden symbols do not have to go through non-lazy pointer in non-pic mode. rdar://7187172.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80904 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-03 07:04:02 +00:00
Daniel Dunbar
848113833f Make these functions static and local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80892 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-03 05:47:34 +00:00
Evan Cheng
d0da6ff3ad X86JITInfo::getLazyResolverFunction() should not read cpu id to determine whether sse is available. Just use consult subtarget.
No functionality changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80880 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-03 04:37:05 +00:00
Chris Lattner
700841617a Add support for modeling whether or not the processor has support for
conditional moves as a subtarget feature.  This is the easy part of 
PR4841.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80763 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-02 05:53:04 +00:00
Anton Korobeynikov
6f9bb6f31b Short-term workaround for frame-related weirdness on win64.
Some other minor win64 fixes as well.

Patch by Michael Beck!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80370 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-28 16:06:41 +00:00
Chris Lattner
ce914b8f94 change the -x86-asm-syntax=intel/att flag to be in X86TAI
instead of X86 Subtarget.  This elimianates dependencies on
X86Subtarget from X86TAI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78746 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 23:01:09 +00:00
Daniel Dunbar
e22f4da01d Remove some dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78219 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 18:12:37 +00:00
Bill Wendling
0ea8bf3590 - s/DOUT/DEBUG(errs()/g
- Tidy up some headers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77929 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 00:11:34 +00:00
Daniel Dunbar
3be03406c9 Normalize Subtarget constructors to take a target triple string instead of
Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77918 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 22:11:08 +00:00
Daniel Dunbar
cfb8a1bea1 Fix some minor MSVC compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76356 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 01:38:38 +00:00
Evan Cheng
a82b22c667 GV with ghost linkage (module being lazily streamed in in JIT lazy compilation mode) do not require extra load from stub. This fixes ExecutionEngine/2005-12-02-TailCallBug.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76121 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 22:53:10 +00:00
Chris Lattner
c7822326df fix indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75277 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 21:01:59 +00:00
Chris Lattner
e2c920845a remove the now-dead TM argument to these methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75276 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 21:00:45 +00:00
Chris Lattner
8097b65c43 make PIC vs DynamicNoPIC be explicit in PICStyles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 20:58:47 +00:00
Chris Lattner
84853a17a3 some minor simplifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75274 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 20:53:38 +00:00
Chris Lattner
3b67e9ba01 add a couple of predicates to test for "stub style pic in PIC mode" and "stub style pic in dynamic-no-pic" mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 20:47:30 +00:00
Chris Lattner
0d786dd954 simplify fast isel by using ClassifyGlobalReference. This
elimiantes the last use of GVRequiresExtraLoad, so delete it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75244 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 07:48:51 +00:00
Chris Lattner
dfed413ef6 eliminate GVRequiresRegister, replacing it with predicates we
need for other purposes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75243 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 07:38:24 +00:00
Chris Lattner
d392bd97c8 move some classification logic around. Now GVRequiresExtraLoad
is just a trivial wrapper around "ClassifyGlobalReference", which
stole a ton of logic from LowerGlobalAddress.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75237 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 07:20:05 +00:00
Chris Lattner
ed0dca6a5d GVRequiresExtraLoad is now never used for calls, simplify it based on this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75232 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 05:52:02 +00:00
Chris Lattner
754b7650c2 actually, just eliminate PCRelGVRequiresExtraLoad. It makes the code
more complex and slow than just directly testing what we care about.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75231 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 05:48:03 +00:00
Chris Lattner
e6c07b52e7 There is only one case where GVRequiresExtraLoad returns true for calls:
split its handling out to PCRelGVRequiresExtraLoad, and simplify code
based on this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75230 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 05:45:15 +00:00
Chris Lattner
04b304caf6 the "isDirectCall" operand of GVRequiresRegister is always false, eliminate it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75229 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 05:37:11 +00:00
Chris Lattner
15a380a035 simplify some code based on the fact that picstyles != none are only valid
in pic or dynamic-no-pic mode. Also, x86-64 never used picstylegot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 04:39:06 +00:00
Chris Lattner
73b5b71369 Reduce indentation in GVRequiresExtraLoad. Return true for windows
with DLLImport symbols even when in -static mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75093 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 03:27:27 +00:00
David Greene
343dadbb36 Add feature flags for AVX and FMA and fix some SSE4A feature flag
initialization problems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74350 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 22:46:54 +00:00
Anton Korobeynikov
0eebf653a7 The attached patches implement most of the ARM AAPCS-VFP hard float
ABI. The missing piece is support for putting "homogeneous aggregates"
into registers.

Patch by Sandeep Patel!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73095 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-08 22:53:56 +00:00
Stefanus Du Toit
8cf5ab153d Update CPU capabilities for AMD machines
- added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and
barcelona with appropriate sse3/4a levels
- added FeatureSSE4A for amdfam10 processors
in X86Subtarget:
- added hasSSE4A
- updated AutoDetectSubtargetFeatures to detect SSE4A
- updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and
family 10h as amdfam10

New processor names match those used by gcc.

Patch by Paul Redmond!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72434 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-26 21:04:35 +00:00