Commit Graph

4401 Commits

Author SHA1 Message Date
Matt Arsenault
59d3ae6cdc Add addrspacecast instruction.
Patch by Michele Scandale!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194760 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-15 01:34:59 +00:00
Aaron Ballman
eb36024720 Replacing HUGE_VALF with llvm::huge_valf in order to work around a warning triggered in MSVC 12.
Patch reviewed by Reid Kleckner and Jim Grosbach.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194533 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-13 00:15:44 +00:00
Arnaud A. de Grandmaison
d736763847 CalcSpillWeights: allow overidding the spill weight normalizing function
This will enable the PBQP register allocator to provide its own normalizing function.

No functionnal change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194417 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 19:56:14 +00:00
Arnaud A. de Grandmaison
095f994ba6 CalcSpillWeights: give a better describing name to calculateSpillWeights
Besides, this relates it more obviously to the VirtRegAuxInfo::calculateSpillWeightAndHint.

No functionnal change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194404 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 19:04:45 +00:00
Arnaud A. de Grandmaison
a77da0579b CalculateSpillWeights does not need to be a pass
Based on discussions with Lang Hames and Jakob Stoklund Olesen at the hacker's lab, and in the light of upcoming work on the PBQP register allocator, it was though that CalcSpillWeights does not need to be a pass. This change will enable to customize / tune the spill weight computation depending on the allocator.

Update the documentation style while there.

No functionnal change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194356 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-10 17:46:31 +00:00
Chandler Carruth
49837ef811 Move the old pass manager infrastructure into a legacy namespace and
give the files a legacy prefix in the right directory. Use forwarding
headers in the old locations to paper over the name change for most
clients during the transitional period.

No functionality changed here! This is just clearing some space to
reduce renaming churn later on with a new system.

Even when the new stuff starts to go in, it is going to be hidden behind
a flag and off-by-default as it is still WIP and under development.

This patch is specifically designed so that very little out-of-tree code
has to change. I'm going to work as hard as I can to keep that the case.
Only direct forward declarations of the PassManager class are impacted
by this change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194324 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-09 12:26:54 +00:00
NAKAMURA Takumi
332cbf1d45 include/llvm/CodeGen/PBQP: Update @param(s) in comments. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194314 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-09 03:54:05 +00:00
NAKAMURA Takumi
91935b8d4c Fix whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194313 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-09 03:53:55 +00:00
Lang Hames
a91d7b170b Re-apply r194300 with fixes for warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194311 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-09 03:08:56 +00:00
Nick Lewycky
ceb0d9c085 Revert r194300 which broke the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194308 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-09 02:01:25 +00:00
Lang Hames
fc93ae629e Rewrite the PBQP graph data structure.
The new graph structure replaces the node and edge linked lists with vectors.
Free lists (well, free vectors) are used for fast insertion/deletion.

The ultimate aim is to make PBQP graphs cheap to clone. The motivation is that
the PBQP solver destructively consumes input graphs while computing a solution,
forcing the graph to be fully reconstructed for each round of PBQP. This
imposes a high cost on large functions, which often require several rounds of
solving/spilling to find a final register allocation. If we can cheaply clone
the PBQP graph and incrementally update it between rounds then hopefully we can
reduce this cost. Further, once we begin pooling matrix/vector values (future
work), we can cache some PBQP solver metadata and share it between cloned
graphs, allowing the PBQP solver to re-use some of the computation done in
earlier rounds.

For now this is just a data structure update. The allocator and solver still
use the graph the same way as before, fully reconstructing it between each
round. I expect no material change from this update, although it may change
the iteration order of the nodes, causing ties in the solver to break in
different directions, and this could perturb the generated allocations
(hopefully in a completely benign way).

Thanks very much to Arnaud Allard de Grandmaison for encouraging me to get back
to work on this, and for a lot of discussion and many useful PBQP test cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194300 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-09 00:14:07 +00:00
Juergen Ributzka
623d2e618f [Stackmap] Add AnyReg calling convention support for patchpoint intrinsic.
The idea of the AnyReg Calling Convention is to provide the call arguments in
registers, but not to force them to be placed in a paticular order into a
specified set of registers. Instead it is up tp the register allocator to assign
any register as it sees fit. The same applies to the return value (if
applicable).

Differential Revision: http://llvm-reviews.chandlerc.com/D2009

Reviewed by Andy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194293 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-08 23:28:16 +00:00
Arnaud A. de Grandmaison
d241fa7a61 Revert "CalculateSpillWeights does not need to be a pass"
Temporarily revert my previous commit until I understand why it breaks 3 target tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194272 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-08 18:19:19 +00:00
Arnaud A. de Grandmaison
663fcde3d3 CalculateSpillWeights does not need to be a pass
Based on discussions with Lang Hames and Jakob Stoklund Olesen at the hacker's lab, and in the light of upcoming work on the PBQP register allocator, it was though that CalcSpillWeights does not need to be a pass. This change will enable to customize / tune the spill weight computation depending on the allocator.

Update the documentation style while there.

No functionnal change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194269 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-08 17:56:29 +00:00
Andrew Trick
3d74dea4bd Add support for stack map generation in the X86 backend.
Originally implemented by Lang Hames.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193811 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-31 22:11:56 +00:00
Rafael Espindola
2cc546db18 Produce .weak_def_can_be_hidden for some linkonce_odr values
With this patch llvm produces a weak_def_can_be_hidden for linkonce_odr
if they are also unnamed_addr or don't have their address taken.

There is not a lot of documentation about .weak_def_can_be_hidden, but
from the old discussion about linkonce_odr_auto_hide and the name of
the directive this looks correct: these symbols can be hidden.

Testing this with the ld64 in Xcode 5 linking clang reduces the number of
exported symbols from 21053 to 19049.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193718 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-30 22:08:11 +00:00
Josh Magee
62406fdc6f Reformat code with clang-format.
Differential Revision: http://llvm-reviews.chandlerc.com/D2057


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193672 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-30 02:25:14 +00:00
NAKAMURA Takumi
9794186889 StackProtector.h: Fix trailing comments for doxygen. [-Wdocumentation]
s!//<!///<!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193669 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-30 00:49:39 +00:00
NAKAMURA Takumi
ec4b5398c9 Trailing whitespace in a comment line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193668 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-30 00:49:33 +00:00
Josh Magee
4598b40ce6 [stackprotector] Update the StackProtector pass to perform datalayout analysis.
This modifies the pass to classify every SSP-triggering AllocaInst according to
an SSPLayoutKind (LargeArray, SmallArray, AddrOf).  This analysis is collected
by the pass and made available for use, but no other pass uses it yet.

The next patch will make use of this analysis in PEI and StackSlot
passes.  The end goal is to support ssp-strong stack layout rules.

WIP.

Differential Revision: http://llvm-reviews.chandlerc.com/D1789


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193653 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-29 21:16:16 +00:00
Rafael Espindola
ffc7dca885 Add a helper getSymbol to AsmPrinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193627 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-29 17:07:16 +00:00
Richard Sandiford
66589dcc8f Keep TBAA info when rewriting SelectionDAG loads and stores
Most SelectionDAG code drops the TBAA info when creating a new form of a
load and store (e.g. during legalization, or when converting a plain
load to an extending one).  This patch tries to catch all cases where
the TBAA information can legitimately be carried over.

The patch adds alternative forms of getLoad() and getExtLoad() that take
a MachineMemOperand instead of individual fields.  (The corresponding
getTruncStore() already exists.)  The idea is to use the MachineMemOperand
forms when all fields are carried over (size, pointer info, isVolatile,
isNonTemporal, alignment and TBAA info).  If some adjustment is being
made, e.g. to narrow the load, then we still pass the individual fields
but also pass the TBAA info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193517 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-28 11:17:59 +00:00
Tim Northover
5a42ae81f7 LegalizeDAG: allow libcalls for max/min atomic operations
ARM processors without ldrex/strex need to be able to make libcalls for all
atomic operations, including the newer min/max versions.

The alternative would probably be expanding these operations in terms of
cmpxchg (as x86 does always), but in the configurations where this matters
code-size tends to be paramount so the libcall is more desirable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193398 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-25 09:30:20 +00:00
Eric Christopher
2ea3b53928 Formatting and whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193370 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-24 21:04:51 +00:00
Benjamin Kramer
135fe6ac5f Speling fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193165 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-22 15:18:03 +00:00
Wan Xiaofei
8c955ea858 Using FoldingSet in SelectionDAG::getVTList.
VTList has a long life cycle through the module and getVTList is frequently called. In current getVTList, sequential search over a std::vector is used, this is inefficient in big module.
This patch use FoldingSet to implement hashing mechanism when searching.

Reviewer: Nadav Rotem
Test    : Pass unit tests & LNT test suite

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193150 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-22 08:02:02 +00:00
David Majnemer
641bea117d CodeGen: Emit a libcall if the target doesn't support 16-byte wide atomics
There are targets that support i128 sized scalars but cannot emit
instructions that modify them directly.  The proper thing to do is to
emit a libcall.

This fixes PR17481.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192957 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-18 08:03:43 +00:00
Rafael Espindola
3aa342be50 Add support for metadata representing .ident directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192764 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-16 01:49:05 +00:00
Chandler Carruth
cc3d76d982 Simplify formatting and sort these. No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192668 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-15 02:03:44 +00:00
Andrew Trick
966772931e LiveRegUnits: Use *MBB for consistency and convenience.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192634 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-14 22:18:59 +00:00
Andrew Trick
7c489ab365 Use a SparseSet in LiveRegUnits.
Some clients may add block live ins and may track liveness over a
large scope. This guarantees an efficient implementation in all cases
with no memory allocation/deallocation, independent of the number of
target registers. It could be slightly less convenient but is fine in
the expected case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192622 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-14 20:45:17 +00:00
Andrew Trick
eb3b9f8ed9 Move LiveRegUnits implementation into .cpp. Comment and format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192621 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-14 20:45:14 +00:00
Andrew Trick
a3e69a0467 Remove extra indentation in LiveRegUnits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192620 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-14 20:45:11 +00:00
Andrew Trick
5601abb60d Convert LiveRegUnits methods to the current convention (it's new code).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192619 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-14 20:45:09 +00:00
Rafael Espindola
67b28826cd Remove the now unused strong phi elimination pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192604 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-14 16:39:04 +00:00
Matthias Braun
da74817c50 Introduce ad hoc liveness tracking utility: LiveRegUnits
Contains a set of live register (units) and code to move forward and
backward in the schedule while updating the live set.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192481 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-11 19:04:35 +00:00
Justin Holewinski
43777c3150 Make AsmPrinter::emitImplicitDef a virtual method so targets can emit custom comments for implicit defs
For NVPTX, this fixes a crash where the emitImplicitDef implementation was expecting physical registers,
while NVPTX uses virtual registers (with a couple of exceptions).  Now, the implicit def comment will be
emitted as a true PTX register name. Other targets can use this to customize the output of implicit def
comments.

Fixes PR17519

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192444 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-11 12:39:36 +00:00
Matthias Braun
03d9609c61 Print register in LiveInterval::print()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192398 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 21:29:05 +00:00
Matthias Braun
4f3b5e8c92 Represent RegUnit liveness with LiveRange instance
Previously LiveInterval has been used, but having a spill weight and
register number is unnecessary for a register unit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192397 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 21:29:02 +00:00
Matthias Braun
e25dde550b Work on LiveRange instead of LiveInterval where possible
Also change some pointer arguments to references at some places where
0-pointers are not allowed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192396 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 21:28:57 +00:00
Matthias Braun
5649e25ce8 Pass LiveQueryResult by value
This makes the API a bit more natural to use and makes it easier to make
LiveRanges implementation details private.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192394 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 21:28:52 +00:00
Matthias Braun
87a86058fa Refactor LiveInterval: introduce new LiveRange class
LiveRange just manages a list of segments and a list of value numbers
now as LiveInterval did previously, but without having details like spill
weight or a fixed register number.
LiveInterval is now a subclass of LiveRange and simply adds the spill weight
and the register number.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192393 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 21:28:47 +00:00
Matthias Braun
331de11a0a Rename LiveRange to LiveInterval::Segment
The Segment struct contains a single interval; multiple instances of this struct
are used to construct a live range, but the struct is not a live range by
itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 21:28:43 +00:00
Matthias Braun
4afb5f560d Rename parameter: defined regs are not incoming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 21:28:38 +00:00
Hao Liu
6a5a667517 Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192361 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 17:00:52 +00:00
Rafael Espindola
812ddcc50f Revert "Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). Including following 14 instructions: 4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4)."
This reverts commit r192352. It broke the build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192354 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 15:15:17 +00:00
Hao Liu
d622bef31d Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192352 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 15:01:24 +00:00
Reid Kleckner
73f615b0bd Explicitly request unsigned enum types when desired
This fixes repeated -Wmicrosoft warnings when self-hosting clang on
Windows, and gets us real unsigned enum types with MSVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192227 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 20:15:11 +00:00
Jiangning Liu
beb6afa843 Implement aarch64 neon instruction set AdvSIMD (Across).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192028 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 08:22:10 +00:00
Craig Topper
936910d929 Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192026 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 05:38:16 +00:00