Evan Cheng
071a279e94
Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 19:55:27 +00:00
Evan Cheng
67c906dce7
Fix for PR1613: added 64-bit rotate left PPC instructions and patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41711 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-04 20:20:29 +00:00
Evan Cheng
caf778ab3b
Some out operands were incorrectly specified as input operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40697 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01 23:07:38 +00:00
Evan Cheng
ffbaccae02
No more noResults.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40132 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-21 00:34:19 +00:00
Evan Cheng
d5f181a665
Oops. These stores actually produce results.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40074 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-20 00:20:46 +00:00
Evan Cheng
64d80e3387
Change instruction description to split OperandList into OutOperandList and
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InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-19 01:14:50 +00:00
Chris Lattner
ccde4cb8ab
add support for 128-bit add/sub on ppc64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37158 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 06:52:46 +00:00
Nicolas Geoffray
ec58d9f9dd
The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules
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as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/ ).
Change all ELF tests to ELF32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35624 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 12:35:28 +00:00
Nicolas Geoffray
ef3c030e0e
The ELF ABI specifies F1-F8 registers as argument registers for double, not
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F1-F10. This affects only ELF, not MachO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35622 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 10:27:07 +00:00
Chris Lattner
b6ead97b7e
Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35329 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 04:44:03 +00:00
Nicolas Geoffray
63f8fb1993
Differentiate between the MachO and the ELF ABI the CALL instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34667 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27 13:01:19 +00:00
Chris Lattner
1fa3d9ef93
one important bugfix: PPC32 didn't have both elf and macho support for
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external symbols and global addresses. Add the missing ones.
one important workaround: PPCISD::CALL is matched by both PPCcall_ELF
and PPCcall_Macho, disable the _ELF patterns for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34601 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 19:20:53 +00:00
Chris Lattner
9f0bc659c8
implement support for the linux/ppc function call ABI. Patch by
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Nicolas Geoffray!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34574 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 05:34:32 +00:00
Jim Laskey
ba74cdf7f6
Patterns no longer needed due to fix in the DAG combiner.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32612 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-15 21:39:31 +00:00
Jim Laskey
352235515f
Not all test cases are created equal. This fix is needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32605 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-15 18:51:01 +00:00
Jim Laskey
182a5acdeb
Not needed. Misinterpreted error message from other bug (Missing load/store
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relocations.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32604 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-15 18:45:32 +00:00
Jim Laskey
c4a81dc935
Provide 64-bit support for i64 sextload<i8>.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32600 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-15 14:34:11 +00:00
Jim Laskey
78f97f3118
Reduce number of instructions to load 64-bit constants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32481 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-12 13:23:43 +00:00
Chris Lattner
94c96cc519
implement sextinreg i8->i64 and i16->i64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32293 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-06 21:46:13 +00:00
Jim Laskey
2f616bff7e
This is a general clean up of the PowerPC ABI. Address several problems and
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bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31792 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 22:43:37 +00:00
Chris Lattner
1b0a2d8370
fix a regression that I introduced. stdu should scale the offset by 4
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before printing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31791 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 21:45:30 +00:00
Chris Lattner
80df01d2cf
add ppc64 r+i stores with update.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31776 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 00:57:19 +00:00
Chris Lattner
8e28b5c426
Stop using isTwoAddress, switching to operand constraints instead.
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Tell the codegen emitter that specific operands are not to be encoded, fixing
JIT regressions w.r.t. pre-inc loads and stores (e.g. lwzu, which we generate
even when general preinc loads are not enabled).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31770 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 23:24:18 +00:00
Chris Lattner
0851b4f3ed
fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri
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addrmodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31757 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 19:55:13 +00:00
Chris Lattner
5e14b821cd
Fix the PPC regressions last night
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31752 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 17:40:51 +00:00
Chris Lattner
6a5339ba65
Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls
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clobber. This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity. This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31734 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 18:44:47 +00:00
Chris Lattner
a94a203f34
implement proper PPC64 prolog/epilog codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31684 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 19:05:28 +00:00
Chris Lattner
d181c0120c
Mark operands as symbol lo instead of imm32 so that they print lo(x) around
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globals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31672 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 04:51:36 +00:00
Chris Lattner
94e509caea
implement preinc support for r+i loads on ppc64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31654 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 23:58:45 +00:00
Evan Cheng
8b2794aeff
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 21:14:26 +00:00
Evan Cheng
466685d41a
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 20:57:25 +00:00
Chris Lattner
7c395ad06f
Shift amounts are always 32-bits, even in 64-bit mode. This fixes
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CodeGen/PowerPC/2006-09-28-shift_64.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30652 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-28 20:48:45 +00:00
Chris Lattner
303c695529
Make the implicit def instructions look like other instrs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 16:33:26 +00:00
Chris Lattner
518f9c7ad0
Add missing PPC64 extload/truncstores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29140 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14 04:42:02 +00:00
Chris Lattner
cccef1c6ff
Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28944 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 21:08:52 +00:00
Chris Lattner
e4172be920
Add a pattern for i64 sra. Print 8-byte units with a space between the .quad
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and the data
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28934 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 20:07:26 +00:00
Chris Lattner
2e6b77d803
Add 64-bit MTCTR so that indirect calls work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28931 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:36:44 +00:00
Chris Lattner
1fd81107f3
Fix an incorrect store pattern. This fixes em3d.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28930 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:22:50 +00:00
Chris Lattner
563ecfbf82
Implement 64-bit undef, sub, shl/shr, srem/urem
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28929 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:18:41 +00:00
Chris Lattner
00659b1781
Add zextload from i32 -> i64, with this, perimeter works.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28926 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 17:30:08 +00:00
Chris Lattner
041e9d345f
Rearrange compares, add ADDI8, add sext from 32-to-64 bit register
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28920 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26 23:53:10 +00:00
Chris Lattner
b410dc9977
Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28889 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:18:58 +00:00
Chris Lattner
f2c5bca165
add some logical ops
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28887 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:11:59 +00:00
Chris Lattner
3ae5eef027
Add some more immediate patterns. This allows us to compile:
...
void test6() {
Y = 0xABCD0123BCDE4567;
}
into:
_test6:
lis r2, -21555
lis r3, ha16(_Y)
ori r2, r2, 291
rldicr r2, r2, 32, 31
oris r2, r2, 48350
ori r2, r2, 17767
std r2, lo16(_Y)(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28885 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:03:01 +00:00
Chris Lattner
eded521a17
Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is
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set, so disable the pattern in that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28884 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 22:38:59 +00:00
Chris Lattner
0ea70b219a
Add some 64-bit logical ops.
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Split imm16Shifted into a sext/zext form for 64-bit support.
Add some patterns for immediate formation. For example, we now compile this:
static unsigned long long Y;
void test3() {
Y = 0xF0F00F00;
}
into:
_test3:
li r2, 3840
lis r3, ha16(_Y)
xoris r2, r2, 61680
std r2, lo16(_Y)(r3)
blr
GCC produces:
_test3:
li r0,0
lis r2,ha16(_Y)
ori r0,r0,61680
sldi r0,r0,16
ori r0,r0,3840
std r0,lo16(_Y)(r2)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28883 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 22:34:10 +00:00
Chris Lattner
f27bb6de10
Add some patterns for globals, so we can now compile this:
...
static unsigned long long X, Y;
void test1() {
X = Y;
}
into:
_test1:
lis r2, ha16(_Y)
lis r3, ha16(_X)
ld r2, lo16(_Y)(r2)
std r2, lo16(_X)(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28879 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 21:23:06 +00:00
Chris Lattner
047854f2b7
Add some patterns for ppc64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28866 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:38:36 +00:00
Chris Lattner
a24b7618f8
Upgrade some load/store instructions to use the proper addressing mode stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28841 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:29:41 +00:00
Chris Lattner
059ca0f5b7
fix some assumptions that pointers can only be 32-bits. With this, we can
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now compile:
static unsigned long X;
void test1() {
X = 0;
}
into:
_test1:
lis r2, ha16(_X)
li r3, 0
stw r3, lo16(_X)(r2)
blr
Totally amazing :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28839 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:01:35 +00:00