Commit Graph

70990 Commits

Author SHA1 Message Date
Cameron Zwarich
661a390b83 Check for TLI so that -codegenprepare can be used from opt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24 04:51:51 +00:00
Johnny Chen
e4000595fb CPS3p: Let's reject impossible imod values by returning false from the DisassembleMiscFrm() function.
Fixed rdar://problem/9179416 ARM disassembler crash: "Unknown imod operand" (fuzz testing)

Opcode=98 Name=CPS3p Format=ARM_FORMAT_MISCFRM(26)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 1: 0| 0: 0: 0: 1| 1: 1: 0: 0| 1: 0: 0: 1| 0: 0: 1: 1|
-------------------------------------------------------------------------------------------------

Before:
	cpsUnknown imod operand
UNREACHABLE executed at /Volumes/data/lldb/llvm/lib/Target/ARM/InstPrinter/../ARMBaseInfo.h:123!

After:
/Volumes/data/Radar/9179416/mc-input-arm.txt:1:1: warning: invalid instruction encoding
0x93 0x1c 0x2 0xf1
^


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128192 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24 02:24:36 +00:00
Johnny Chen
3d793962be Load/Store Multiple:
These instructions were changed to not embed the addressing mode within the MC instructions
We also need to update the corresponding assert stmt.  Also add two test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128191 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24 01:40:42 +00:00
Johnny Chen
571f290376 STRT and STRBT was incorrectly tagged as IndexModeNone during the refactorings (r119821).
We now tag them as IndexModePost.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24 01:07:26 +00:00
Johnny Chen
2abc9d2444 The r128103 fix to cope with the removal of addressing modes from the MC instructions
were incomplete.  The assert stmt needs to be updated and the operand index incrment is wrong.
Fix the bad logic and add some sanity checking to detect bad instruction encoding;
and add a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128186 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24 00:28:38 +00:00
Jim Grosbach
5ffe37f2c7 Runtime dylib simple ARM 24-bit branch relocation support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128184 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 23:35:17 +00:00
Devang Patel
36dca60f5c Enable GlobalMerge on darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128183 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 23:34:19 +00:00
Jim Grosbach
b9b1e307f2 Fix comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128182 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 23:32:48 +00:00
Andrew Trick
f6c39412dd Revert r128175.
I'm backing this out for the second time. It was supposed to be fixed by r128164, but the mingw self-host must be defeating the fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128181 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 23:11:02 +00:00
Evan Cheng
2c33915628 Cmp peephole optimization isn't always safe for signed arithmetics.
int tries = INT_MAX;    
while (tries > 0) {
      tries--;
}

The check should be:
        subs    r4, #1
        cmp     r4, #0
        bgt     LBB0_1

The subs can set the overflow V bit when r4 is INT_MAX+1 (which loop
canonicalization apparently does in this case). cmp #0 would have cleared
it while not changing the N and Z bits. Since BGT is dependent on the V
bit, i.e. (N == V) && !Z, it is not safe to eliminate the cmp #0.

rdar://9172742


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 22:52:04 +00:00
Eli Friedman
b141099c14 PR9535: add support for splitting and scalarizing vector ISD::FP_ROUND.
Also cleaning up some duplicated code while I'm here.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 22:18:48 +00:00
Andrew Trick
d8fa01fbd7 Reapply Eli's r127852 now that the pre-RA scheduler can spill EFLAGS.
(target-specific branchless method for double-width relational comparisons on x86)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 22:16:02 +00:00
Jim Grosbach
a8287e322f Split out relocation resolution into target-specific bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128173 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 22:06:06 +00:00
Owen Anderson
741ad15e26 The high bit of a Thumb2 ADR's offset is stored in bit 26, not bit 25.
This fixes 464.h264ref with the integrated assembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 22:03:44 +00:00
Jim Grosbach
66978bd81c Fix double-free of Module.
The ExecutionEngine constructor already added the module, so there's no
need to call addModule() directly. Doing so causes a double-free of the
Module at program termination.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128171 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 21:35:02 +00:00
Owen Anderson
7614783f2d Fix a bug introduced by my patch yesterday: BL is a 4-byte instructions like BLX, rather than a 2-byte instruction like B.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128169 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 21:19:56 +00:00
Andrew Trick
bd47a4a307 Ensure that def-side physreg copies are scheduled above any other uses
so the scheduler can't create new interferences on the copies
themselves. Prior to this fix the scheduler could get stuck in a loop
creating copies.
Fixes PR9509.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128164 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 20:42:39 +00:00
Andrew Trick
0d93a110e3 whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 20:40:18 +00:00
Jim Grosbach
8b54dca41c Start of relocation resolution for the runtime dyld library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128161 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 19:52:00 +00:00
Jim Grosbach
8086f3b494 Make sure to report any errors from the runtime dyld.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128160 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 19:51:34 +00:00
Jakob Stoklund Olesen
01079311e1 Don't coalesce identical DBG_VALUE instructions prematurely.
Each of these instructions may have a RegsClobberInsn entry that can't be
ignored. Consecutive ranges are coalesced later when DwarfDebug::emitDebugLoc
merges entries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 18:37:30 +00:00
Oscar Fuentes
db3480c432 Supports building with a list of targets that does not contain
X86. Fixes PR9533.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128154 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 17:42:13 +00:00
Justin Holewinski
d662576671 PTX: Improve support for 64-bit addressing
- Fix bug in ADDRrr/ADDRri/ADDRii selection for 64-bit addresses
- Add comparison selection for i64
- Add zext selection for i32 -> i64
- Add shl/shr/sha support for i64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128153 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 16:58:51 +00:00
Anders Carlsson
fa4ebd396d Revert r128140 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128149 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 15:51:12 +00:00
Cameron Zwarich
1537ce75ed Fix PR9464 by correcting some math that just happened to be right in most cases
that were hit in practice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128146 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 05:25:55 +00:00
Jakob Stoklund Olesen
1e6c65dba7 Notify the delegate before removing dead values from a live interval.
The register allocator needs to know when the range shrinks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128145 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 04:43:16 +00:00
Jakob Stoklund Olesen
0b5015188e Allow the allocation of empty live ranges that have uses.
Empty ranges may represent undef values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128144 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 04:32:51 +00:00
Jakob Stoklund Olesen
bf824efcb9 Dump the register map before rewriting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128143 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 04:32:49 +00:00
Anders Carlsson
90af342061 A global variable with internal linkage where all uses are in one function and whose address is never taken is a non-escaping local object and can't alias anything else.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128140 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 02:19:48 +00:00
Andrew Trick
a2f45291e1 Added block number and name to isel debug output.
I'm tired of doing this manually for each checkout.
If anyone knows a better way debug isel for non-trivial tests feel
free to revert and let me know how to do it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128132 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 01:38:28 +00:00
Douglas Gregor
095a3f3d30 Update the Clang attribute emitter to handle attributes of 'version'
kind, and fix serialization/deserialization of IdentifierInfo
attributes. These are requires for the new 'availability' attribute.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128130 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 01:05:46 +00:00
Johnny Chen
c59c87c322 For ARM Disassembler, start a newline to dump the opcode and friends for an instruction.
Change inspired by llvm-bug 9530 submitted by Jyun-Yan You.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128122 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 23:49:46 +00:00
Johnny Chen
8d668a8605 Add disassembly test cases for:
A8.6.292 VCMPE


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128120 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 23:08:56 +00:00
Devang Patel
f99e778603 Remove the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128119 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 23:07:03 +00:00
Owen Anderson
f862b35b0b RIT_ARM_ThumbBranch32Bit relocations are not used and should never be generated.
This fixes kimwitu++, bullet, and tramp3dv4 with the ARM integrated assembler.
Fixes <rdar://problem/9165738>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128117 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 22:52:54 +00:00
Jakob Stoklund Olesen
28cf1156c9 Reapply r128045 and r128051 with fixes.
This will extend the ranges of debug info variables in registers until they are
clobbered.

Fix 1: Don't mistake DBG_VALUE instructions referring to incoming arguments on
the stack with DBG_VALUE instructions referring to variables in the frame
pointer. This fixes the gdb test-suite failure.

Fix 2: Don't trace through copies to physical registers setting up call
arguments. These registers are call clobbered, and the source register is more
likely to be a callee-saved register that can be extended through the call
instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128114 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 22:33:08 +00:00
Johnny Chen
27c6baeca2 LDRT and LDRBT was incorrectly tagged as IndexModeNone during the refactorings (r119821).
We now tag them as IndexModePost.

This fixed http://llvm.org/bugs/show_bug.cgi?id=9530.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 22:28:49 +00:00
Devang Patel
bdf2c360de Try to appease buildbot gods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128112 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 22:13:17 +00:00
Rafael Espindola
6421a8815e Add a lto_codegen_compile_to_file to avoid producing a file, reading it to
memory and writing it back to disk.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 20:57:13 +00:00
Eli Friedman
97ab5803df A bit more analysis of a memset-related README entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 20:49:53 +00:00
Johnny Chen
83cf2ffdcd Add one more test case for VFP Load/Store Multiple (vpop).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 20:21:08 +00:00
Johnny Chen
758df29741 A8.6.399 VSTM:
VFP Load/Store Multiple Instructions used to embed the IA/DB addressing mode within the
MC instruction; that has been changed so that now, for example, VSTMDDB_UPD and VSTMDIA_UPD
are two instructions.  Update the ARMDisassemblerCore.cpp's DisassembleVFPLdStMulFrm()
to reflect the change.

Also add a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128103 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 20:00:10 +00:00
Eric Christopher
7244d7cbce Migrate the fix in r128041 to ARM's fastisel support as well.
Fixes rdar://9169640 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 19:39:17 +00:00
Rafael Espindola
11d1803770 We don't need a null terminator for the output file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 19:20:47 +00:00
Andrew Trick
c1dbd5d9c3 Revert r128045 and r128051, debug info enhancements.
Temporarily reverting these to see if we can get llvm-objdump to link. Hopefully this is not the problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 19:18:42 +00:00
Jim Grosbach
91dde155f1 Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 18:22:27 +00:00
Jim Grosbach
5010ed0367 Add missing file from previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 18:21:14 +00:00
Jim Grosbach
b3eecaf19e Propogate the error message, not just the error state.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128094 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 18:19:42 +00:00
Jim Grosbach
34714a0609 Add simple arg passing to MC-JIT and support for exit() call.
Support argument passing simple, common, prototypes directly. More
complicated scenarios will require building up a stub function, which the
MC-JIT isn't set up to handle yet.

Add Intercept.cpp, which is just a copy from ExecutionEngine/JIT for now,
to handle looking looking up external symbol names. This probably more
properly belongs as part of RuntimeDyld. It'll migrate there as things
flesh out more fully.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128090 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 18:05:27 +00:00
Jim Grosbach
8bf0ecdbf6 Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128086 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 15:21:58 +00:00