Commit Graph

75995 Commits

Author SHA1 Message Date
Craig Topper
6660dcedd3 [X86] Remove some unused multiclasses from AVX512 instruction file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226797 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 08:53:08 +00:00
Sanjoy Das
49afc9109e Fix crashes in IRCE caused by mismatched types
There are places where the inductive range check elimination pass
depends on two llvm::Values or llvm::SCEVs to be of the same
llvm::Type when they do not need to be. This patch relaxes those
restrictions (by bailing out of the optimization if the types
mismatch), and adds test cases to trigger those paths.

These issues were found by bootstrapping clang with IRCE running in
the -O3 pass ordering.

Differential Revision: http://reviews.llvm.org/D7082



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226793 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 08:29:18 +00:00
Erik Eckstein
5b657c48d8 SLPVectorizer: add a second limit for the number of alias checks.
Even with the current limit on the number of alias checks, the containing loop has quadratic complexity.
This begins to hurt for blocks containing > 1K load/store instructions.
This commit introduces a limit for the loop count. It reduces the runtime for such very large blocks.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226792 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 08:20:51 +00:00
Elena Demikhovsky
05e7ae1a7b Fixed a bug in masked load/store in reversed loop.
Added a test.

The bug was submitted to bugzilla:
http://llvm.org/bugs/show_bug.cgi?id=22225



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226791 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 08:20:06 +00:00
Chandler Carruth
884f263eab [PM] Rename InstCombine.h to InstCombineInternal.h in preparation for
creating a non-internal header file for the InstCombine pass.

I thought about calling this InstCombiner.h or in some way more clearly
associating it with the InstCombiner clas that it is primarily defining,
but there are several other utility interfaces defined within this for
InstCombine. If, in the course of refactoring, those end up moving
elsewhere or going away, it might make more sense to make this the
combiner's header alone.

Naturally, this is a bikeshed to a certain degree, so feel free to lobby
for a different shade of paint if this name just doesn't suit you.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226783 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 05:25:13 +00:00
Chandler Carruth
b778cbc0c8 [canonicalize] Teach InstCombine to canonicalize loads which are only
ever stored to always use a legal integer type if one is available.

Regardless of whether this particular type is good or bad, it ensures we
don't get weird differences in generated code (and resulting
performance) from "equivalent" patterns that happen to end up using
a slightly different type.

After some discussion on llvmdev it seems everyone generally likes this
canonicalization. However, there may be some parts of LLVM that handle
it poorly and need to be fixed. I have at least verified that this
doesn't impede GVN and instcombine's store-to-load forwarding powers in
any obvious cases. Subtle cases are exactly what we need te flush out if
they remain.

Also note that this IR pattern should already be hitting LLVM from Clang
at least because it is exactly the IR which would be produced if you
used memcpy to copy a pointer or floating point between memory instead
of a variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226781 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 05:08:12 +00:00
Saleem Abdulrasool
3f6dea4864 ARM: fail less catastrophically on invalid Windows input
Windows supports a restricted set of relocations (compared to ARM ELF).  In some
cases, we may end up generating an unsupported relocation.  This can occur with
bad input to the assembler in particular (the frontend should never generate
code that cannot be compiled).  Generate an error rather than just aborting.

The change in the API is driven by the desire to provide a slightly more helpful
message for debugging purposes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226779 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 04:03:32 +00:00
Chandler Carruth
ac76e02882 [canonicalize] Move a helper function further up the file so it can be
used earlier. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226777 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 03:34:54 +00:00
Reid Kleckner
0d056fd4c3 Win64 SEH: Emit the constant 1 for catch-all into xdata
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226767 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 02:27:44 +00:00
Sanjoy Das
48fcc07856 Make ScalarEvolution less aggressive with respect to no-wrap flags.
ScalarEvolution currently lowers a subtraction recurrence to an add
recurrence with the same no-wrap flags as the subtraction.  This is
incorrect because `sub nsw X, Y` is not the same as `add nsw X, -Y`
and `sub nuw X, Y` is not the same as `add nuw X, -Y`.  This patch
fixes the issue, and adds two test cases demonstrating the bug.

Differential Revision: http://reviews.llvm.org/D7081



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226755 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 00:48:47 +00:00
Adrian Prantl
8a1465afce Make DwarfExpression use the new DIExpressionIterator. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226748 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 00:00:59 +00:00
Adrian Prantl
f51d86f02c Rewrite DIExpression::Verify() using an iterator. NFC.
Addresses review comments for r226627.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226747 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 00:00:52 +00:00
Chandler Carruth
7e57686e51 [canonicalization] Refactor how we create new stores into a helper
function. This is a bit tidier anyways and will make a subsquent patch
simpler as I want to add another case to this combine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226746 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 23:45:01 +00:00
Simon Pilgrim
3f6acdd265 [X86][SSE] Missing SSE/AVX1 memory folding integer instructions
Added most of the missing integer vector folding patterns for SSE (to SSE42) and AVX1.

The most useful of these are probably the i32/i64 extraction, i8/i16/i32/i64 insertions, zero/sign extension, unsigned saturation subtractions, i64 subtractions and the variable mask blends (pblendvb) - others include CLMUL, SSE42 string comparisons and bit tests.

Differential Revision: http://reviews.llvm.org/D7094



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226745 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 23:43:30 +00:00
Tim Northover
f5f8a3e6a6 DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))
It can help with argument juggling on some targets, and is generally a good
idea.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226740 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 23:17:19 +00:00
David Blaikie
f93662d3d5 DebugInfo: Use distinct inlinedAt MDLocations to avoid separate inlined calls being coalesced
When two calls from the same MDLocation are inlined they currently get
treated as one inlined function call (creating difficulty debugging,
duplicate variables, etc).

Clang worked around this by including column information on inline calls
which doesn't address LTO inlining or calls to the same function from
the same line and column (such as through a macro). It also didn't
address ctor and member function calls.

By making the inlinedAt locations distinct, every call site has an
explicitly distinct location that cannot be coalesced with any other
call.

This can produce linearly (2x in the worst case where every call is
inlined and the call instruction has a non-call instruction at the same
location) more debug locations. Any increase beyond that are in cases
where the Clang workaround was insufficient and the new scheme is
creating necessary distinct nodes that were being erroneously coalesced
previously.

After this change to LLVM the incomplete workarounds in Clang. That
should reduce the number of debug locations (in a build without column
info, the default on Darwin, not the default on Linux) by not creating
pseudo-distinct locations for every call to an inline function.

(oh, and I made the inlined-at chain rebuilding iterative instead of
recursive because I was having trouble wrapping my head around it the
way it was - open to discussion on the right design for that function
(including going back to a recursive solution))

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 22:57:29 +00:00
Matthias Braun
9a43e3d47f LiveIntervalAnalysis: Mark subregister defs as undef when we determined they are only reading a dead superregister value
This was not necessary before as this case can only be detected when the
liveness analysis is at subregister level.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226733 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 22:55:13 +00:00
Chris Bieneman
f04568139a Adding a new cl::HideUnrelatedOptions API to allow clang to migrate off cl::getRegisteredOptions.
Summary: cl::getRegisteredOptions really exposes some of the innards of how command line parsing is implemented. Exposing new APIs that allow us to disentangle client code from implementation details will allow us to make more extensive changes to command line parsing.

Reviewers: chandlerc, dexonsmith, beanz

Reviewed By: dexonsmith

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7100

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226729 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 22:45:52 +00:00
Simon Pilgrim
4269590166 [X86][SSE] Added support for SSE3 lane duplication shuffle instructions
This patch adds shuffle matching for the SSE3 MOVDDUP, MOVSLDUP and MOVSHDUP instructions. The big use of these being that they avoid many single source shuffles from needing to use (pre-AVX) dual source instructions such as SHUFPD/SHUFPS: causing extra moves and preventing load folds.

Adding these instructions uncovered an issue in XFormVExtractWithShuffleIntoLoad which crashed on single operand shuffle instructions (now fixed). It also involved fixing getTargetShuffleMask to correctly identify theses instructions as unary shuffles.

Also adds a missing tablegen pattern for MOVDDUP.

Differential Revision: http://reviews.llvm.org/D7042



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226716 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 22:44:35 +00:00
Jonathan Roelofs
cab5680f6c Fix load-store optimizer on thumbv4t
Thumbv4t does not have lo->lo copies other than MOVS,
and that can't be predicated. So emit MOVS when needed
and bail if there's a predicate.

http://reviews.llvm.org/D6592


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226711 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 22:39:43 +00:00
David Majnemer
c070e4e528 InstCombine: Don't strip bitcasts off of callsites marked 'thunk'
The return type of a thunk is meaningless, we just want the arguments
and return value to be forwarded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226708 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 22:32:04 +00:00
Simon Pilgrim
a7a4b836a3 [X86][SSE] movddup shuffle mask decodes
Patch to provide shuffle decodes and asm comments for the SSE3/AVX1 movddup double duplication instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226705 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 22:02:30 +00:00
Matthias Braun
7d3ec5af28 LiveIntervalAnalysis: Factor out code to update liveness on vreg def removal
This cleans up code and is more in line with the general philosophy of
modifying LiveIntervals through LiveIntervalAnalysis instead of changing
them directly.

This also fixes a case where SplitEditor::removeBackCopies() would miss
the subregister ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226690 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 19:02:30 +00:00
Matthias Braun
1458e05967 LiveIntervalAnalysis: Factor out code to update liveness on physreg def removal
This cleans up code and is more in line with the general philosophy of
modifying LiveIntervals through LiveIntervalAnalysis instead of changing
them directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226687 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 18:50:21 +00:00
Matthias Braun
5a9462587d LiveIntervalAnalysis: Remove unused pruneValue() variant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226686 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 18:45:57 +00:00
Adrian Prantl
9dc47c0c4a Let subprograms with instructions without parent scopes fail the
verification. Tested via a unit test.

Follow-up to r226616.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226684 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 18:32:56 +00:00
Matt Arsenault
305228cc0b R600/SI: Custom lower fround
This fixes it for SI. It also removes the pattern
used previously for Evergreen for f32. I'm not sure
if the the new R600 output is better or not, but it uses
1 fewer instructions if BFI is available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226682 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 18:18:25 +00:00
Colin LeMahieu
62b9c33e13 [Hexagon] Converting multiply and accumulate with immediate intrinsics to patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226681 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 18:13:15 +00:00
Ahmed Bougacha
34288d885e [X86] Declare SSE4.1/AVX2 vector extloads covered by PMOV[SZ]X legal.
Now that we can fully specify extload legality, we can declare them
legal for the PMOVSX/PMOVZX instructions.  This for instance enables
a DAGCombine to fire on code such as
  (and (<zextload-equivalent> ...), <redundant mask>)
to turn it into:
  (zextload ...)
as seen in the testcase changes.

There is one regression, in widen_load-2.ll: we're no longer able
to do store-to-load forwarding with illegal extload memory types.
This will be addressed separately.

Differential Revision: http://reviews.llvm.org/D6533


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226676 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 17:07:06 +00:00
George Burgess IV
bdcc4ec129 Fixed a bug with how we determine bitset indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226671 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 16:37:21 +00:00
Yaron Keren
ba9dbd7a92 Add missing include guards to WindowsSupport.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226669 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 16:20:38 +00:00
Tim Northover
c49e57ade1 Revert "DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))"
It hadn't gone through review yet, but was still on my local copy.

This reverts commit r226663

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226665 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 15:48:52 +00:00
Tim Northover
004d725549 AArch64: add backend option to reserve x18 (platform register)
AAPCS64 says that it's up to the platform to specify whether x18 is
reserved, and a first step on that way is to add a flag controlling
it.

From: Andrew Turner <andrew@fubar.geek.nz>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226664 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 15:43:31 +00:00
Tim Northover
47f47f5d2a DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226663 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 15:43:28 +00:00
Michael Kuperstein
0b4244ade1 [x32] Fast ISel should use LEA64_32r instead of LEA32r to adjust addresses in x32 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226661 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 14:44:05 +00:00
Evgeniy Stepanov
dbc6b63128 [msan] Update origin for the entire destination range on memory store.
Previously we always stored 4 bytes of origin at the destination address
even for 8-byte (and longer) stores.

This should fix rare missing, or incorrect, origin stacks in MSan reports.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226658 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 13:21:31 +00:00
Jozef Kolek
db8552c834 [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B
Implement microMIPS 16-bit unconditional branch instruction B.

Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1

Differential Revision: http://reviews.llvm.org/D3514


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226657 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 12:39:30 +00:00
Jozef Kolek
16dbcd741f [mips][microMIPS] Implement ADDIUPC instruction
Differential Revision: http://reviews.llvm.org/D6582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226656 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 12:10:11 +00:00
Chandler Carruth
9d4f87e9be [PM] Refactor the InstCombiner interface to use an external worklist.
Because in its primary function pass the combiner is run repeatedly over
the same function until doing so produces no changes, it is essentially
to not re-allocate the worklist. However, as a utility, the more common
pattern would be to put a limited set of instructions in the worklist
rather than the entire function body. That is also the more likely
pattern when used by the new pass manager.

The result is a very light weight combiner that does the visiting with
a separable worklist. This can then be wrapped up in a helper function
for users that want a combiner utility, or as I have here it can be
wrapped up in a pass which manages the iterations used when combining an
entire function's instructions.

Hopefully this removes some of the worst of the interface warts that
became apparant with the last patch here. However, there is clearly more
work. I've again left some FIXMEs for the most egregious. The ones that
stick out to me are the exposure of the worklist and IR builder as
public members, and the use of pointers rather than references. However,
fixing these is likely to be much more mechanical and less interesting
so I didn't want to touch them in this patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226655 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 11:38:17 +00:00
Chandler Carruth
67d5257374 [PM] Simplify (ha! ha!) the way that instcombine calls the
SimplifyLibCalls utility by sinking it into the specific call part of
the combiner.

This will avoid us needing to do any contortions to build this object in
a subsequent refactoring I'm doing and seems generally better factored.
We don't need this utility everywhere and it carries no interesting
state so we might as well build it on demand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226654 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 11:23:40 +00:00
Vladimir Medic
cde587f359 [Mips][Disassembler]When disassembler meets load/store from coprocessor 2 instructions for mips r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method that properly handles decoding of these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226652 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 10:47:36 +00:00
Craig Topper
74670deb21 [x86] Remove some unnecessary and slightly confusing typecasts from some patterns. I think it actually went i32->iPtr->i32 in some of these cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226647 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 08:43:57 +00:00
Craig Topper
51da87a580 [X86] Convert all the i8imm used by AVX512 and MMX instructions to u8imm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226646 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 08:43:49 +00:00
Craig Topper
951d088ae7 [X86] Convert all the i8imm used by SSE and AVX instructions to u8imm.
This makes the assembler check their size and removes a hack from the disassembler to avoid sign extending the immediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226645 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 08:15:54 +00:00
Craig Topper
f81b1f346a [x86] Add assembly parser bounds checking to the immediate value for cmpss/cmpsd/cmpps/cmppd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226642 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 06:07:53 +00:00
Chandler Carruth
b67fc33fa5 [PM] Replace an abuse of inheritance to override a single function with
a more direct approach: a type-erased glorified function pointer. Now we
can pass a function pointer into this for the easy case and we can even
pass a lambda into it in the interesting case in the instruction
combiner.

I'll be using this shortly to simplify the interfaces to InstCombiner,
but this helps pave the way and seems like a better design for the
libcall simplifier utility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226640 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 02:11:59 +00:00
Adrian Prantl
4d569edd37 Make DIExpression::Verify() stricter by checking that the number of
elements and the ordering is sane and cleanup the accessors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226627 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 00:59:20 +00:00
Chandler Carruth
622a4bdaa7 [PM] Separate the InstCombiner from its pass.
This creates a small internal pass which runs the InstCombiner over
a function. This is the hard part of porting InstCombine to the new pass
manager, as at this point none of the code in InstCombine has access to
a Pass object any longer.

The resulting interface for the InstCombiner is pretty terrible. I'm not
planning on leaving it that way. The key thing missing is that we need
to separate the worklist from the combiner a touch more. Once that's
done, it should be possible for *any* part of LLVM to just create
a worklist with instructions, populate it, and then combine it until
empty. The pass will just be the (obvious and important) special case of
doing that for an entire function body.

For now, this is the first increment of factoring to make all of this
work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226618 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-20 22:44:35 +00:00
Adrian Prantl
6b89efe375 DebugLocs without a scope should fail the verification.
Follow-up to r226588.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226616 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-20 22:37:25 +00:00
Chandler Carruth
28f591c3d7 [PM] Reformat this code with clang-format so that subsequent changes
don't get muddied up by formatting changes.

Some of these don't really seem like improvements to me, but they also
don't seem any worse and I care much more about not formatting them
manually than I do about the particular formatting. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226610 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-20 21:10:35 +00:00