Commit Graph

11921 Commits

Author SHA1 Message Date
Daniel Dunbar
6745d42e8e llvm-mc/AsmParser: Define match classes in the .td file.
-2 FIXMEs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78523 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 05:18:30 +00:00
Chris Lattner
93b6db3de9 sink the 'name' and 'isdirective' state out of MCSection into its derived classes.
This totally optimizes PIC16 sections by not having an 'isdirective' bit anymore!! ;-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78517 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 23:39:42 +00:00
Anton Korobeynikov
8e9ece75db Use subclassing to print lane-like immediates (w/o hash) eliminating
'no_hash' modifier. Hopefully this will make Daniel happy :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78514 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 23:10:41 +00:00
Chris Lattner
ba44633a3b add a note about dead zero extends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78511 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 22:46:59 +00:00
Chris Lattner
892e182393 1. Make MCSection an abstract class.
2. Move section switch printing to MCSection virtual method which takes a
   TAI.  This eliminates textual formatting stuff from TLOF.
3. Eliminate SwitchToSectionDirective, getSectionFlagsAsString, and 
   TLOFELF::AtIsCommentChar.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78510 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 22:41:53 +00:00
Eric Christopher
b4dc13cab7 Add crc32 instruction and intrinsics. Add a new class of prefix
bytes for F2 0F 38 and propagate. Add a FIXME for a set
of possibilities which correspond to intrinsics already used.

New test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78508 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:55:08 +00:00
Jakob Stoklund Olesen
46151de6a0 Add support for READCYCLECOUNTER in Blackfin back-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:42:22 +00:00
Chris Lattner
f7427e558d add new PIC16Section class, this time hopefully not breaking the build :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:37:01 +00:00
Daniel Dunbar
245f05843f llvm-mc/AsmMatcher: Switch token matching to use the new string matcher.
Also, redefined MatchRegisterName to just return the register value or a
sentinel, to simplify the generated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78504 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:22:41 +00:00
Daniel Dunbar
fb373909be Revert r78501, it doesn't build.
--- Reverse-merging r78501 into '.':
U    lib/Target/PIC16/PIC16TargetObjectFile.cpp
D    lib/Target/PIC16/PIC16Section.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78503 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:12:40 +00:00
Chris Lattner
50e38121d1 make PIC16 create its own custom MCSection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78501 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:55:25 +00:00
Chris Lattner
7c599d056a make target-specific TLOF impls (except PIC16) create target-specific
MCSection instances.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:52:13 +00:00
Chris Lattner
5277b22687 eliminate TargetLoweringObjectFileSparc in favor of a TAI hook.
A TAI hook is appropriate in this case because this is just an
asm syntax issue, not a semantic difference. TLOF should model
the semantics of the section.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78498 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:43:12 +00:00
Chris Lattner
9aee18186c give pic16 a target-specific section creation name too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:23:47 +00:00
Chris Lattner
0c0cb71233 now that getOrCreateSection is all object-file specific,
give the impls an object-file-specific name.  In the future
they can take different arguments etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:22:20 +00:00
Chris Lattner
fbf1d271e6 sink getOrCreateSection down into all the object file implementations,
now that they create *all* the sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:14:13 +00:00
Bruno Cardoso Lopes
71435a3975 Use reloc_absolute_word_sext relocation for X86::MOV64(ri/mi)32 instructions,
since they are in 64 bit mode with i64immSExt32 imms. JIT is not affected since 
it handles both word absolute relocations in the same way


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78479 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 17:47:41 +00:00
Daniel Dunbar
cf1e764a1c Update CMake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78475 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 17:03:13 +00:00
Anton Korobeynikov
06af2ba809 Add insert_elt / extract_elt patterns for v4f32 stuff.
Did anyone tests v4f32 ever?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78470 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 14:06:07 +00:00
Anton Korobeynikov
3405201bce Lane number should be printed w/o hash
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78469 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 14:05:53 +00:00
Anton Korobeynikov
baf31088f1 Use VLDM / VSTM to spill/reload 128-bit Neon registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 13:35:48 +00:00
Andrew Lenharth
20c08e534f move this fp select into a pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78464 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 12:49:07 +00:00
Daniel Dunbar
a3741fa28b llvm-mc/AsmMatcher: Improve match code.
- This doesn't actually improve the algorithm (its still linear), but the
   generated (match) code is now fairly compact and table driven. Still need a
   generic string matcher.

 - The table still needs to be compressed, this is quite simple to do and should
   shrink it to under 16k.

 - This also simplifies and restructures the code to make the match classes more
   explicit, in anticipation of resolving ambiguities.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78461 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 07:50:56 +00:00
Bob Wilson
b6ab51e829 Implement Neon VZIP and VUZP instructions. These are very similar to VTRN,
so I generalized the class for VTRN in the .td file to handle all 3 of them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78460 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 06:13:25 +00:00
Bob Wilson
64efd90f8c Implement Neon VTRN instructions. For now, anyway, these are selected
directly from the intrinsics produced by the frontend.  If it is more
convenient to have a custom DAG node for using these to implement shuffles,
we can add that later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78459 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 05:53:00 +00:00
Evan Cheng
3eff16e27a Add a skeleton Thumb2 instruction size reduction pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78456 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 03:21:23 +00:00
Evan Cheng
8fb903604e Code refactoring. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78455 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 03:20:32 +00:00
Evan Cheng
57834cdee5 tADDhirr should target GPR, not tGPR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78454 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 03:19:44 +00:00
Evan Cheng
34f8a029e3 I can type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78453 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 02:54:37 +00:00
Chris Lattner
41aefdcdd1 make printInstruction return void since its result is omitted. Make the
error condition get trapped with an assert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78449 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 01:32:19 +00:00
Chris Lattner
2698cb6811 don't check the result of printInstruction anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78444 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 00:05:42 +00:00
Anton Korobeynikov
941222eea0 Do not generate 32-bit call on win64 when imm does not fit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78443 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 23:59:21 +00:00
David Goodwin
767a952a6f Make NEON single-precision FP support the default for cortex-a8 (again).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78430 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 23:32:33 +00:00
Chris Lattner
db0a9706e7 remove a bunch of now-dead crud from the asmprinter and TAI interfaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 23:16:27 +00:00
Anton Korobeynikov
a55fd4a23f Unbreak the stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 22:51:13 +00:00
Andrew Lenharth
7116b7bb0c avoid this libcall with long inline expansion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78420 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 22:37:20 +00:00
Anton Korobeynikov
32a1b25781 2 more vdup.32 cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78419 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 22:36:50 +00:00
Evan Cheng
fcc716352b A big oops. Thumb1 default CC is a def of CPSR, not a use of CPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78418 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 22:36:37 +00:00
Bill Wendling
1232167ce3 Reformatting of lines. Put multiple DEBUG statements under one DEBUG statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78411 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 21:33:25 +00:00
Evan Cheng
d77c7aba83 Thumb2 32-bit ldm / stm needs .w suffix if submode is ia.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78410 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 21:19:10 +00:00
Daniel Dunbar
2724915c17 llvm-mc/AsmMatcher: Tweaks in response to feedback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 20:33:39 +00:00
Evan Cheng
f12288e8aa This is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78399 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 19:34:52 +00:00
Evan Cheng
e118cb6146 Use 16-bit tMOVgpr2gpr instead of tMOVr to copy GPR registers in Thumb2 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78398 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 19:34:35 +00:00
Evan Cheng
1d2426c470 Fix support to use NEON for single precision fp math.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78397 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 19:30:41 +00:00
Sanjiv Gupta
394a1a21a1 Minor fixes to avoid using invalid debugloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78383 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 11:00:02 +00:00
Benjamin Kramer
b8d222def1 Simplify code and avoid allocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 10:42:28 +00:00
Daniel Dunbar
6812cd18aa Improve disabling of X86 AsmMatcher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 09:06:38 +00:00
Daniel Dunbar
7ddca30f31 Disable X86 AsmMatcher for now, it is causing gcc-4.0 to run out of memory on
i386-apple-darwin9. This presumably will get fixed once the generated code
improves.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78379 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 08:45:03 +00:00
Daniel Dunbar
20927f26fc llvm-mc/AsmMatcher: Move to a slightly more sane matching design.
- Still not very sane, but a least its not 60k lines on X86. :)

 - In terms of correctness, currently some things are hard wired for X86, and we
   still don't properly resolve ambiguities (this is ignoring the instructions
   we don't even match due to funny .td stuff or other corner cases).

The high level changes:
 1. Represent tokens which are significant for matching explicitly as separate
    operands. This uniformly handles not only the instruction mnemonic, but
    also 'signficiant' syntax like the '*' in "call * ...".

 2. Separate the matching of operands to an instruction from the construction of
    the MCInst. In theory this can be done during matching, but since the number
    of variations is small I think it makes sense to decompose the problems.

 3. Improved a few of the mechanisms to at least successfully flatten / tokenize
    the assembly strings for PowerPC and ARM.

 4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm
    moving towards for handling ambiguous instructions. The high-bit is to infer
    a partial ordering of the operand classes (and force the user to specify one
    if we can't) and use that to resolve ambiguities.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 08:26:05 +00:00
Evan Cheng
b6879b2b84 Error out, rather than infinite looping, if constant island pass can't converge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78377 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 07:35:21 +00:00