Evan Cheng
35d6c41fde
Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78126 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 23:47:55 +00:00
Bob Wilson
c00479253b
Replace dregsingle operand modifier with explicit escaped curly brackets.
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For other VLDn and VSTn operations, we need to list the multiple registers
explicitly anyway, so there's no point in special-casing this one usage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78109 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:39:33 +00:00
Mike Stump
4dcff6db72
Restlyize to match other targets, fixes cmake build to boot.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78105 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:27:06 +00:00
Evan Cheng
9e7a312391
Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78104 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:12:13 +00:00
Chris Lattner
275bb1bd12
remove a random reference to subtarget. Even without this, we
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still get "intel syntax" instructions from llc with
-x86-asm-syntax=intel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78103 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:12:08 +00:00
David Goodwin
53e4471adc
Add NEON single-precision FP support for fabs and fneg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:39:05 +00:00
Chris Lattner
f9c1ccf280
rip out SectionEndDirectiveSuffix support, only uses by
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the masm backend. If anyone cares about masm in the future,
we'll have semantic sections it can hang off of.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78096 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:09:41 +00:00
Jakob Stoklund Olesen
71d342e854
Most flags are reserved registers on Blackfin.
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The only exception is CC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78089 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 19:16:55 +00:00
Evan Cheng
3425df44b5
In thumb mode, r7 is used as frame register. This fixes pr4681.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78086 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 18:46:17 +00:00
David Goodwin
b84f3d427c
Match common pattern for FNMAC. Add NEON SP support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78085 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 18:44:29 +00:00
Sanjiv Gupta
ada097a853
Legalize i64 store operations generated by inst-combine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78082 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 17:59:16 +00:00
David Goodwin
42a83f2d15
Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 17:53:06 +00:00
Daniel Dunbar
7145e9be64
Avoid compiler warning (in -Asserts mode)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78070 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:46:12 +00:00
Chris Lattner
ec409759e9
enhance codegen to put 16-bit character strings into the
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__TEXT,__ustring section on darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78068 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:27:13 +00:00
Chris Lattner
7e88a50428
fix a fixme: don't create an explicit "CStringSection" for ELF,
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it is just being used as a prefix, so forward substitute it directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78067 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:19:50 +00:00
Chris Lattner
1850e5add1
Add support emiting for 2/4 byte mergable strings to the ".rodata.str*"
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section on ELF targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78066 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:13:09 +00:00
Anton Korobeynikov
939ba32747
Ooops, I was too fast to commit the wrong fix :(
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78060 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 11:18:31 +00:00
Anton Korobeynikov
20e037a8c5
Fix a typo - this unbreaks llvm-gcc build on arm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78059 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 11:12:51 +00:00
Evan Cheng
eb084d1671
Thumb2 does not have ib (increment before) and da (decrement after) forms of ldm / stm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 08:34:18 +00:00
Chris Lattner
3b24c01720
make MergeableCString be a SectionKind "abstract class", and
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add new concrete versions for 1/2/4-byte mergable strings.
These are not actually created yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78055 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 05:35:56 +00:00
Daniel Dunbar
4b3d57228c
No really, it's unused.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78047 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 04:08:40 +00:00
Daniel Dunbar
214e22396f
Remove now unused Module argument to createTargetMachine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 04:02:45 +00:00
Evan Cheng
f0409ea488
Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster) generic algorithm for now. If more accurate computation is needed, we'll rely on the disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78032 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:56:09 +00:00
Evan Cheng
27934da97b
Load / store multiple pass fixes for Thumb2. Not enabled yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78031 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:43:45 +00:00
Evan Cheng
fa2ea1a8cf
Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78030 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:41:15 +00:00
Bob Wilson
a599bff101
Lower Neon VLD* intrinsics to custom DAG nodes, and manually allocate the
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results to fixed registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78025 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 00:36:16 +00:00
Bob Wilson
916afdbc2d
Minor cleanup. No functional changes intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78024 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 00:25:01 +00:00
Ted Kremenek
f6e75c3435
Update CMake files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 23:44:01 +00:00
Chris Lattner
7b59e2493d
remove an unneeded section switch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78014 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 23:02:45 +00:00
Chris Lattner
2dfddee396
switch ppc to using SwitchToSection instead of textual section stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78013 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 22:52:21 +00:00
Chris Lattner
5e44e472d6
use TLOF to compute the section for a function instead of
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replicating the logic manually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 22:32:50 +00:00
Chris Lattner
f61159b574
convert macho stub emission to use SwitchToSection instead of
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textual sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78007 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 22:18:15 +00:00
Chris Lattner
865aaf00ad
hoist some common code out of a switch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 22:16:57 +00:00
Chris Lattner
c8bfb7a49d
this really shouldn't switch sections without telling the asmprinter, but
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hey it uses .previous, so it should work :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78004 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 21:57:00 +00:00
Chris Lattner
11e9657eeb
Eliminate textual section switching from the x86 backend, one
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more step towards "semantics sections"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78002 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 21:53:27 +00:00
Bob Wilson
a6d658620f
Lower CONCAT_VECTOR during legalization instead of matching it during isel.
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Add a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 20:36:38 +00:00
Jakob Stoklund Olesen
ea1c9b7bac
Minor stylistic cleanups in the Blackfin target.
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Thanks Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77987 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 19:32:30 +00:00
Chris Lattner
9a7a4d2a60
remove a dead switch directive, replace it with some
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code that I will be using shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77983 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 19:10:44 +00:00
Evan Cheng
d2aee8ce89
Remove neverHasSideEffects on MMX_MOVD64rrv164 since it has a matching pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 18:07:19 +00:00
Chris Lattner
1763766a57
eliminate textual section switching from intel asm printer.
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This will cause it to enter the ".text" section instead of "_text"
but masm is already broken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77977 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 18:06:07 +00:00
Daniel Dunbar
d1a919e139
Change C, CBE, MSIL to not provide target data via getTargetData().
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- The theory is these should never actually be called, since these boil down to
passes which can access the target data via the standard mechanism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77975 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 17:40:25 +00:00
Benjamin Kramer
d5fe92efbc
llvm_report_error already prints "LLVM ERROR:". So stop reporting errors like "LLVM ERROR: llvm: error:" or "LLVM ERROR: ERROR:".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77971 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 13:33:33 +00:00
Anton Korobeynikov
0144280cfb
Unbreak win64 compilation callback.
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Since we're generating stubs by hands we don't follow the ABI and don't
create a register spill area.
Don't use this area in compilation callback!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:43:36 +00:00
Anton Korobeynikov
dd93f5eb71
Create proper frame index for FP
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77966 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:14:30 +00:00
Anton Korobeynikov
6dde14bc25
Perform bitconvert to proper type
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77965 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:14:14 +00:00
Anton Korobeynikov
4ab15535e7
Add 'Indirect' LocInfo class and use to pass __m128 on win64. Also minore fixes here and there (mostly __m64).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:13:56 +00:00
Anton Korobeynikov
80cb8aa862
Cleanup Darwin MMX calling conv stuff - make the stuff more generic. This also fixes a subtle bug, when 6th v1i64 argument passed wrongly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77963 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:13:24 +00:00
Anton Korobeynikov
cf6b739d3d
Unbreak Win64 CC. Step one: honour register save area, fix some alignment and provide a different set of call-clobberred registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:12:53 +00:00
Rafael Espindola
8d632c1e98
Use movd instead of movq
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77956 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 05:21:05 +00:00
Daniel Dunbar
4bd03abe59
Remove now unused arguments from TargetRegistry::lookupTarget.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77950 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 04:20:57 +00:00
Evan Cheng
9072c8198d
These are done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77949 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 04:08:36 +00:00
Daniel Dunbar
3c2d4bf97f
Pass target triple string in to TargetMachine constructor.
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This is not just a matter of passing in the target triple from the module;
currently backends are making decisions based on the build and host
architecture. The goal is to migrate to making these decisions based off of the
triple (in conjunction with the feature string). Thus most clients pass in the
target triple, or the host triple if that is empty.
This has one important change in the way behavior of the JIT and llc.
For the JIT, it was previously selecting the Target based on the host
(naturally), but it was setting the target machine features based on the triple
from the module. Now it is setting the target machine features based on the
triple of the host.
For LLC, -march was previously only used to select the target, the target
machine features were initialized from the module's triple (which may have been
empty). Now the target triple is taken from the module, or the host's triple is
used if that is empty. Then the triple is adjusted to match -march.
The take away is that -march for llc is now used in conjunction with the host
triple to initialize the subtarget. If users want more deterministic behavior
from llc, they should use -mtriple, or set the triple in the input module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77946 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 04:03:51 +00:00
Rafael Espindola
0c794b8725
Fix the instruction encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77944 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 03:27:05 +00:00
Rafael Espindola
cc2b67af91
Remove a bitcast that was a no-op.
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Thanks to Eli Friedman for noticing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77942 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 03:00:05 +00:00
Rafael Espindola
def390a30a
Use movq to move 64 bits in and out of mmx registers.
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Fixes PR4669
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 02:45:34 +00:00
Evan Cheng
a8e8984ee4
Use the i12 variant of load / store opcodes if offset is zero. Now we pass all of multisource as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77939 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 02:38:06 +00:00
Eli Friedman
e2c7408199
Remove -disable-mips-abicall and -enable-mips-absolute-call command-line
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options, which don't appear to be useful. -enable-mips-absolute-call is
completely unused (and unless I'm mistaken, is supposed to have the
same effect that -relocation-model=dynamic-no-pic should have),
and -disable-mips-abicall appears to be effectively a
synonym for -relocation-model=static. Adjust the few users of hasABICall
to checks which seem more appropriate. Update MipsSubtarget,
MipsTargetMachine, and MipselTargetMachine to synchronize with recent
changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77938 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 02:22:28 +00:00
Bill Wendling
0ea8bf3590
- s/DOUT/DEBUG(errs()/g
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- Tidy up some headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77929 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 00:11:34 +00:00
Daniel Dunbar
e28039cfd1
Move most targets TargetMachine constructor to only taking a target triple.
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- The C, C++, MSIL, and Mips backends still need the module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77927 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 23:37:13 +00:00
Richard Osborne
d558ea5e0a
Add extra SEXT pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77920 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 22:45:24 +00:00
Bill Wendling
3bb9b9a1ab
The x86 jit doesn't generate a def_cfa_offset unwind instruction after the
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pushes in the function prolog if the function doesn't have any stack space,
i.e. for a prolog like:
0x40011870: push %r15
0x40011872: push %r14
0x40011874: push %rbx
Patch by Zoltan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 22:25:37 +00:00
Daniel Dunbar
3be03406c9
Normalize Subtarget constructors to take a target triple string instead of
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Module*.
Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77918 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 22:11:08 +00:00
Jakob Stoklund Olesen
1391cc19d0
Remove unneeded intrinsics from Blackfin backend.
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__builtin_bfin_ones does the same as ctpop, so it can be implemented in the front-end.
__builtin_bfin_loadbytes loads from an unaligned pointer with the disalignexcpt instruction. It does the same as loading from a pointer with the low bits masked. It is better if the front-end creates a masked load. We can always instruction select the masked to disalignexcpt+load.
We keep csync/ssync/idle. These intrinsics represent instructions that need workarounds for some silicon revisions. We may even want to convert inline assembler to intrinsics to enable the workarounds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 21:49:05 +00:00
Jakob Stoklund Olesen
6b30f5c867
Add some basic blackfin intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77903 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 18:28:11 +00:00
Jakob Stoklund Olesen
26a84d4f3c
Add support for CPU features (i.e., bugs) and workarounds.
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This is just the framework to identify the needed workarounds. They are not actually implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77902 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 18:27:36 +00:00
Jakob Stoklund Olesen
63cc527fbc
Inline assembly support for Blackfin.
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We use the same constraints as GCC, including those that are slightly insane for inline assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77899 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 17:39:17 +00:00
Jakob Stoklund Olesen
d950941e13
Analog Devices Blackfin back-end.
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Generate code for the Blackfin family of DSPs from Analog Devices:
http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html
We aim to be compatible with the exsisting GNU toolchain found at:
http://blackfin.uclinux.org/gf/project/toolchain
The back-end is experimental.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 17:32:10 +00:00
Dan Gohman
7267734c39
Fix indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77895 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 16:10:52 +00:00
Dan Gohman
cadb226a3f
Add a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 16:10:01 +00:00
Dan Gohman
a98634ba14
Resync lea32addr and lea64addr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77893 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 16:09:17 +00:00
Chris Lattner
18a4c16726
move dwarf debug info section selection stuff from TAI to
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TLOF, unifying all the dwarf targets at the same time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 07:24:22 +00:00
Chris Lattner
35039ac241
convert EHFrameSection to be managed by TLOF instead of TAI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77888 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 06:52:36 +00:00
Chris Lattner
21e1e81aa6
I need Triple information, 10.6 shouldn't set this, it bloats
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object files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77887 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 06:51:58 +00:00
Chris Lattner
24def37c85
ARM TAI no longer needs a TM, but createTargetAsmInfo() still does.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77878 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 05:23:52 +00:00
Chris Lattner
d90183d25d
Move the getInlineAsmLength virtual method from TAI to TII, where
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the only real caller (GetFunctionSizeInBytes) uses it.
The custom ARM implementation of this is basically reimplementing
an assembler poorly for negligible gain. It should be removed
IMNSHO, but I'll leave that to ARMish folks to decide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77877 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 05:20:37 +00:00
Chris Lattner
b6bbfebdc6
move a virtual method body to its .cpp file to avoid a #include
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in a header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77874 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:58:19 +00:00
Chris Lattner
7bbd178d4b
turn some templated inline functions into static functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77873 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:52:00 +00:00
Chris Lattner
f67de7a69e
alpha TAI doesn't need TM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77872 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:46:05 +00:00
Chris Lattner
68f2b2cdd5
MSP430 TAI doesn't need TM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:45:22 +00:00
Chris Lattner
09e820b07c
simplify SPULinuxTargetAsmInfo, remove use of TM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77869 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:44:33 +00:00
Chris Lattner
71a56d75b4
xcore TAI doesn't need TM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77868 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:42:09 +00:00
Chris Lattner
3878bff390
PIC16 TAI doesn't need TM
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77867 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:41:14 +00:00
Chris Lattner
9ba8c6872d
remove the dead ELFTargetAsmInfo.h/cpp file. TargetAsmInfo
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defaults to being ELF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:33:09 +00:00
Chris Lattner
e6483e3097
eliminate the TM argument to the TAI class, remove comment about supporting
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solaris :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77865 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:32:07 +00:00
Chris Lattner
ba8e7401fb
eliminate TargetMAchine argument to sparc TAI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77864 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:30:59 +00:00
Chris Lattner
8d4a0a328a
remove TargetAsmInfo::TM, which is now dead. The basic TAI class now
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no longer depends on TM!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77863 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:27:24 +00:00
Chris Lattner
83f08a2efd
remove the x86/ppc impls of getEHGlobalPrefix, which is already dead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77861 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:13:22 +00:00
Chris Lattner
5e62147e07
clean up #includes of TargetAsmInfo.cpp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77858 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:09:22 +00:00
Chris Lattner
b6d667403f
remove the dead PreferredEHDataFormat TAI hook: its now dead
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even considering #if 0 code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77856 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:02:52 +00:00
Chris Lattner
d5bbb07ec8
move getDwarfExceptionSection from TAI to TLOF and rename it to
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getLSDASection() to be more specific. This makes it pretty obvious
that the ELF LSDA section is being specified wrong in PIC mode. We're
probably getting a lot of startup-time relocations to a readonly page,
which is expensive and bad.
Someone who cares about ELF C++ should investigate this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 01:34:32 +00:00
Daniel Dunbar
967ce7f5e1
Fix a possible crash on delete of an uninitialized variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77846 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 01:25:15 +00:00
Dan Gohman
18f54c07e1
Don't call SectionForGlobal for hasAvailableExternallyLinkage()
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variables either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77844 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 01:18:44 +00:00
Chris Lattner
6f411dfad9
don't call SectionForGlobal on declarations, you can't tell the section a
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declaration will end up in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77843 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 01:02:43 +00:00
Chris Lattner
80ec2792b2
convert ctors/dtors section to be in TLOF instead of
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TAI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77842 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 00:34:36 +00:00
Chris Lattner
73e789fd37
don't override the default of this, the only difference is \t instead of ' '.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77838 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 00:12:20 +00:00
Daniel Dunbar
cdcb388a58
Change MCOperand to use Create style instead of Make style for constructing
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operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77837 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 00:09:22 +00:00
Chris Lattner
1ef9be2883
Make SectionKind::get() private.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77835 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 00:02:44 +00:00
Chris Lattner
2798119ab4
(re)introduce new simpler apis for creation sectionkinds.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77834 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 23:57:16 +00:00
Chris Lattner
83d77faf6e
Remove "JumpTableDataSection" from TAI, instead, have AsmPrinter
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compute it based on what it knows. As part of this, rename getSectionForMergeableConstant
to getSectionForConstant because it works for non-mergable constants also.
The only functionality change from this is that Xcore will start dropping
its jump tables into readonly section instead of data section in -static mode.
This should be fine as the linker resolves the relocations. If this is a
problem, let me know and we'll come up with another solution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77833 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 23:46:12 +00:00
Chris Lattner
0da3f4f742
give alpha its readonly section. This optimizes alpha, and prevents a
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testsuite regression with a coming patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77832 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 23:44:04 +00:00
Chris Lattner
528c0d26a5
.rdata == .rodata on mips.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77827 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 23:07:29 +00:00
Chris Lattner
566d1c426b
no need to override the default with the default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77826 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 23:05:25 +00:00
Chris Lattner
b80610cd13
REmove dead fields of TAI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77820 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 22:40:22 +00:00
Chris Lattner
cea01bfe7d
update for rename
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77817 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 22:06:53 +00:00
Chris Lattner
824583844a
fix a fixme by sinking various target-specific directives down into
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the appropriate subclasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77815 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:56:13 +00:00
Chris Lattner
94dab1e57a
coff also doesn't have a ReadOnlySection yet, (!)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77814 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:49:24 +00:00
Chris Lattner
56fe93c5d3
coff doesn't set a .bss seciton, so this is dead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:48:25 +00:00
Chris Lattner
f9650c061e
it turns out that isWeak() was basically dead anyway. Kill off SectionInfo :-/
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77812 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:46:23 +00:00
Chris Lattner
27602b82c2
don't use isWeak anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77810 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:42:58 +00:00
Dan Gohman
a9c1dd7820
Fix typos in comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77806 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:25:00 +00:00
Chris Lattner
968ff11967
Change SectionKind to be a property that is true of a *section*, it
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should have no state that is specific to particular globals in the
section. In this case, it means the removal of the "isWeak" and
"ExplicitSection" bits. MCSection uses the new form of SectionKind.
To handle isWeak, I introduced a new SectionInfo class, which is
SectionKind + isWeak, and it is used by the part of the code generator
that does classification of a specific global.
The ExplicitSection disappears. It is moved onto MCSection as a new
"IsDirective" bit. Since the Name of a section is either a section
or directive, it makes sense to keep this bit in MCSection. Ultimately
the creator of MCSection should canonicalize (e.g.) .text to whatever
the actual section is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77803 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:11:14 +00:00
Dan Gohman
7e77b0fcb0
Minor code cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77795 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 19:14:37 +00:00
Nick Lewycky
1102afb8c5
Add newline at end of file to remove gcc warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77791 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 19:09:44 +00:00
Chris Lattner
4a7bc1e5aa
All MCSections are now required to have a SectionKind.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 18:25:49 +00:00
Evan Cheng
25f7cfc3cc
Workaround a couple of Darwin assembler bugs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 06:13:52 +00:00
Dan Gohman
7571eb5015
Minor code simplifications.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 03:42:59 +00:00
Evan Cheng
13f8b36205
Split t2MOVCCs since some assemblers do not recognize mov shifted register alias with predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 01:43:45 +00:00
Dan Gohman
92aa4045d2
The X86 maximal stack alignment calculator preserves the CFG. Also,
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be more careful about the return value of runOnMachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77758 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 00:31:02 +00:00
Dan Gohman
df09055cdb
X86 floating-point passes don't modify the CFG.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77757 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 00:26:16 +00:00
Evan Cheng
b620724e61
Fix Thumb2 function call isel. Thumb1 and Thumb2 should share the same
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instructions for calls since BL and BLX are always 32-bit long and BX is always
16-bit long.
Also, we should be using BLX to call external function stubs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77756 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 00:16:10 +00:00
Dan Gohman
675fb65bf4
Use setPreservesAll in X86CodeEmitter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77755 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 23:44:16 +00:00
Daniel Dunbar
c09e411102
llvm-mc: A few more parsing / match tweaks.
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- Operands which are just a label should be parsed as immediates, not memory
operands (from the assembler perspective).
- Match a few more flavors of immediates.
- Distinguish match functions for memory operands which don't take a segment
register.
- We match the .s for "hello world" now!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 22:22:54 +00:00
Evan Cheng
a0ee862f2e
t2BR_JT is mov pc, it's 2 byte long, not 4.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 22:22:22 +00:00
Evan Cheng
1119776b19
Thumb2 movcc need .w suffix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 22:21:55 +00:00
Chris Lattner
7a01e95915
PreferredEHDataFormat is always call with data and global, but this whole
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thing is #if0'd out anyway. Just simplify the code by reducing the interface.
Not deleting this is essential for Bill's continuing happiness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77736 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 21:39:55 +00:00
Daniel Dunbar
022e2a84a8
llvm-mc/X86: Sketch match functions for immediates and memory operands.
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Also, change scale value to always be 1 when unspecified to machine MachineInst
encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77728 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:53:16 +00:00
Chris Lattner
26630c1180
move emitUsedDirectiveFor to TargetLoweringObjectFile and rename it to
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indicate that it is a predicate, not an emitter. This eliminates TAI
dependencies on Mangler and GlobalValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77726 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:52:39 +00:00
Chris Lattner
1db511cc91
remove the PPCLinuxTargetAsmInfo implementation of PreferredEHDataFormat,
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because it just calls the default impl.
Remove the PPCDarwinTargetAsmInfo version of PreferredEHDataFormat because
it just returns DW_EH_PE_absptr unless on 10.6. However, 10.6 doesn't support
PPC, so the default impl is just fine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:43:26 +00:00
Chris Lattner
78a0e1bd53
remove a pointless override.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77723 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:36:15 +00:00
Owen Anderson
a7235ea724
Move a few more APIs back to 2.5 forms. The only remaining ones left to change back are
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metadata related, which I'm waiting on to avoid conflicting with Devang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77721 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:28:14 +00:00
Eric Christopher
44b93ff9ad
Whitespace and 80-col cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77718 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:07:27 +00:00
Chris Lattner
a87dea4f8c
switch off of 'Section' onto MCSection. We're not properly using
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MCSection subclasses yet, but this is a step in the right direction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77708 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:48:30 +00:00
Evan Cheng
ff6ab17619
Until we have a "ALIGN" pseudo instruction, have asm printer emitted a .align
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to ensure the instruction that follows a TBB (when the number of table entries
is odd) is 2-byte aligned.
Patch by Sandeep Patel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:35:56 +00:00
Evan Cheng
d26b14c34c
- Teach TBB / TBH offset limits are 510 and 131070 respectively since the offset
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is scaled by two.
- Teach GetInstSizeInBytes about TBB and TBH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77701 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:28:05 +00:00
Daniel Dunbar
d5f02f65af
Normalize target registration code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77692 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:16:53 +00:00
Dan Gohman
ad2afc2a42
Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsage
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shouldn't do AU.setPreservesCFG(), because even though CodeGen passes
don't modify the LLVM IR CFG, they may modify the MachineFunction CFG,
and passes like MachineLoop are registered with isCFGOnly set to true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:16:33 +00:00
Chris Lattner
f26e03bc7e
refactor section construction in TLOF to be through an explicit
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initialize method, which can be called when an MCContext is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77687 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 17:42:42 +00:00
Chris Lattner
82987bfe9b
fix PR4650: we only track sizes for certain objects, so only put something
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into the mergable section if it is one of our special cases. This could
obviously be improved, but this is the minimal fix and restores us to the
previous behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77679 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 16:17:13 +00:00
Benjamin Kramer
c6b79ac88e
Fix a struct/class mismatch, to silence a MSVC warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 11:35:26 +00:00
Sanjiv Gupta
aa93917a5e
define target names for std libcalls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77667 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 07:35:57 +00:00
Daniel Dunbar
c5b19b21d8
Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many
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failures when building assorted projects with clang.
--- Reverse-merging r77654 into '.':
U include/llvm/CodeGen/Passes.h
U include/llvm/CodeGen/MachineFunctionPass.h
U include/llvm/CodeGen/MachineFunction.h
U include/llvm/CodeGen/LazyLiveness.h
U include/llvm/CodeGen/SelectionDAGISel.h
D include/llvm/CodeGen/MachineFunctionAnalysis.h
U include/llvm/Function.h
U lib/Target/CellSPU/SPUISelDAGToDAG.cpp
U lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/MachineVerifier.cpp
U lib/CodeGen/MachineFunction.cpp
U lib/CodeGen/PrologEpilogInserter.cpp
U lib/CodeGen/MachineLoopInfo.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
D lib/CodeGen/MachineFunctionAnalysis.cpp
D lib/CodeGen/MachineFunctionPass.cpp
U lib/CodeGen/LiveVariables.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77661 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 03:02:41 +00:00
Daniel Dunbar
a027d222e1
llvm-mc: Match a few X86 instructions.
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- This is "experimental" code, I am feeling my way around and working out the
best way to do things (and learning tblgen in the process). Comments welcome,
but keep in mind this stuff will change radically.
- This is enough to match "subb" and friends, but not much else. The next step is to
automatically generate the matchers for individual operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77657 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 02:32:59 +00:00
Dan Gohman
933c762371
Manage MachineFunctions with an analysis Pass instead of the Annotable
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mechanism. To support this, make MachineFunctionPass a little more
complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77654 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 01:52:50 +00:00
Evan Cheng
ee42fd309e
When fp is not eliminated, instructions with T2_i12 modes will be changed to T2_i8 ones. Take that into consideration when determining stack size limit for reserving register scavenging slot.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77642 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 23:29:25 +00:00
David Goodwin
07337c0fcf
Remove redundant match for frame index from imm8 addrmode, it is handled by the imm12 addrmode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77632 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 22:45:52 +00:00
David Goodwin
8f65253236
Darwin assembler now recognizes "orn", so remove workaround.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77627 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 21:51:41 +00:00
David Goodwin
7c92f3ac99
Darwin assembler now supports "rrx", so remove workaround.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77625 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 21:38:40 +00:00
David Goodwin
d8c95b5ac2
Cleanup and include code selection for some frame index cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 18:56:48 +00:00
David Goodwin
3e4b22d983
Add missing D* register clobbers for Thumb-2 call.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77611 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 18:01:09 +00:00
Dan Gohman
524dab14f4
Minor whitespace tidiness.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77602 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 17:04:07 +00:00