Chris Lattner
26b0000166
manually upgrade a bunch of tests to modern syntax, and remove some that
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are either unreduced or only test old syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133228 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 03:14:27 +00:00
Cameron Zwarich
cd4e0b593d
Update an insertion point iterator after replacing a return instruction with a
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tail call pseudoinstruction. This fixes <rdar://problem/9624333>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133227 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 02:16:43 +00:00
Jakob Stoklund Olesen
e1fd84af7a
Explicitly invoke ArrayRef constructor to keep gcc happy.
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Patch by Richard Smith!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133220 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 00:18:25 +00:00
Jakob Stoklund Olesen
dd5a847152
Rename TRI::getAllocationOrder() to getRawAllocationOrder().
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Also switch the return type to ArrayRef<unsigned> which works out nicely
for ARM's implementation of this function because of the clever ArrayRef
constructors.
The name change indicates that the returned allocation order may contain
reserved registers as has been the case for a while.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133216 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 23:31:16 +00:00
Jakob Stoklund Olesen
c02a6fa7d8
Don't use register classes larger than TLI->getRegClassFor(VT).
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In Thumb mode we cannot handle GPR virtual registers, even though some
instructions can. When isel is lowering a CopyFromReg, it should limit
itself to subclasses of getRegClassFor(VT).
<rdar://problem/9624323>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133210 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 22:50:38 +00:00
Daniel Dunbar
ed344d2e68
Regenerate configure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133207 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 22:30:41 +00:00
Daniel Dunbar
e2a91a76df
build/configure: Add support for --with-extra-ld-options flag (to provide extra
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options just to pass to ld).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133206 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 22:30:38 +00:00
Andrew Trick
dc9c76aca6
Added LLVM_BUILD_MODE to cmake so that lit supports tests with REQUIRES: {buildmode}.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133205 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 22:19:20 +00:00
Jakob Stoklund Olesen
fa796dd720
Teach antidependency breakers to use RegisterClassInfo.
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No functional change was intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133202 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 21:56:21 +00:00
Chris Lattner
354eee7c8a
forward declare GraphTraits in Type.h instead of #includ'ing it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133201 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 21:49:23 +00:00
Andrew Trick
c86f24c296
cmake may require LIT_TOOLS_DIR.
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Reviewed by chapuni. Sorry for breaking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133200 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 21:48:57 +00:00
Chris Lattner
1d0a815ee4
change Type.h to forward declare ArrayRef instead of #including it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 21:37:15 +00:00
Chris Lattner
e817127e0a
add some #includes that will soon be needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133195 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 21:36:36 +00:00
Chris Lattner
b9a7187f4b
prune #includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 21:27:52 +00:00
Chris Lattner
6091eb9d7f
move the address space into the subclass data field, saving a word on PointerType.
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This limits the # address spaces to 2^23, which should be good enough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133192 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 21:17:17 +00:00
Chris Lattner
e43d745b5c
tidy up some comments, store the 'isvararg' bit for FunctionType in
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the SubclassData field, saving a word.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133191 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 21:08:21 +00:00
Chris Lattner
ae5a0b5378
remove Type::getVAArgsPromotedType, which is dead, and tidy up a bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133190 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 21:00:43 +00:00
Nick Lewycky
d61f84ee65
There's no need to be so picky about the particular register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 21:00:00 +00:00
Dan Gohman
0860d0ba2f
Fix ARCOpt to insert releases on both successors of an invoke rather
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than trying to insert them immediately after the invoke.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133188 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 20:57:14 +00:00
Jakob Stoklund Olesen
714c0eb811
Move PBQP off allocation_order_begin. No functional change intended.
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I think PBQP could use RegisterClassInfo, but it didn't fit neatly with
the external interfaces that PBQP uses, so I'll leave that to Lang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133186 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 20:37:45 +00:00
Jakub Staszak
7cc2b07437
Introduce MachineBranchProbabilityInfo class, which has similar API to
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BranchProbabilityInfo (expect setEdgeWeight which is not available here).
Branch Weights are kept in MachineBasicBlocks. To turn off this analysis
set -use-mbpi=false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133184 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 20:22:37 +00:00
Owen Anderson
1300f3019e
Change the REG_SEQUENCE SDNode to take an explict register class ID as its first operand. This operand is lowered away by the time we reach MachineInstrs, so the actual register-allocation handling of them doesn't need to change.
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This is intended to support using REG_SEQUENCE SDNode's with type MVT::untyped, and is part of the long road to eliminating some of the hacks we currently use to support register pairs and other strange constraints, particularly on ARM NEON.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133178 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 18:17:13 +00:00
Jakob Stoklund Olesen
43641a5d17
Switch linear scan to using RegisterClassInfo.
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This avoids the manual filtering of reserved registers and removes the
dependency on allocation_order_begin().
Palliative care...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133177 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 18:17:00 +00:00
Galina Kistanova
240aa60665
Move test for appropriate directory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 18:13:57 +00:00
Bruno Cardoso Lopes
c75448c740
Mark ldrexd/strexd w/ volatile memory by default
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 18:11:32 +00:00
Jakub Staszak
12af5ff720
Test commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133174 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 18:01:17 +00:00
Justin Holewinski
e0aef2de81
PTX: Finish new calling convention implementation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 17:50:00 +00:00
Justin Holewinski
1b91bcddd5
PTX: Rename register classes for readability and combine int and fp registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133171 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 17:49:58 +00:00
Jakob Stoklund Olesen
79c890f64f
Add TargetRegisterInfo::getRawAllocationOrder().
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This virtual function will replace allocation_order_begin/end as the one
to override when implementing custom allocation orders. It is simpler to
have one function return an ArrayRef than having two virtual functions
computing different ends of the same array.
Use getRawAllocationOrder() in place of allocation_order_begin() where
it makes sense, but leave some clients that look like they really want
the filtered allocation orders from RegisterClassInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 17:42:25 +00:00
Nick Lewycky
1e85ef645d
Add testcase for r133050 which added support for printing and parsing escaped
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names for named metadata nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133166 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 17:14:38 +00:00
Owen Anderson
23b0766b47
Fix formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133164 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 16:52:24 +00:00
Dan Gohman
129bd56eeb
Document nonlazybind.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133160 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 16:03:13 +00:00
Dan Gohman
a0697a7ef5
Add a comment describing why transforming (shl x, 1) to (add x, x) is to be
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considered safe enough in this context.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133159 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 15:55:48 +00:00
Justin Holewinski
ec3141b27f
PTX: Fix whitespace errors
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133158 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 15:17:11 +00:00
Bruno Cardoso Lopes
d381a7a91e
Add AVX suport for fpextend.
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Original patch by Syoyo Fujita with more comments by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133153 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 07:03:21 +00:00
Jakob Stoklund Olesen
2559011a01
Prempt some obnoxious compiler from complaing about signed/unsigned
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compares.
2^30 is actually the limit on the number of physical registers per
TargetRegisterInfo.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133142 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 03:07:40 +00:00
Jakob Stoklund Olesen
0cc0929efc
Make sure to pass an unsigned to a printf format that is always %u.
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This should unbreak the native ARM testers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133141 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 02:55:56 +00:00
Eli Friedman
e8e1e4444b
FileCheck-ize test, and make it work on EABI hosts, like clang-native-arm-cortex-a9.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133139 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 02:36:32 +00:00
Eli Friedman
33b4f725ea
Force a triple here so this test doesn't fail on EABI hosts (like clang-native-arm-cortex-a9).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133134 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:49:31 +00:00
Nick Lewycky
3cae396e03
Commit the right set of tests for r133124. Sorry 'bout that!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133133 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:35:45 +00:00
Andrew Trick
9b91a88f1d
Reenabling this test with REQUIRES: Asserts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133132 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:34:41 +00:00
Andrew Trick
05c087d893
Add support to lit for build mode requirements. e.g.
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REQUIRES: Asserts
REQUIRES: Debug
This required chaining test configuration properties. It seems like a
generally good thing to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133131 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:33:35 +00:00
Chad Rosier
6fce128dd1
Typos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:24:24 +00:00
Chad Rosier
689edc8b28
Revision r128665 added an optimization to make use of NEON multiplier
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accumulator forwarding. Specifically (from SVN log entry):
Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier
accumulator forwarding:
vadd d3, d0, d1
vmul d3, d3, d2
=>
vmul d3, d0, d2
vmla d3, d1, d2
Make sure it catches cases where operand 1 is add/fadd/sub/fsub, which was
intended in the original revision.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:21:54 +00:00
Nick Lewycky
c06b5bf340
Add a DAGCombine for (ext (binop (load x), cst)).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:15:49 +00:00
Bruno Cardoso Lopes
e0b5cfcae8
Silence warnings in non assert builds. Patch by David Blaikie
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133118 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 00:40:02 +00:00
Anna Zaks
589badd863
Rename the test. Thanks Cameron! Use shorter/generic names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 00:34:10 +00:00
Anna Zaks
3c397eb741
Function::getNumBlockIDs() should be used instead of Function::size() to set the upper limit on the block IDs since basic blocks might get removed (simplified away) after being initially numbered. Plus the test case, in which SelectionDAGBuilder::visitBr() calls llvm::MachineFunction::removeFromMBBNumbering(), which introduces the hole in numbering leading to an assert in llc (prior to the fix).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 00:03:21 +00:00
Eli Friedman
992205ac71
Add a limit to the number of instructions memdep will scan in a single block. This prevents (at least in some cases) O(N^2) runtime in passes like DSE.
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The limit in this patch is probably too high, but it is enough to stop DSE from going completely insane on a testcase I have (which has a single block with around 50,000 non-aliasing stores in it).
rdar://9471075
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:59:25 +00:00
John McCall
9fbd318d36
The ARC language-specific optimizer. Credit to Dan Gohman.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:37:01 +00:00