Chris Lattner
9b527704f7
Add an option to enable the SSA based peephole optimizer.
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Eventually this pass will provide substantially better code in the interim between when we
have a crappy isel and nice isel. Unfortunately doing so requires fixing the backend to
actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE
pass for machine code. Each of these is a fairly substantial job, so this will remain disabled
for the immediate future. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10276 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-01 05:18:30 +00:00
Brian Gaeke
d0fde30ce8
Put all LLVM code into the llvm namespace, as per bug 109.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
2003-11-11 22:41:34 +00:00
John Criswell
856ba76200
Added LLVM copyright header.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9321 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-21 15:17:13 +00:00
Brian Gaeke
9826bdb7d8
Factory methods for FunctionPasses now return type FunctionPass *.
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Correct one of the functions' comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7816 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-13 18:15:29 +00:00
Chris Lattner
ac0c8680ad
Add support for a pattern matching instruction selector. This is still in
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the early implementation phases, so it is disabled by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7719 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-11 14:59:22 +00:00
Chris Lattner
8d44ba8c5c
Start using tablegen'd instruction enum list
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7542 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-03 21:57:05 +00:00
Chris Lattner
832003578e
Switch over to tablegen generated header files
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7512 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-03 15:48:55 +00:00
Chris Lattner
d281de2181
Rename function to be more consistent with filename
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7352 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-26 23:49:58 +00:00
Brian Gaeke
de420aee32
Printer.cpp: Ditch addRequired/getAnalysis, because they leave
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Printer::doFinalization() out in the cold. Now we pass in a TargetMachine
to Printer's constructor and get the TargetData from the TargetMachine.
Don't pass TargetMachine or MRegisterInfo objects around in the Printer.
Constify TargetData references.
X86.h: Update comment and prototype of createX86CodePrinterPass().
X86TargetMachine.cpp: Update callers of createX86CodePrinterPass().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7275 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-23 20:25:08 +00:00
Chris Lattner
ff3261ae86
Add namespace comments for doxygen
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6581 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 15:31:23 +00:00
Chris Lattner
31ad5dd67f
Move passes out to Passes.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5227 91177308-0d34-0410-b5e6-96231b3b80d8
2003-01-13 00:45:29 +00:00
Chris Lattner
f2ab4124e3
* Most pass ctor functions don't take TM arguments anymore
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* New createPrologEpilogCodeInserter() function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5181 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-28 20:26:16 +00:00
Chris Lattner
92aec04cd6
Try #2 to get alias set stuff to work
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5077 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-16 16:14:51 +00:00
Chris Lattner
c2fc7ea60b
Add info about register aliases, add prototype for createLocalRegisterAllocator
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5075 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-16 15:55:51 +00:00
Chris Lattner
1a45626c4c
Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5071 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-16 14:38:13 +00:00
Chris Lattner
4ce42a776a
* Move information about Implicit Defs/Uses into X86InstrInfo.def.
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* Expose information about implicit defs/uses of register through the
MachineInstrInfo.h file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4877 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 05:42:53 +00:00
Chris Lattner
6aab9cf65c
Start to add more information to instr.def
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4741 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 05:37:11 +00:00
Chris Lattner
b4f68ed32e
Convert backend to use passes, implement X86TargetMachine
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4421 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29 22:37:54 +00:00
Chris Lattner
055c965bff
Rename X86InstructionInfo to X86InstrInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4413 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29 21:05:24 +00:00
Chris Lattner
a535fabe7d
Be compatible with sparc backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4395 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29 17:43:38 +00:00
Chris Lattner
75276f150e
Initial stab at MachineInstr'ication
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4367 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-28 23:55:19 +00:00
Chris Lattner
726140821f
Initial checkin of X86 backend.
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We can instruction select exactly one instruction 'ret void'. Wow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4284 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-25 22:55:53 +00:00