Commit Graph

59 Commits

Author SHA1 Message Date
f22fd3f7b5 Use SmallVectorImpl instead of SmallVector for iterators and references to avoid specifying the vector size unnecessarily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185512 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-03 05:11:49 +00:00
838038d3e1 Scheduler diagnostics. Print the register name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176316 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 00:19:14 +00:00
bf32b7f844 Instructions schedulers should report correct height/depth.
We avoided computing DAG height/depth during Node printing because it
shouldn't depend on an otherwise valid DAG. But this has become far
too annoying for the common case of a valid DAG where we want to see
valid values. If doing the computation on-the-fly turns out to be a
problem in practice, then I'll add a mode to the diagnostics to only
force it when we're likely to have a valid DAG, otherwise explicitly
print INVALID instead of bogus numbers. For now, just go for it all
the time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176314 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 00:19:09 +00:00
81474e98e1 Replace loop with std::find.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175366 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-16 17:06:32 +00:00
66658dd9a1 MIsched: Added biasCriticalPath.
Allow schedulers to order DAG edges by critical path. This makes
DFS-based heuristics more stable and effective.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173317 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-24 02:09:55 +00:00
d04a8d4b33 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 16:50:05 +00:00
cf6b6131dd misched: Don't consider artificial edges weak edges.
For now be more conservative in case other out-of-tree schedulers rely
on the old behavior of artificial edges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167808 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 02:35:06 +00:00
ae692f2bae misched: Infrastructure for weak DAG edges.
This adds support for weak DAG edges to the general scheduling
infrastructure in preparation for MachineScheduler support for
heuristics based on weak edges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167738 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12 19:28:57 +00:00
b720be6a50 Release build: guard dump functions with
"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)"

No functional change. Update r163339.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163653 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11 22:23:19 +00:00
77e300e8f0 Release build: guard dump functions with "ifndef NDEBUG"
No functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163339 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 19:06:06 +00:00
9df55eed04 sched: Avoid trivially redundant DAG edges. Take the one with higher latency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158379 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13 02:39:00 +00:00
47c144505b misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles.
ScheduleDAG is responsible for the DAG: SUnits and SDeps. It provides target hooks for latency computation.

ScheduleDAGInstrs extends ScheduleDAG and defines the current scheduling region in terms of MachineInstr iterators. It has access to the target's scheduling itinerary data. ScheduleDAGInstrs provides the logic for building the ScheduleDAG for the sequence of MachineInstrs in the current region. Target's can implement highly custom schedulers by extending this class.

ScheduleDAGPostRATDList provides the driver and diagnostics for current postRA scheduling. It maintains a current Sequence of scheduled machine instructions and logic for splicing them into the block. During scheduling, it uses the ScheduleHazardRecognizer provided by the target.

Specific changes:
- Removed driver code from ScheduleDAG. clearDAG is the only interface needed.

- Added enterRegion/exitRegion hooks to ScheduleDAGInstrs to delimit the scope of each scheduling region and associated DAG. They should be used to setup and cleanup any region-specific state in addition to the DAG itself. This is necessary because we reuse the same ScheduleDAG object for the entire function. The target may extend these hooks to do things at regions boundaries, like bundle terminators. The hooks are called even if we decide not to schedule the region. So all instructions in a block are "covered" by these calls.

- Added ScheduleDAGInstrs::begin()/end() public API.

- Moved Sequence into the driver layer, which is specific to the scheduling algorithm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152208 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07 05:21:52 +00:00
73ba69b684 misched preparation: modularize schedule printing.
ScheduleDAG will not refer to the scheduled instruction sequence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152205 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07 05:21:40 +00:00
4c72720427 misched preparation: modularize schedule verification.
ScheduleDAG will not refer to the scheduled instruction sequence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152204 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07 05:21:36 +00:00
0b923d9ee9 Don't print out pointer values in SUnit::dump().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150842 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-17 21:44:51 +00:00
3c58ba8ea7 misched: Initial code for building an MI level scheduling DAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148174 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 02:17:18 +00:00
2d24e2a396 Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146960 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 02:50:00 +00:00
a67f14bf53 Make a bunch of symbols private.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138025 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 01:42:18 +00:00
1f6a329f79 Silence a bunch (but not all) "variable written but not read" warnings
when building with assertions disabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137460 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 14:54:45 +00:00
e837dead3c - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 19:10:37 +00:00
4cb971ce1c Added -stress-sched flag in the Asserts build.
Added a test case for handling physreg aliases during pre-RA-sched.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 17:16:12 +00:00
7a2bdde0a0 Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 05:18:47 +00:00
92e946630d Introducing a new method of tracking register pressure. We can't
precisely track pressure on a selection DAG, but we can at least keep
it balanced. This design accounts for various interesting aspects of
selection DAGS: register and subregister copies, glued nodes, dead
nodes, unused registers, etc.

Added SUnit::NumRegDefsLeft and ScheduleDAGSDNodes::RegDefIter.

Note: I disabled PrescheduleNodesWithMultipleUses when register
pressure is enabled, based on no evidence other than I don't think it
makes sense to have both enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-04 03:18:17 +00:00
24312230ad Fix a few cases where the scheduler is not checking for phys reg copies. The scheduling node may have a NULL DAG node, yuck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122544 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 06:46:50 +00:00
2da8bc8a5f Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.

Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.

Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.

Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.

ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.

ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 05:03:26 +00:00
5078293cc2 reduce indentation, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122208 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 00:50:16 +00:00
9f71f801b5 Remove trailing whitespace, no functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107244 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 03:40:54 +00:00
bae5210321 Remove unused member variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103936 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 09:47:55 +00:00
5c982949bf Delete an unused member variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101143 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 16:51:39 +00:00
4b134d1661 Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92585 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:25:41 +00:00
557bbe6b5d Remove some old experimental code that is no longer needed. Remove additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89471 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 19:32:48 +00:00
12dd99dc30 Rename registers to break output dependencies in addition to anti-dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87015 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 19:08:21 +00:00
4de099d8ca Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85939 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 20:57:50 +00:00
c277ab08a2 Fix integer overflow in instruction scheduling. This can happen if we have
basic blocks that are so long that their size overflows a short.

Also assert that overflow does not happen in the future, as requested by Evan.

This fixes PR4401.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83159 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30 20:15:38 +00:00
960bb85b21 Convert DOUT to DEBUG(errs()...).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79760 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-22 20:41:06 +00:00
c93d8373c9 Add some debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78687 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 17:35:23 +00:00
3f0e83067d Move to raw_ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76963 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 09:53:24 +00:00
47ac0f0c7c When scheduling a block in parts, keep track of the overall
instruction index across each part. Instruction indices are used
to make live range queries, and live ranges can extend beyond
scheduling region boundaries.

Refactor the ScheduleDAGSDNodes class some more so that it
doesn't have to worry about this additional information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64288 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-11 04:27:20 +00:00
5cffa6fe27 Use iterators to iterate through the Preds array instead of
an index. This code is on the hot-path because the current
way SDep edges are uniqued has quadratic complexity.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64262 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-11 00:12:28 +00:00
9e64bbb322 Factor out more code for computing register live-range informationfor
scheduling, and generalize is so that preserves state across
scheduling regions. This fixes incorrect live-range information around
terminators and labels, which are effective region boundaries.

In place of looking for terminators to anchor inter-block dependencies,
introduce special entry and exit scheduling units for this purpose.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64254 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-10 23:27:53 +00:00
f7119393a9 Instead of adding dependence edges between terminator instructions
and every other instruction in their blocks to keep the terminator
instructions at the end, teach the post-RA scheduler how to operate
on ranges of instructions, and exclude terminators from the range
of instructions that get scheduled.

Also, exclude mid-block labels, such as EH_LABEL instructions, and
schedule code before them separately from code after them. This
fixes problems with the post-RA scheduler moving code past
EH_LABELs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 22:10:20 +00:00
fc54c55296 Generalize the HazardRecognizer interface so that it can be used
to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62284 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 22:18:12 +00:00
79ce276083 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.

To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 19:20:50 +00:00
a1f50e2c2c Avoid referring to edge D after the Succs or Preds arrays have
been modified, to avoid trouble in the (unlikely) scenario that
D is a reference to an element in one of those arrays.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62173 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 19:08:45 +00:00
a80c859df3 Don't call setDepthDirty/setHeightDirty when adding an edge
with latency 0, since it doesn't affect the depth or height.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61762 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 22:40:26 +00:00
1578f8486d Minor code simplifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61371 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 17:22:32 +00:00
8044e9b3af Optimize setDepthDirty and setHeightDirty a little, as they showed
up on a profile.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-22 21:11:33 +00:00
e19c6362d2 Use SmallVector's pop_back_val.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61277 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-20 16:42:33 +00:00
f89e6e6577 Use the correct Preds and Succs lists in setHeightDirty()
and setDepthDirty(), respectively. This fixes PR3241.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61276 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-20 16:34:57 +00:00
fccf6dd377 Use getDepth() and getHeight() instead of accessing the
Depth and Height members directly, as they may not be
current.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61121 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-17 04:25:52 +00:00