Evan Cheng
14b4c03580
Add more fused mul+add/sub patterns. rdar://10139676
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154484 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 06:59:47 +00:00
Evan Cheng
bee78fe5fc
Clean up ARM fused multiply + add/sub support some more: rename some isel
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predicates.
Also remove NEON2 since it's not really useful and it is confusing. If
NEON + VFP4 implies NEON2 but NEON2 doesn't imply NEON + VFP4, what does it
really mean?
rdar://10139676
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154480 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 05:33:07 +00:00
Evan Cheng
92c904539a
Match (fneg (fma) to vfnma. rdar://10139676
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154469 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 01:21:25 +00:00
Evan Cheng
3aef2ff514
Handle llvm.fma.* intrinsics. rdar://10914096
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154439 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 21:40:28 +00:00
Jim Grosbach
66cba302f0
ARM divided syntax fmrx/fmxr mnemonics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152946 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16 21:06:13 +00:00
Jim Grosbach
9426ac7b57
ARM vmrs system registers mvfr0 and mvfr1 handling.
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rdar://11058464
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152881 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16 00:27:18 +00:00
Jim Grosbach
b84ad4aa7d
ARM case-insensitive checking for APSR_nzcv.
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rdar://11056591
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152846 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15 21:34:14 +00:00
Jim Grosbach
6357caec78
ARM aliases for pre-unified syntax fcmpz[sd] mnemonics.
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rdar://11056647
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152834 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15 20:48:18 +00:00
Kristof Beyls
8a6bcc3722
Fix VCVT decoding (between floating-point and fixed-point, Floating-point). Patch by Richard Barton.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152814 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15 17:50:29 +00:00
Lang Hames
4f92b5e616
Split fpscr into two registers: FPSCR and FPSCR_NZCV.
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The fpscr register contains both flags (set by FP operations/comparisons) and
control bits. The control bits (FPSCR) should be reserved, since they're always
available and needn't be defined before use. The flag bits (FPSCR_NZCV) should
like to be unreserved so they can be hoisted by MachineCSE. This fixes PR12165.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152076 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-06 00:19:55 +00:00
Jim Grosbach
bc978a60d9
ARM vpush/vpop assembler mnemonics accept an optional size suffix.
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rdar://10988114
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152068 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05 23:16:31 +00:00
Sebastian Pop
74bebde7c4
updated patch for the ARM fused multiply add/sub
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In this update:
- I assumed neon2 does not imply vfpv4, but neon and vfpv4 imply neon2.
- I kept setting .fpu=neon-vfpv4 code attribute because that is what the
assembler understands.
Patch by Ana Pazos <apazos@codeaurora.org>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152036 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05 17:39:52 +00:00
Jia Liu
31d157ae1a
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-18 12:03:15 +00:00
Anton Korobeynikov
4b4e62219b
Add fused multiple+add instructions from VFPv4.
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Patch by Ana Pazos!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148658 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-22 12:07:33 +00:00
Jim Grosbach
4050bc4cab
ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).
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rdar://10558523
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-22 22:19:05 +00:00
Jim Grosbach
8c748113eb
Remove some bogus comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147169 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-22 19:45:01 +00:00
Jim Grosbach
1aa149f5ac
ARM pre-UAL aliases. fcmp[sd].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147158 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-22 19:20:45 +00:00
Jim Grosbach
af33a0cfe0
ARM VFP optional data type on VMOV GPR<-->SPR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147104 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-21 23:24:15 +00:00
Jim Grosbach
6849019079
ARM VFP pre-UAL mnemonic aliases for fmul[sd].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146892 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 19:43:50 +00:00
Jim Grosbach
9c39789c36
ARM VFP pre-UAL mnemonic aliases for fcpy[sd] and fdiv[sd].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146887 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 19:02:41 +00:00
Jim Grosbach
0f293de207
ARM NEON two-operand aliases for VQDMULH.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146514 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 20:40:37 +00:00
Jim Grosbach
f10154010e
ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146508 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 20:13:48 +00:00
Jim Grosbach
485d8bf7e5
ARM add more 'gas' compatibility aliases for NEON instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146507 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 20:08:32 +00:00
Jim Grosbach
48171e7fbe
ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146300 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 00:01:02 +00:00
Jim Grosbach
21d7fb814a
ARM add some pre-UAL VFP mnemonics for convenience when porting old code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146296 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 23:34:09 +00:00
Jim Grosbach
976c0da213
ARM convenience aliases for VSQRT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146201 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 22:51:25 +00:00
Jim Grosbach
8254f02231
ARM VFP support 'fmrs/fmsr' aliases for 'vldr'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 00:52:55 +00:00
Jim Grosbach
67ca1adf82
ARM VFP support 'flds/fldd' aliases for 'vldr'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 00:49:29 +00:00
Jim Grosbach
1ceef1a491
ARM tidy up and remove no longer needed InstAlias definitions.
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The TokenAlias handling of data type suffices renders these unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 01:50:36 +00:00
Jim Grosbach
88d012a9c3
ARM VFP assembly parsing for VADD and VSUB two-operand forms.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144710 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:15:10 +00:00
Jim Grosbach
eaf2056709
ARM size suffix on VFP single-precision 'vmov' is optional.
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rdar://10435114
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144698 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 21:18:35 +00:00
Jim Grosbach
a68e90c36e
ARM assembly parsing for optional datatype suffix on VFP VMOV GPR<->VFP insns.
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Yet more of rdar://10435076.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144691 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 20:29:42 +00:00
Jim Grosbach
bfb0a1717b
ARM assembly parsing for two-operand form of 'mul' instruction.
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rdar://10449856.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 20:14:51 +00:00
Jim Grosbach
ffc658b056
ARM VLDR/VSTR instructions don't need a size suffix.
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Canonicallize on the non-suffixed form, but continue to accept assembly that
has any correctly sized type suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144583 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 23:03:21 +00:00
Jim Grosbach
02e3d9268f
ARM assembly parsing type suffix options for VLDR/VSTR.
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rdar://10435076
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144575 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 22:28:39 +00:00
Jim Grosbach
c7352f8ca0
ARM optional size suffix for VLDR/VSTR syntax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 23:34:43 +00:00
Jim Grosbach
9d39036f62
ARM assembly parsing and encoding for VMOV immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 23:38:36 +00:00
Jim Grosbach
5cd5ac6ad4
ARM assembly parsing and encoding for VMRS/FMSTAT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141025 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 21:12:43 +00:00
Jim Grosbach
4ebbf7b8a8
ARM fix encoding of VMOV.f32 and VMOV.f64 immediates.
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Encode the immediate into its 8-bit form as part of isel rather than later,
which simplifies things for mapping the encoding bits, allows the removal
of the custom disassembler decoding hook, makes the operand printer trivial,
and prepares things more cleanly for handling these in the asm parser.
rdar://10211428
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140834 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 00:50:06 +00:00
Owen Anderson
694e0ffb8a
Add missing encoding information for some of the GPR<->FP register moves.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138780 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:15:25 +00:00
Owen Anderson
838130e3b9
Provide operand encoding information for half-precision VCVT instructions. Found by randomized testing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138273 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 21:34:00 +00:00
Owen Anderson
357ec6850b
Fix decoding of VMOVSRR and VMOVRRS, which account for the overwhelming majority of decoder crashes detected by randomized testing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138269 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 20:27:12 +00:00
Owen Anderson
96279d0eff
Fix the broken encodings for the VFP vmov.f32 and vmov.f64 instructions, as well as the comments that explain them incorrectly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136707 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-02 18:30:00 +00:00
Owen Anderson
16884415db
Add a target-indepedent entry to MCInstrDesc to describe the encoded size of an opcode. Switch ARM over to using that rather than its own special MCInstrDesc bits.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13 23:22:26 +00:00
Cameron Zwarich
375db7f39a
The VMLA instruction and its friends are not actually fused; they're plain old
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multiply-accumulate instructions with separate rounding steps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134609 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 08:28:52 +00:00
Jim Grosbach
0d06bb9548
ARM assembler support for vpush/vpop.
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Add aliases for the vpush/vpop mnemonics to the VFP load/store multiple
writeback instructions w/ SP as the base pointer.
rdar://9683231
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133932 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 20:00:07 +00:00
Jim Grosbach
f921c0fe34
Clean up a few 80 column violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132946 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-13 22:54:22 +00:00
Bob Wilson
b34d837397
Some single-precision VFP instructions can execute in either the VPF or Neon
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pipelines, at least on Cortex-A9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129771 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19 18:11:38 +00:00
Owen Anderson
848b0c39b1
Get rid of the non-writeback versions VLDMDB and VSTMDB, which don't actually exist.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128461 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 16:45:53 +00:00
Jim Grosbach
f219f3135d
Pseudo-ize VMOVDcc and VMOVScc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127506 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11 23:09:50 +00:00