pair. This encourages MorphNodeTo formation, this gets us 200
more MorphNodeTo's on X86 and shrinks the table a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97434 91177308-0d34-0410-b5e6-96231b3b80d8
so that we get grouping at the top level.
Add an optimization to reorder type check & record nodes
after opcode checks. We prefer to expose tree shape
matching which improves grouping and will enhance the next
optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97432 91177308-0d34-0410-b5e6-96231b3b80d8
dispatcher method. This eliminates the dependence of the new isel's
generated code on the old isel's predicates, however some random
hand written isel code still uses them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97431 91177308-0d34-0410-b5e6-96231b3b80d8
specifies whether there is an output flag or not. Use this
instead of redundantly encoding the chain/flag results in the
output vtlist.
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even some the old isel didn't. There are several parts of
this that make me feel dirty, but it's no worse than the
old isel. I'll clean up the parts I can do without ripping
out the old one next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97415 91177308-0d34-0410-b5e6-96231b3b80d8
node is always guaranteed to have a particular type
instead of hacking in ISD::STORE explicitly. This allows
us to use implied types for a broad range of nodes, even
target specific ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97355 91177308-0d34-0410-b5e6-96231b3b80d8
with getType() == MVT::i32 etc. Teach it that two different
integer constants are contradictory. This cuts 1K off the X86
table, down to 98k
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97314 91177308-0d34-0410-b5e6-96231b3b80d8
predicates. For example if we have:
Scope:
CheckType i32
ABC
CheckType f32
DEF
CheckType i32
GHI
Then we know that we can transform this into:
Scope:
CheckType i32
Scope
ABC
GHI
CheckType f32
DEF
This reorders the check for the 'GHI' predicate above
the check for the 'DEF' predidate. However it is safe to do this
in this situation because we know that a node cannot have both an
i32 and f32 type.
We're now doing more factoring that the old isel did.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97312 91177308-0d34-0410-b5e6-96231b3b80d8
as deeply into the pattern as we can get away with. In pratice, this
means "all the way to to the emitter code, but not across
ComplexPatterns". This substantially increases the amount of factoring
we get.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97305 91177308-0d34-0410-b5e6-96231b3b80d8
longer than 80 columns. This replaces the heavy-handed "textwidth"
mechanism, and makes the trailing-whitespace highlighting lazy so
that it isn't constantly jumping on the user during typing.
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gross little neighbor merging implementation. This one has
the benefit of not violating the ordering of patterns, so it
generates code that passes tests again.
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current design. This generates a matcher that successfully
runs, but it turns out that the factoring we're doing violates
the ordering of patterns, so we end up matching (e.g.) movups
where we want movaps. This won't due, but I'll address this in
a follow on patch. It's nice to not be on by default yet! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97215 91177308-0d34-0410-b5e6-96231b3b80d8
instead of to have a chained series of scope nodes. This makes
the generated table smaller, improves the efficiency of the
interpreter, and make the factoring optimization much more
reasonable to implement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97160 91177308-0d34-0410-b5e6-96231b3b80d8
splitting all the patterns under scope nodes into equality sets
based on their first node. The second step is to rewrite the
graph info a form that exposes the sharing. Before I do this,
I want to redesign the Scope node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97130 91177308-0d34-0410-b5e6-96231b3b80d8
reflect what it does. Switch the sense of the Next and the Check
arms to be more logical. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97093 91177308-0d34-0410-b5e6-96231b3b80d8
results. I'm checking this in before the shared library so that I can
tell if it breaks anything on its own.
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movechild/record -> recordchild/movechild and
movechild/moveparent -> noop xforms. This slightly shrinks the tables
(x86 to 117454) and enables adding future improvements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97051 91177308-0d34-0410-b5e6-96231b3b80d8
the old one around for comparative purposes: have the
ENABLE_NEW_ISEL #define (which is not enabled on mainline) stop
emitting the old isel at all, yay for build time win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97033 91177308-0d34-0410-b5e6-96231b3b80d8
the new isel: fold movechild+record+moveparent into a
single recordchild N node. This shrinks the X86 table
from 125443 to 117502 bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97031 91177308-0d34-0410-b5e6-96231b3b80d8
Also add an easy macro at the top of DAGISelEmitter.cpp to enable
it. Lets see if I can avoid accidentally turning it on :)
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internal nodes with flag results. Record these with a new
OPC_MarkFlagResults opcode and use this to update the interior
nodes' flag results properly. This fixes CodeGen/X86/i256-add.ll
with the new isel.
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Needed to correctly handle things like 'llvmc -framework Foo foo.o -framework
Bar bar.o' - before this commit all '-framework' options would've been grouped
together in the beginning.
Due to our dependence on CommandLine this turned out to be a giant hack; we will
migrate away from CommandLine eventually.
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input/output patterns have the same type. It turns out that
this triggers all the time because we don't infer types
between these boundaries. Until we do, don't turn this on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96905 91177308-0d34-0410-b5e6-96231b3b80d8
ridiculously ginormous patterns and need more than one byte
of displacement for encodings. This fixes CellSPU/fdiv.ll.
SPU is still doing something else ridiculous though.
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well as the operands produced when the pattern is matched. This
allows CheckSame to work correctly when matching replicated
names involving ComplexPatterns. This fixes a bunch of MSP430
failures, we're down to 13 failures, two of which are
due to a sched bug.
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sure to only run the complex pattern on nodes where the target opts in.
This patch only handles targets with one opcode specified so far, but
fixes 16 failures, only 34 left.
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result nodes correctly. Note that this includes a horrible hack
in DAGISelHeader which cannot be fixed reasonably without
eliminating (parallel) from input patterns. That, in turn,
can't be done until we support writing multiple result patterns
for the X86and_flag and related multiple-result nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96767 91177308-0d34-0410-b5e6-96231b3b80d8
With this, the matcher actually works reasonably well, but
crashes on larger examples in the scheduler.
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of the matched pattern to use the newly created node results. Onto
the "making it actually work" phase!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96724 91177308-0d34-0410-b5e6-96231b3b80d8
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
I'd like to eventually rip it out, but for now producing the
same selections as the old matcher is more important.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96458 91177308-0d34-0410-b5e6-96231b3b80d8
'ischaincompatible' when a pattern has more than one input chain. Need
to do some commenting and cleanup now that I understand how this works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96443 91177308-0d34-0410-b5e6-96231b3b80d8
into a roundss intrinsic, producing a cyclic dag. The root cause
of this is badness handling ComplexPattern nodes in the old dagisel
that I noticed through inspection. Eliminate a copy of the of the
code that handled ComplexPatterns by making EmitChildMatchCode call
into EmitMatchCode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96408 91177308-0d34-0410-b5e6-96231b3b80d8
use and only call IsProfitableToFold/IsLegalToFold on the load
being folded, like the old dagiselemitter does. This
substantially simplifies the code and improves opportunities for
sharing.
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with chains. On interior nodes that lead up to them, we just directly
check that there is a single use. This generates slightly more
efficient code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96366 91177308-0d34-0410-b5e6-96231b3b80d8
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.
This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96255 91177308-0d34-0410-b5e6-96231b3b80d8
produce a table based matcher instead of gobs of C++ Code.
Though it's not done yet, the shrinkage seems promising,
the table for the X86 ISel is 75K and still has a lot of
optimization to come (compare to the ~1.5M of .o generated
the old way, much of which will go away).
The code is currently disabled by default (the #if 0 in
DAGISelEmitter.cpp). When enabled it generates a dead
SelectCode2 function in the DAGISel Header which will
eventually replace SelectCode.
There is still a lot of stuff left to do, which are
documented with a trail of FIXMEs.
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that predated -fast-isel which attempted to speed up the dag pattern
matchers at -O0. Since fast-isel is around, this is basically
obsolete and removing it shrinks the generated dag isels.
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whose opcodes extend into the ModR/M field using the
Form field of the instruction rather than by special
casing each instruction. Commented out the special
casing of VMCALL, which is the first instruction to use
this special form. While I was in the neighborhood,
added a few comments for people modifying the Intel
disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96043 91177308-0d34-0410-b5e6-96231b3b80d8
matcher is now free of implicit operands!
- Still need to clean up the code now that we don't to worry about implicit
operands, and to make it a hard error if an instruction fails to specify all
of its operands for some reason.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95956 91177308-0d34-0410-b5e6-96231b3b80d8
operand into the CodeGenInstruction's list of operands,
which is useful for EDEmitter. (Still working on PR6219)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95759 91177308-0d34-0410-b5e6-96231b3b80d8
for representing constraint info semantically instead of
as a c expression that will be blatted out to the .inc
file. Fix X86RecognizableInstr to use this instead of
parsing C code :).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95753 91177308-0d34-0410-b5e6-96231b3b80d8
implementation. Also changed the constructor
so that it does not require a Record, making it
usable by the EDEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95715 91177308-0d34-0410-b5e6-96231b3b80d8
out of the AsmWriterEmitter. This patch does the physical
code movement, but leaves the implementation unchanged. I'll
make any changes necessary to generalize the code in a
separate patch.
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into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
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This time it's for real! I am going to hook this up in the frontends as well.
The inliner has some experimental heuristics for dealing with the inline hint.
When given a -respect-inlinehint option, functions marked with the inline
keyword are given a threshold just above the default for -O3.
We need some experiments to determine if that is the right thing to do.
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than DEBUG_VALUE :( ) into the target indep AsmPrinter.cpp
file. This allows elimination of the
NO_ASM_WRITER_BOILERPLATE hack among other things.
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is still deterministic even amongst ambiguous instructions (eventually ambiguous
match orders will be a hard error, but we aren't there yet).
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line. Turns out edit_distance can be slow if the string we are scanning for
happens to be quite large.
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Before:
<stdin>:94:1: note: possible intended match here
movsd 4096(%rsi), %xmm0
^
After:
<stdin>:94:2: note: possible intended match here
movsd 4096(%rsi), %xmm0
^
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be static. Also made it possible for clients to get it
and no other functions from ...GenAsmMatcher.inc by
defining REGISTERS_ONLY before including GenAsmMatcher.inc.
This sets the stage for target-specific lexers that can
identify registers and return AsmToken::Register as
appropriate.
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directory when building the llvmCore_Embedded project. Fix this by putting
the iPhone platform directory into DEST_DIR instead of DEST_ROOT. I also
noticed what appears to be an unintentional use of DEVELOPER_BIN instead of
DEVELOPER_DIR, so I fixed that and changed to use DEVELOPER_DIR in some places
that were hardcoded to "Developer". Finally, the other changes here allowed
some refactoring and simplification, which I have done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93878 91177308-0d34-0410-b5e6-96231b3b80d8
the new ParseInstruction method just parses and returns a list of
target operands. A new MatchInstruction interface is used to
turn the operand list into an MCInst.
This requires new/deleting all the operands, but it also gives
targets the ability to use polymorphic operands if they want to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93469 91177308-0d34-0410-b5e6-96231b3b80d8
- getToken is modeled after StringRef::split but it can split on multiple
separator chars and skips leading seperators.
- SplitString is a StringRef::split variant for more than 2 elements with the
same behaviour as getToken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93161 91177308-0d34-0410-b5e6-96231b3b80d8
memcpy, memset and other intrinsics that only access their arguments
to be readnone if the intrinsic's arguments all point to local memory.
This improves the testcase in the README to readonly, but it could in
theory be made readnone, however this would involve more sophisticated
analysis that looks through the memcpy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92829 91177308-0d34-0410-b5e6-96231b3b80d8
clear what information these functions are actually using.
This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92564 91177308-0d34-0410-b5e6-96231b3b80d8
Made LEA memory operands emit only 4 MCInst operands.
Made the scale operand equal 1 for instructions that have no
SIB byte.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91919 91177308-0d34-0410-b5e6-96231b3b80d8
incarnations), integrated into the MC framework.
The disassembler is table-driven, using a custom TableGen backend to
generate hierarchical tables optimized for fast decode. The disassembler
consumes MemoryObjects and produces arrays of MCInsts, adhering to the
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).
The disassembler is documented in detail in
- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)
You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets. Please let me know if you encounter any problems
with it.
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Checks that the code generated by 'tblgen --emit-llvmc' can be actually
compiled. Also fixes two bugs found in this way:
- forward_transformed_value didn't work with non-list arguments
- cl::ZeroOrOne is now called cl::Optional
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characters in them, in which case the grep will just return 'Binary file
matches' and the whole thing falls over.
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Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.
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good nearby fuzzy match. Frequently the input is nearly correct, and just
showing the user the a nearby sensible match is enough to diagnose the problem.
- The "fuzzyness" is pretty simple and arbitrary, but worked on my three test
cases. If you encounter problems, or places you think FileCheck should have
guessed but didn't, please add test cases to PR5239.
For example, previously FileCheck would report this:
--
t.cpp:21:55: error: expected string not found in input
// CHECK: define void @_Z2f25f2_s1([[i64_i64_ty]] %a0)
^
<stdin>:19:30: note: scanning from here
define void @_Z2f15f1_s1(%1) nounwind {
^
<stdin>:19:30: note: with variable "i64_i64_ty" equal to "%0"
--
and now it also reports this:
--
<stdin>:27:1: note: possible intended match here
define void @_Z2f25f2_s1(%0) nounwind {
^
--
which makes it clear that the CHECK just has an extra ' %a0' in it, without
having to check the input.
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