Use this information to avoid doing expensive interval intersections for
registers that could not possible be interesting. This speeds up linscan
on ia64 compiling kc++ in release mode from taking 7.82s to 4.8s(!), total
itanium llc time on this program is 27.3s now. This marginally speeds up
PPC and X86, but they appear to be limited by other parts of linscan, not
this code.
On this program, on itanium, live intervals now takes 41% of llc time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22986 91177308-0d34-0410-b5e6-96231b3b80d8
in the asmprinter. This changes the .td files to use lower case register names,
avoiding the need to do this call. This speeds up the asmprinter from 1.52s
to 1.06s on kc++ in a release build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22974 91177308-0d34-0410-b5e6-96231b3b80d8
number of regs (e.g. most riscs), many functions won't need to use callee
clobbered registers. Do a speculative check to see if we can get a free
register without processing the fixed list (which has all of these). This
saves a lot of time on machines with lots of callee clobbered regs (e.g.
ppc and itanium, also x86).
This reduces ppc llc compile time from 184s -> 172s on kc++. This is probably
worth FAR FAR more on itanium though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22972 91177308-0d34-0410-b5e6-96231b3b80d8
we spill out of the fast path. The scan of active_ and the calls to
updateSpillWeights don't need to happen unless a spill occurs. This reduces
debug llc time of kc++ with ppc from 187.3s to 183.2s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22971 91177308-0d34-0410-b5e6-96231b3b80d8
simplifies BRTWOWAY into BR if one of the results is a fall-through.
Unless I'm missing something, there is no reason to duplicate this
in the target-specific code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22952 91177308-0d34-0410-b5e6-96231b3b80d8
the old condition to a one bit value. The incoming value must have been
promoted, and the top bits are undefined. This causes us to generate:
_test:
rlwinm r2, r3, 0, 31, 31
li r3, 17
cmpwi cr0, r2, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r3, 1
.LBB_test_2: ;
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
for:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22947 91177308-0d34-0410-b5e6-96231b3b80d8
it in the block. This codegens:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
as:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
li r4, 1
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
or r2, r4, r4
.LBB_test_2: ;
or r3, r2, r2
blr
... which is one fewer instruction. The savings are more significant for
global address and constantfp nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22946 91177308-0d34-0410-b5e6-96231b3b80d8
This gets us this for the previous testcase:
_test:
lis r2, 0
ori r3, r2, 65535
blr
Note that we actually write to r3 (the return reg) correctly now :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22933 91177308-0d34-0410-b5e6-96231b3b80d8
temporary registers for things that define a register. This allows dag->dag
isel to compile this:
int %test() { ret int 65535 }
into:
_test:
lis r2, 0
ori r2, r2, 65535
blr
Next up, getting CopyFromReg to work, allowing arguments and cross-bb values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22932 91177308-0d34-0410-b5e6-96231b3b80d8
namespace instead of the reg class namespace. Update getRegClassForType()
to use modified names due to tblgen change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22923 91177308-0d34-0410-b5e6-96231b3b80d8
