Commit Graph

77 Commits

Author SHA1 Message Date
Richard Sandiford
af2a1bebfc [SystemZ] Tighten branch tests
After r182274, the branches in these tests must always be short.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182358 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-21 08:53:17 +00:00
Richard Sandiford
44b486ed78 [SystemZ] Add long branch pass
Before this change, the SystemZ backend would use BRCL for all branches
and only consider shortening them to BRC when generating an object file.
E.g. a branch on equal would use the JGE alias of BRCL in assembly output,
but might be shortened to the JE alias of BRC in ELF output.  This was
a useful first step, but it had two problems:

(1) The z assembler isn't traditionally supposed to perform branch shortening
    or branch relaxation.  We followed this rule by not relaxing branches
    in assembler input, but that meant that generating assembly code and
    then assembling it would not produce the same result as going directly
    to object code; the former would give long branches everywhere, whereas
    the latter would use short branches where possible.

(2) Other useful branches, like COMPARE AND BRANCH, do not have long forms.
    We would need to do something else before supporting them.

    (Although COMPARE AND BRANCH does not change the condition codes,
    the plan is to model COMPARE AND BRANCH as a CC-clobbering instruction
    during codegen, so that we can safely lower it to a separate compare
    and long branch where necessary.  This is not a valid transformation
    for the assembler proper to make.)

This patch therefore moves branch relaxation to a pre-emit pass.
For now, calls are still shortened from BRASL to BRAS by the assembler,
although this too is not really the traditional behaviour.

The first test takes about 1.5s to run, and there are likely to be
more tests in this vein once further branch types are added.  The feeling
on IRC was that 1.5s is a bit much for a single test, so I've restricted
it to SystemZ hosts for now.

The patch exposes (and fixes) some typos in the main CodeGen/SystemZ tests.
A later patch will remove the {{g}}s from that directory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182274 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-20 14:23:08 +00:00
Richard Sandiford
ddbf053a4c [SystemZ] Make use of SUBTRACT HALFWORD
Thanks to Ulrich Weigand for noticing that this instruction was missing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181893 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-15 15:05:29 +00:00
Ulrich Weigand
b503b49b51 [SystemZ] Add CodeGen test cases
This adds all CodeGen tests for the SystemZ target.

This version of the patch incorporates feedback from a review by
Sean Silva.  Thanks to all reviewers!

Patch by Richard Sandiford.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06 16:17:29 +00:00
Dan Gohman
29074ccf6c Remove the SystemZ backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142878 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 23:48:32 +00:00
Chris Lattner
26b0000166 manually upgrade a bunch of tests to modern syntax, and remove some that
are either unreduced or only test old syntax.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133228 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 03:14:27 +00:00
Jakob Stoklund Olesen
b79e30cc9e Remove custom allocation orders in SystemZ.
Note that this actually changes code generation, and someone who
understands this target better should check the changes.

- R12Q is now allocatable. I think it was omitted from the allocation
  order by mistake since it isn't reserved. It as apparently used as a
  GOT pointer sometimes, and it should probably be reserved if that is
  the case.

- The GR64 registers are allocated in a different order now. The
  register allocator will automatically put the CSRs last. There were
  other changes to the order that may have been significant.

The test fix is because r0 and r1 swapped places in the allocation order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 18:02:56 +00:00
Jakob Stoklund Olesen
0caa420042 Fix SystemZ tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128686 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 23:02:12 +00:00
Devang Patel
afeaae7a94 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-06 22:39:26 +00:00
Duncan Sands
cdd4f8c7cb Correct bogus module triple specifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112469 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-30 10:48:29 +00:00
Bill Wendling
23ead99283 SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and
replace the check with the appropriate predicate. Modify the testcase to reflect
the correct code. (It should be saving callee-saved registers on the stack
allocated by the calling fuction.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103829 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 22:17:42 +00:00
Chris Lattner
d2075586c8 add newlines at the end of files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100705 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 22:53:17 +00:00
Dale Johannesen
b39b7e5ebf Split big test into multiple directories to cater to
those who don't build all targets.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 20:43:35 +00:00
Evan Cheng
d40d03e1bd Teach dag combine to fold the following transformation more aggressively:
(OP (trunc x), (trunc y)) -> (trunc (OP x, y))

Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.

This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92849 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-06 19:38:29 +00:00
Anton Korobeynikov
39784e158a Fix invalid chain folding for memory variant of sdiv / udiv
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92472 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 10:31:54 +00:00
Dan Gohman
fce288fc91 Eliminate more uses of llvm-as and llvm-dis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 00:09:15 +00:00
Anton Korobeynikov
d99dda22f4 Add missing RUN line
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79707 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-22 00:28:50 +00:00
Anton Korobeynikov
65a3788694 Reduce the test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79703 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-22 00:18:11 +00:00
Anton Korobeynikov
162da3c7b4 Add fcopysign instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79664 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 20:02:37 +00:00
Anton Korobeynikov
3c2734c82b Handle 'r' inline asm constraint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79648 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 18:15:41 +00:00
Dan Gohman
cf20ac4fd1 Various AsmWriter output cleanups. Use WriteAsOperand instead of
PrintUnmangledNameSafely.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78878 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13 01:36:44 +00:00
Anton Korobeynikov
f4ef8c9045 Add testcases for reg-mem arithemtics added recently
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78214 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 17:04:32 +00:00
Anton Korobeynikov
9e155d61da Convert bswap test to filecheck, add more test entries & convert stuff to filecheck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 16:50:53 +00:00
Chris Lattner
74625023a8 convert this test to filecheck format, which is faster and avoids false matches of "st" -> "stdin"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76591 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 17:36:24 +00:00
Evan Cheng
5248468473 Enable cross register class coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76281 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 02:10:10 +00:00
Anton Korobeynikov
ebfe2b2722 Make xfail proper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:53:47 +00:00
Anton Korobeynikov
c975180624 Temporary disable 16 bit bswap
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76063 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:35:57 +00:00
Anton Korobeynikov
6ff3f2c710 Add bswap patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76061 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:34:52 +00:00
Anton Korobeynikov
54681eca69 Fix logic inversion for RI-mode address selection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76052 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:31:14 +00:00
Anton Korobeynikov
9419a0d13d Unbreak the test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76051 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:30:49 +00:00
Anton Korobeynikov
bb8a04806d Expand 32-bit bitconverts via memory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:30:29 +00:00
Anton Korobeynikov
f2fd8ea1c9 Fix incomin arg stack frame offset in case we need to generate stack frame
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:29:57 +00:00
Anton Korobeynikov
5dd38de2c2 Revert the commit, it just hides the real bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:28:26 +00:00
Anton Korobeynikov
75eef89ddb Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:24:41 +00:00
Anton Korobeynikov
8bd0db7615 Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:18:17 +00:00
Anton Korobeynikov
6fe326c713 Implement 'large' PIC model
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:16:05 +00:00
Anton Korobeynikov
48e8b3cc58 Implement shifts properly (hopefilly - finally!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76005 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:15:24 +00:00
Anton Korobeynikov
0a42d2b437 Properly handle divides. As a bonus - implement memory versions of them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76003 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:14:33 +00:00
Anton Korobeynikov
014d4639d8 32 bit shifts have only 12 bit displacements
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76000 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:13:24 +00:00
Anton Korobeynikov
1ed1e3ecd4 Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75990 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:10:17 +00:00
Anton Korobeynikov
720e3b00b8 Add support for 12 bit displacements
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:09:35 +00:00
Anton Korobeynikov
980d5503c3 Emit proper lowering of load from arg stack slot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:08:42 +00:00
Anton Korobeynikov
c772c4408e Implement dynamic allocas
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75985 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:08:15 +00:00
Anton Korobeynikov
c16cdc5de7 Add jump tables
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:07:50 +00:00
Anton Korobeynikov
759205d1ac Add rotates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75981 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:49 +00:00
Anton Korobeynikov
cfca8b1f62 Add patterns for integer negate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75980 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:27 +00:00
Anton Korobeynikov
8c993e1632 Provide proper patterns for and with imm instructions. Tune the tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:00 +00:00
Anton Korobeynikov
25af73303f Add 32 bit and reg-imm and disable invalid patterns for now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:05:32 +00:00
Anton Korobeynikov
747052c1a5 Add z9 and z10 target processors. Mark z10-only instructions as such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75977 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:05:00 +00:00
Anton Korobeynikov
22836d1b31 Proper lower 'small' results
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:58:24 +00:00