Nate Begeman
815d6dac1e
Add support for MULHS and MULHU nodes
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Have LegalizeDAG handle SREM and UREM for us
Codegen SDIV and UDIV by constant as a multiply by magic constant instead
of integer divide, which is very slow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21104 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 00:25:27 +00:00
Andrew Lenharth
2513ddc239
added lowerargs support for varargs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21101 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05 20:51:46 +00:00
Nate Begeman
ad5f65c74b
Behold, rlwinm with certain immediate arguments is printed as the much more
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readable slwi or srwi (shift left/right word immediate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21099 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05 18:19:50 +00:00
Nate Begeman
a3829d5580
Fix cut & paste errors (32->64), and codegen float->int more optimally.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21098 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05 17:32:30 +00:00
Tanya Lattner
ac6e2dbf52
Updated to use dep analyzer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21097 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05 16:36:44 +00:00
Nate Begeman
d3e6b94020
Remove 64 bit simple ISel, it never worked correctly
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Add initial (buggy) implementation of 64 bit pattern ISel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21096 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05 08:51:15 +00:00
Nate Begeman
c8c5c8f0fa
Back out the previous change to SelectBranchCC, since there are cases it
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could miscompile. A correct solution will be found in the near future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21095 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05 04:32:16 +00:00
Nate Begeman
439b444cad
Rename canUseAsImmediateForOpcode to getImmediateForOpcode to better
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indicate that it is not a boolean function.
Properly emit the pseudo instruction for conditional branch, so that we
can fix up conditional branches whose displacements are too large.
Reserve the right amount of opcode space for said pseudo instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21094 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05 04:22:58 +00:00
Nate Begeman
80196b1331
Implement SDIV by power of 2 as srawi/addze rather than load imm, divw
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21091 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05 00:15:08 +00:00
Nate Begeman
93075ec0a5
Pattern match fp mul-add, mul-sub, neg-mul-add, and neg-mul-sub
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21090 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 23:40:36 +00:00
Nate Begeman
178bb34ee5
Add support for multiply-add, multiply-sub, and their negated versions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21089 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 23:01:51 +00:00
Nate Begeman
d860aa62ac
Make sure that arg regs used by the call instruction are marked as such, so
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that regalloc doesn't cleverly reuse early arg regs loading later arg regs.
This fixes almost all outstanding failures in the pattern isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21086 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 22:17:48 +00:00
Nate Begeman
04ec80173b
Remove unnecessary register copy now that regalloc is fixed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21085 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 21:48:13 +00:00
Nate Begeman
c3e2db407e
i1 loads should also be from the low byte of the argument word.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21077 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 09:09:00 +00:00
Nate Begeman
e584668f04
Fix i64 return, fix CopyFromReg
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21076 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 06:52:38 +00:00
Duraid Madina
6e02e6842a
fix SREM/UREM, which gave incorrect results for x%y if x was zero. This is
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an ugly hack, but it seems to work. I should fix this properly and add a test
as well.
fixes multisource/obsequi (maybe others)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21075 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 05:05:52 +00:00
Duraid Madina
09c61b9c19
add implicit use op
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21074 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 04:50:57 +00:00
Nate Begeman
6644d4c933
Full varargs support. All of UnitTests now passes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21070 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03 23:11:17 +00:00
Nate Begeman
4ec0cbdf15
Pass the correct value for the chain to the store
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21066 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03 22:22:56 +00:00
Nate Begeman
fa55470e39
Fix SHL_PARTS
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Start implementation of integer varargs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21065 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03 22:13:27 +00:00
Andrew Lenharth
63b720ac7c
is this simpler? I think it is simpler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21064 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03 20:35:21 +00:00
Andrew Lenharth
500d025bd9
fix 101 regressions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21063 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03 18:24:50 +00:00
Duraid Madina
162a837f63
.bss is no problem here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21061 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03 14:52:01 +00:00
Nate Begeman
aa73a9f16f
Keeping up with the Joneses.
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Implement not, nor, nand, and eqv
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21060 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03 11:20:20 +00:00
Andrew Lenharth
10c085b525
Select optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21051 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 22:32:39 +00:00
Andrew Lenharth
0eaf6ce2ef
Try several things. 1) drop /i from FP ops 2) factor out FP to Int moves and provide 21264 support for those 3) match not 4) match ornot andnot xornot
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21046 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 21:06:51 +00:00
Andrew Lenharth
7332f3e05d
FNEG/FABS/UNDEF
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21029 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 19:11:07 +00:00
Andrew Lenharth
30b46d41bc
FNEG/FABS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21028 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 19:04:58 +00:00
Duraid Madina
32c46f33b7
ia64 asmprinter fixes:
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- turn off assembler's autoalignment
- set FunctionAddrPrefix/Suffix so that .data8 entries pointing to
functions have their value wrapped in @fptr(), so that a function
descriptor will be materialized for that function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21025 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 12:30:47 +00:00
Duraid Madina
75c9fcbdcc
support IDEF, fnegabs (thanks sampo)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21023 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 10:33:53 +00:00
Duraid Madina
5c156b7473
add fnegabs op
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21022 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 10:06:27 +00:00
Nate Begeman
27eeb00a1a
Set shift amount to Extend
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Implement ISD::FABS and ISD::FNEG nodes
Implement SHL_PARTS, SRL_PARTS, and SRA_PARTS
Generate PowerPC 'fneg', 'fabs', and 'fnabs' instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21018 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 05:59:34 +00:00
Chris Lattner
b7edaa1d08
add support for FABS and FNEG
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21015 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 05:30:17 +00:00
Duraid Madina
a7ee8b8f04
add support FNEG and FABS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21012 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 05:18:38 +00:00
Chris Lattner
43fdea070c
This target doesn't support fabs/fneg yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21010 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 05:03:24 +00:00
Chris Lattner
b1f26fb921
add an fabs instr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21006 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 04:31:56 +00:00
Chris Lattner
b38a7495da
Add support for 64-bit shifts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21005 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 04:01:14 +00:00
Nate Begeman
27523a1c92
Fix i64 returns
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Generate PowerPC 'subfic' instruction when appropriate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20995 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 00:42:16 +00:00
Chris Lattner
7ce7eff54c
Add support for ISD::UNDEF to the X86 be
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20990 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 22:46:45 +00:00
Nate Begeman
fc1b1dad88
Add ISD::UNDEF node
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Teach the SelectionDAG code how to expand and promote it
Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp
arguments, but not shadowing their value. This allows us to do the right
thing with both fixed and vararg floating point arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20988 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 22:34:39 +00:00
Chris Lattner
e6fea166c3
Fix another PATypeHolder error, contributed by Bill Wendling!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20983 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 15:41:30 +00:00
Duraid Madina
69c8e20aa1
repair mindless SELECT waste.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20982 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 10:35:00 +00:00
Nate Begeman
6cb2e1b124
Fix Olden/bh, CR0 was being set in the wrong order
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LowerCallTo and ISD::CALL are going to need to be modified, regs are being
set in the wrong order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20981 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 08:57:43 +00:00
Nate Begeman
31318e4b6c
Also apply Chris's fix to FP select and SETCC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20979 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 07:21:30 +00:00
Chris Lattner
3071019026
Move the selection of the arms of the select operation up to the conditional
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part to make sure we get the side effects and to avoid confusing the CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20977 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 07:10:02 +00:00
Nate Begeman
a7e11a4bb5
Fix stores to global addresses
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Fix calls with no arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20975 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 05:57:17 +00:00
Nate Begeman
04730361b5
Support indexed loads and stores. This drops Shootout/matrix time from
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18.8 to 14.8 seconds. The Pattern ISel is now often faster than the
Simple ISel, esp. on memory intensive code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20973 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 04:45:11 +00:00
Nate Begeman
6b55997df5
Implement FP_TO_SINT and FP_TO_UINT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20972 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 02:59:27 +00:00
Nate Begeman
6d369ccae0
Add support for adding 0.0 and -0.0 to the constant pool, since we lie and
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say that we support them, for the purposes of generating fsel instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20970 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 01:08:07 +00:00
Nate Begeman
dffcfccc13
Factor out common code, support FP comparison in folded SetCC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20969 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 00:32:34 +00:00